From 720923eddd7a6d0a914fb8d34ae7f657ff1abfd2 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 24 Feb 2023 16:52:26 -1000 Subject: [PATCH] target/arm: Remove arm_free_cc, a64_free_cc Translators are no longer required to free tcg temporaries. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 17 ++++------------- target/arm/tcg/translate.c | 9 --------- target/arm/tcg/translate.h | 1 - 3 files changed, 4 insertions(+), 23 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index f15e591293..d1e677ca76 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -319,18 +319,13 @@ static void a64_test_cc(DisasCompare64 *c64, int cc) arm_test_cc(&c32, cc); - /* Sign-extend the 32-bit value so that the GE/LT comparisons work - * properly. The NE/EQ comparisons are also fine with this choice. */ + /* + * Sign-extend the 32-bit value so that the GE/LT comparisons work + * properly. The NE/EQ comparisons are also fine with this choice. + */ c64->cond = c32.cond; c64->value = tcg_temp_new_i64(); tcg_gen_ext_i32_i64(c64->value, c32.value); - - arm_free_cc(&c32); -} - -static void a64_free_cc(DisasCompare64 *c64) -{ - tcg_temp_free_i64(c64->value); } static void gen_rebuild_hflags(DisasContext *s) @@ -5315,7 +5310,6 @@ static void disas_cc(DisasContext *s, uint32_t insn) tcg_t0 = tcg_temp_new_i32(); arm_test_cc(&c, cond); tcg_gen_setcondi_i32(tcg_invert_cond(c.cond), tcg_t0, c.value, 0); - arm_free_cc(&c); /* Load the arguments for the new comparison. */ if (is_imm) { @@ -5435,8 +5429,6 @@ static void disas_cond_select(DisasContext *s, uint32_t insn) tcg_gen_movcond_i64(c.cond, tcg_rd, c.value, zero, t_true, t_false); } - a64_free_cc(&c); - if (!sf) { tcg_gen_ext32u_i64(tcg_rd, tcg_rd); } @@ -6256,7 +6248,6 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn) tcg_gen_movcond_i64(c.cond, t_true, c.value, tcg_constant_i64(0), t_true, t_false); tcg_temp_free_i64(t_false); - a64_free_cc(&c); /* Note that sregs & hregs write back zeros to the high bits, and we've already done the zero-extension. */ diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index ecf09cb12b..f414a891db 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -754,13 +754,6 @@ void arm_test_cc(DisasCompare *cmp, int cc) cmp->value_global = global; } -void arm_free_cc(DisasCompare *cmp) -{ - if (!cmp->value_global) { - tcg_temp_free_i32(cmp->value); - } -} - void arm_jump_cc(DisasCompare *cmp, TCGLabel *label) { tcg_gen_brcondi_i32(cmp->cond, cmp->value, 0, label); @@ -771,7 +764,6 @@ void arm_gen_test_cc(int cc, TCGLabel *label) DisasCompare cmp; arm_test_cc(&cmp, cc); arm_jump_cc(&cmp, label); - arm_free_cc(&cmp); } void gen_set_condexec(DisasContext *s) @@ -9125,7 +9117,6 @@ static bool trans_CSEL(DisasContext *s, arg_CSEL *a) arm_test_cc(&c, a->fcond); tcg_gen_movcond_i32(c.cond, rn, c.value, zero, rn, rm); - arm_free_cc(&c); store_reg(s, a->rd, rn); tcg_temp_free_i32(rm); diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h index 4001372acd..5c37574cb8 100644 --- a/target/arm/tcg/translate.h +++ b/target/arm/tcg/translate.h @@ -304,7 +304,6 @@ static inline void gen_a64_update_pc(DisasContext *s, target_long diff) #endif void arm_test_cc(DisasCompare *cmp, int cc); -void arm_free_cc(DisasCompare *cmp); void arm_jump_cc(DisasCompare *cmp, TCGLabel *label); void arm_gen_test_cc(int cc, TCGLabel *label); MemOp pow2_align(unsigned i); -- 2.11.0