From 7210918cade19b7c6f14c4403aac0fd381c07b1d Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 24 Aug 2018 13:17:31 +0100 Subject: [PATCH] hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes large Reduce the size of the per-cpu GICH memory regions from 0x1000 to 0x200. The registers only cover 0x200 bytes, and the Cortex-A15 wants to map them at a spacing of 0x200 bytes apart. Having the region be too large interferes with mapping them like that, so reduce it. Signed-off-by: Peter Maydell Reviewed-by: Luc Michel Message-id: 20180821132811.17675-3-peter.maydell@linaro.org --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index c1b35fc1ee..542b4b93ea 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -2084,7 +2084,7 @@ static void arm_gic_realize(DeviceState *dev, Error **errp) for (i = 0; i < s->num_cpu; i++) { memory_region_init_io(&s->vifaceiomem[i + 1], OBJECT(s), &gic_viface_ops, &s->backref[i], - "gic_viface", 0x1000); + "gic_viface", 0x200); sysbus_init_mmio(sbd, &s->vifaceiomem[i + 1]); } } -- 2.11.0