From 749a2b66f49de322ae472d57e1451e5f623d82f1 Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Wed, 27 Mar 2013 23:07:05 +0000 Subject: [PATCH] net/macb: clear tx/rx completion flags in ISR At least in the cadence IP core on the Xilinx Zynq SoC the TCOMP/RCOMP flags are not auto-cleaned. As these flags are evaluated, they need to be cleaned. Signed-off-by: Steffen Trumtrar Cc: Nicolas Ferre Signed-off-by: David S. Miller --- drivers/net/ethernet/cadence/macb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index 3a5d680ff8f9..3593c2c594a6 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -485,6 +485,8 @@ static void macb_tx_interrupt(struct macb *bp) status = macb_readl(bp, TSR); macb_writel(bp, TSR, status); + macb_writel(bp, ISR, MACB_BIT(TCOMP)); + netdev_vdbg(bp->dev, "macb_tx_interrupt status = 0x%03lx\n", (unsigned long)status); @@ -736,6 +738,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) * now. */ macb_writel(bp, IDR, MACB_RX_INT_FLAGS); + macb_writel(bp, ISR, MACB_BIT(RCOMP)); if (napi_schedule_prep(&bp->napi)) { netdev_vdbg(bp->dev, "scheduling RX softirq\n"); -- 2.11.0