From 75b3c4ac12d63e2e0427f9b4a57a640d580c2fc9 Mon Sep 17 00:00:00 2001 From: Wang Tiatian Date: Fri, 8 Sep 2017 11:01:46 -0400 Subject: [PATCH] change prefix of function name from gen9 to i965 in gpe utils Signed-off-by: Wang Tiatian --- src/gen9_avc_encoder.c | 166 +++++++++++++++++++++---------------------- src/gen9_hevc_encoder.c | 40 +++++------ src/gen9_vp9_encoder.c | 122 ++++++++++++++++---------------- src/i965_encoder_vp8.c | 182 +----------------------------------------------- src/i965_gpe_utils.c | 10 +-- src/i965_gpe_utils.h | 8 +-- 6 files changed, 174 insertions(+), 354 deletions(-) diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c index 5e1fd4b..c465a35 100644 --- a/src/gen9_avc_encoder.c +++ b/src/gen9_avc_encoder.c @@ -1536,12 +1536,12 @@ gen9_avc_send_surface_scaling(VADriverContextP ctx, else surface_format = I965_SURFACEFORMAT_R8_UNORM; - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, surface_param->input_surface, 0, 1, surface_format, GEN9_AVC_SCALING_FRAME_SRC_Y_INDEX); - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, surface_param->output_surface, 0, 1, surface_format, GEN9_AVC_SCALING_FRAME_DST_Y_INDEX); @@ -1550,7 +1550,7 @@ gen9_avc_send_surface_scaling(VADriverContextP ctx, if (surface_param->mbv_proc_stat_enabled) { res_size = 16 * (surface_param->input_frame_width / 16) * (surface_param->input_frame_height / 16) * sizeof(unsigned int); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, surface_param->pres_mbv_proc_stat_buffer, 0, @@ -1558,7 +1558,7 @@ gen9_avc_send_surface_scaling(VADriverContextP ctx, 0, GEN9_AVC_SCALING_FRAME_MBVPROCSTATS_DST_INDEX); } else if (surface_param->enable_mb_flatness_check) { - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, surface_param->pres_flatness_check_surface, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -2385,7 +2385,7 @@ gen9_avc_send_surface_brc_init_reset(VADriverContextP ctx, struct encoder_vme_mfc_context * vme_context = (struct encoder_vme_mfc_context *)encoder_context->vme_context; struct i965_avc_encoder_context * avc_ctx = (struct i965_avc_encoder_context *)vme_context->private_enc_ctx; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_history_buffer, 0, @@ -2393,7 +2393,7 @@ gen9_avc_send_surface_brc_init_reset(VADriverContextP ctx, 0, GEN9_AVC_BRC_INIT_RESET_HISTORY_INDEX); - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_dist_data_surface, 1, @@ -2583,7 +2583,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, is_g95 = 1; /* brc history buffer*/ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_history_buffer, 0, @@ -2592,7 +2592,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, (is_g95 ? GEN95_AVC_FRAME_BRC_UPDATE_HISTORY_INDEX : GEN9_AVC_FRAME_BRC_UPDATE_HISTORY_INDEX)); /* previous pak buffer*/ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_pre_pak_statistics_output_buffer, 0, @@ -2601,7 +2601,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, (is_g95 ? GEN95_AVC_FRAME_BRC_UPDATE_PAK_STATISTICS_OUTPUT_INDEX : GEN9_AVC_FRAME_BRC_UPDATE_PAK_STATISTICS_OUTPUT_INDEX)); /* image state command buffer read only*/ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_image_state_read_buffer, 0, @@ -2610,7 +2610,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, (is_g95 ? GEN95_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_READ_INDEX : GEN9_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_READ_INDEX)); /* image state command buffer write only*/ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_image_state_write_buffer, 0, @@ -2619,7 +2619,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, (is_g95 ? GEN95_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_WRITE_INDEX : GEN9_AVC_FRAME_BRC_UPDATE_IMAGE_STATE_WRITE_INDEX)); if (avc_state->mbenc_brc_buffer_size > 0) { - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &(avc_ctx->res_mbenc_brc_buffer), 0, @@ -2646,7 +2646,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, } /* AVC_ME Distortion 2D surface buffer,input/output. is it res_brc_dist_data_surface*/ - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_dist_data_surface, 1, @@ -2654,7 +2654,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, (is_g95 ? GEN95_AVC_FRAME_BRC_UPDATE_DISTORTION_INDEX : GEN9_AVC_FRAME_BRC_UPDATE_DISTORTION_INDEX)); /* BRC const data 2D surface buffer */ - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_const_data_buffer, 1, @@ -2662,7 +2662,7 @@ gen9_avc_send_surface_brc_frame_update(VADriverContextP ctx, (is_g95 ? GEN95_AVC_FRAME_BRC_UPDATE_CONSTANT_DATA_INDEX : GEN9_AVC_FRAME_BRC_UPDATE_CONSTANT_DATA_INDEX)); /* MB statistical data surface*/ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_mb_status_buffer, 0, @@ -2836,7 +2836,7 @@ gen9_avc_send_surface_brc_mb_update(VADriverContextP ctx, struct generic_enc_codec_state * generic_state = (struct generic_enc_codec_state *)vme_context->generic_enc_state; /* brc history buffer*/ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_brc_history_buffer, 0, @@ -2846,7 +2846,7 @@ gen9_avc_send_surface_brc_mb_update(VADriverContextP ctx, /* MB qp data buffer is it same as res_mbbrc_mb_qp_data_surface*/ if (generic_state->mb_brc_enabled) { - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &avc_ctx->res_mbbrc_mb_qp_data_surface, 1, @@ -2857,7 +2857,7 @@ gen9_avc_send_surface_brc_mb_update(VADriverContextP ctx, /* BRC roi feature*/ if (generic_state->brc_roi_enable) { - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_mbbrc_roi_surface, 0, @@ -2868,7 +2868,7 @@ gen9_avc_send_surface_brc_mb_update(VADriverContextP ctx, } /* MB statistical data surface*/ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &avc_ctx->res_mb_status_buffer, 0, @@ -4152,7 +4152,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, /*pak obj command buffer output*/ size = frame_mb_size * 16 * 4; gpe_resource = &avc_priv_surface->res_mb_code_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4163,7 +4163,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, /*mv data buffer output*/ size = frame_mb_size * 32 * 4; gpe_resource = &avc_priv_surface->res_mv_data_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4181,7 +4181,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, } else { obj_surface = encode_state->input_yuv_object; } - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 0, @@ -4189,7 +4189,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, I965_SURFACEFORMAT_R8_UNORM, GEN9_AVC_MBENC_CURR_Y_INDEX); - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 1, @@ -4200,14 +4200,14 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, if (generic_state->hme_enabled) { /*memv input 4x*/ gpe_resource = &(avc_ctx->s4x_memv_data_buffer); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, GEN9_AVC_MBENC_MV_DATA_FROM_ME_INDEX); /* memv distortion input*/ gpe_resource = &(avc_ctx->s4x_memv_distortion_buffer); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4218,7 +4218,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, if (param->mb_const_data_buffer_in_use) { size = 16 * AVC_QP_MAX * sizeof(unsigned int); gpe_resource = &avc_ctx->res_mbbrc_const_data_buffer; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4234,7 +4234,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, gpe_resource = &(avc_ctx->res_mb_qp_data_surface); else gpe_resource = &(avc_ctx->res_mbbrc_mb_qp_data_surface); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4251,7 +4251,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, } else { obj_surface = encode_state->input_yuv_object; } - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_INDEX); /*input ref YUV surface*/ @@ -4261,7 +4261,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, if (!obj_surface || !obj_surface->private_data) break; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_INDEX + i * 2 + 1); } @@ -4275,7 +4275,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, } else { obj_surface = encode_state->input_yuv_object; } - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_INDEX); @@ -4286,10 +4286,10 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, if (!obj_surface || !obj_surface->private_data) break; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_INDEX + i * 2 + 1); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_INDEX + i * 2 + 2); if (i == 0) { @@ -4297,7 +4297,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, /*pak obj command buffer output(mb code)*/ size = frame_mb_size * 16 * 4; gpe_resource = &avc_priv_surface->res_mb_code_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4308,7 +4308,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, /*mv data buffer output*/ size = frame_mb_size * 32 * 4; gpe_resource = &avc_priv_surface->res_mv_data_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4319,7 +4319,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, } if (i < INTEL_AVC_MAX_BWD_REF_NUM) { - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_INDEX + i * 2 + 1 + INTEL_AVC_MAX_BWD_REF_NUM); } @@ -4329,7 +4329,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, /* BRC distortion data buffer for I frame*/ if (mbenc_i_frame_dist_in_use) { gpe_resource = &(avc_ctx->res_brc_dist_data_surface); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4341,7 +4341,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, avc_priv_surface = obj_surface->private_data; if (avc_state->ref_pic_select_list_supported && avc_priv_surface->is_as_ref) { gpe_resource = &(avc_priv_surface->res_ref_pic_select_surface); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4353,7 +4353,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, /*mb status buffer input*/ size = frame_mb_size * 16 * 4; gpe_resource = &(avc_ctx->res_mb_status_buffer); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4364,7 +4364,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, } else if (avc_state->flatness_check_enable) { gpe_resource = &(avc_ctx->res_flatness_check_surface); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4375,7 +4375,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, /*mad buffer input*/ size = 4; gpe_resource = &(avc_ctx->res_mad_data_buffer); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4389,7 +4389,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, if (avc_state->mbenc_brc_buffer_size > 0) { size = avc_state->mbenc_brc_buffer_size; gpe_resource = &(avc_ctx->res_mbenc_brc_buffer); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4402,7 +4402,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, if (avc_state->arbitrary_num_mbs_in_slice) { /*slice surface input*/ gpe_resource = &(avc_ctx->res_mbenc_slice_map_surface); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4414,7 +4414,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, if (!mbenc_i_frame_dist_in_use) { if (avc_state->mb_disable_skip_map_enable) { gpe_resource = &(avc_ctx->res_mb_disable_skip_map_surface); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4430,7 +4430,7 @@ gen9_avc_send_surface_mbenc(VADriverContextP ctx, } if (generic_state->frame_type != SLICE_TYPE_I) { - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4590,7 +4590,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, /*==== pak obj command buffer output ====*/ size = frame_mb_nums * FEI_AVC_MB_CODE_BUFFER_SIZE; gpe_resource = &avc_priv_surface->res_mb_code_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4602,7 +4602,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, /*=== mv data buffer output */ size = frame_mb_nums * FEI_AVC_MV_DATA_BUFFER_SIZE; gpe_resource = &avc_priv_surface->res_mv_data_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4613,7 +4613,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, /* === current input Y (binding table offset = 3)=== */ obj_surface = encode_state->input_yuv_object; - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 0, @@ -4622,7 +4622,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, GEN9_AVC_MBENC_CURR_Y_INDEX); /* === current input UV === (binding table offset == 4)*/ - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 1, @@ -4631,13 +4631,13 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, GEN9_AVC_MBENC_CURR_UV_INDEX); /* === input current YUV surface, (binding table offset == 15) === */ - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_INDEX); /*== input current YUV surface, (binding table offset == 32)*/ - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_INDEX); @@ -4648,7 +4648,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, obj_surface = SURFACE(surface_id); if (!obj_surface || !obj_surface->private_data) break; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_INDEX + i * 2 + 1); } @@ -4662,7 +4662,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, if (!obj_surface || !obj_surface->private_data) break; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_INDEX + i * 2 + 2); if (i == 0) { @@ -4670,7 +4670,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, /* mb code of Backward reference frame */ size = frame_mb_nums * FEI_AVC_MB_CODE_BUFFER_SIZE; gpe_resource = &avc_priv_surface->res_mb_code_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4681,7 +4681,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, /* mv data of backward ref frame */ size = frame_mb_nums * FEI_AVC_MV_DATA_BUFFER_SIZE; gpe_resource = &avc_priv_surface->res_mv_data_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4692,7 +4692,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, } //again if (i < INTEL_AVC_MAX_BWD_REF_NUM) { - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_INDEX + i * 2 + 1); } @@ -4703,7 +4703,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, avc_priv_surface = obj_surface->private_data; if (avc_state->ref_pic_select_list_supported && avc_priv_surface->is_as_ref) { gpe_resource = &(avc_priv_surface->res_ref_pic_select_surface); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -4717,7 +4717,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, (fei_param->mb_ctrl != VA_INVALID_ID)) { size = frame_mb_nums * FEI_AVC_MB_CONTROL_BUFFER_SIZE; gpe_resource = &avc_priv_surface->res_fei_mb_cntrl_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4730,7 +4730,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, if (fei_param->mv_predictor_enable && (fei_param->mv_predictor != VA_INVALID_ID)) { size = frame_mb_nums * 48; //sizeof (VAEncMVPredictorH264Intel) == 40 gpe_resource = &avc_priv_surface->res_fei_mv_predictor_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4743,7 +4743,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, if (fei_param->mb_qp && (fei_param->qp != VA_INVALID_ID)) { size = frame_mb_nums + 3; gpe_resource = &avc_priv_surface->res_fei_mb_qp_surface, - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -4756,7 +4756,7 @@ gen9_avc_fei_send_surface_mbenc(VADriverContextP ctx, /*=== FEI distortion surface ====*/ size = frame_mb_nums * 48; //sizeof (VAEncFEIDistortionBufferH264Intel) == 48 gpe_resource = &avc_priv_surface->res_fei_vme_distortion_surface; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, @@ -5086,7 +5086,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, case INTEL_ENC_HME_4x : { /*memv output 4x*/ gpe_resource = &avc_ctx->s4x_memv_data_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5095,7 +5095,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, /*memv input 16x*/ if (generic_state->b16xme_enabled) { gpe_resource = &avc_ctx->s16x_memv_data_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5103,14 +5103,14 @@ gen9_avc_send_surface_me(VADriverContextP ctx, } /* brc distortion output*/ gpe_resource = &avc_ctx->res_brc_dist_data_surface; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, GEN9_AVC_ME_BRC_DISTORTION_INDEX); /* memv distortion output*/ gpe_resource = &avc_ctx->s4x_memv_distortion_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5119,7 +5119,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, obj_surface = encode_state->reconstructed_object; avc_priv_surface = obj_surface->private_data; input_surface = avc_priv_surface->scaled_4x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_FWD_REF_INDEX); /*input ref scaled YUV surface*/ @@ -5132,7 +5132,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, input_surface = avc_priv_surface->scaled_4x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_FWD_REF_INDEX + i * 2 + 1); } @@ -5141,7 +5141,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, avc_priv_surface = obj_surface->private_data; input_surface = avc_priv_surface->scaled_4x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_BWD_REF_INDEX); @@ -5154,7 +5154,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, input_surface = avc_priv_surface->scaled_4x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_BWD_REF_INDEX + i * 2 + 1); } @@ -5163,7 +5163,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, } case INTEL_ENC_HME_16x : { gpe_resource = &avc_ctx->s16x_memv_data_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5171,7 +5171,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, if (generic_state->b32xme_enabled) { gpe_resource = &avc_ctx->s32x_memv_data_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5181,7 +5181,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, obj_surface = encode_state->reconstructed_object; avc_priv_surface = obj_surface->private_data; input_surface = avc_priv_surface->scaled_16x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_FWD_REF_INDEX); @@ -5194,7 +5194,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, input_surface = avc_priv_surface->scaled_16x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_FWD_REF_INDEX + i * 2 + 1); } @@ -5203,7 +5203,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, avc_priv_surface = obj_surface->private_data; input_surface = avc_priv_surface->scaled_16x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_BWD_REF_INDEX); @@ -5216,7 +5216,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, input_surface = avc_priv_surface->scaled_16x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_BWD_REF_INDEX + i * 2 + 1); } @@ -5224,7 +5224,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, } case INTEL_ENC_HME_32x : { gpe_resource = &avc_ctx->s32x_memv_data_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5233,7 +5233,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, obj_surface = encode_state->reconstructed_object; avc_priv_surface = obj_surface->private_data; input_surface = avc_priv_surface->scaled_32x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_FWD_REF_INDEX); @@ -5246,7 +5246,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, input_surface = avc_priv_surface->scaled_32x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_FWD_REF_INDEX + i * 2 + 1); } @@ -5255,7 +5255,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, avc_priv_surface = obj_surface->private_data; input_surface = avc_priv_surface->scaled_32x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_BWD_REF_INDEX); @@ -5268,7 +5268,7 @@ gen9_avc_send_surface_me(VADriverContextP ctx, input_surface = avc_priv_surface->scaled_32x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, GEN9_AVC_ME_CURR_FOR_BWD_REF_INDEX + i * 2 + 1); } @@ -5430,12 +5430,12 @@ gen9_avc_send_surface_wp(VADriverContextP ctx, obj_surface = encode_state->reference_objects[0]; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_WP_INPUT_REF_SURFACE_INDEX); obj_surface = avc_ctx->wp_output_pic_select_surface_obj[curbe_param->ref_list_idx]; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, GEN9_AVC_WP_OUTPUT_SCALED_SURFACE_INDEX); } @@ -5567,7 +5567,7 @@ gen9_avc_send_surface_sfd(VADriverContextP ctx, /*HME mv data surface memv output 4x*/ gpe_resource = &avc_ctx->s4x_memv_data_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5575,7 +5575,7 @@ gen9_avc_send_surface_sfd(VADriverContextP ctx, /* memv distortion */ gpe_resource = &avc_ctx->s4x_memv_distortion_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -5583,7 +5583,7 @@ gen9_avc_send_surface_sfd(VADriverContextP ctx, /*buffer output*/ size = 32 * 4 * 4; gpe_resource = &avc_ctx->res_sfd_output_buffer; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_resource, 0, diff --git a/src/gen9_hevc_encoder.c b/src/gen9_hevc_encoder.c index e89b284..80d9d9c 100644 --- a/src/gen9_hevc_encoder.c +++ b/src/gen9_hevc_encoder.c @@ -794,7 +794,7 @@ gen9_hevc_set_gpe_1d_surface(VADriverContextP ctx, } if (gpe_buffer) - gen9_add_buffer_gpe_surface(ctx, gpe_context, + i965_add_buffer_gpe_surface(ctx, gpe_context, gpe_buffer, is_raw_buffer, size == 0 ? gpe_buffer->size - offset : size, offset, bti_idx); @@ -823,20 +823,20 @@ gen9_hevc_set_gpe_2d_surface(VADriverContextP ctx, } if (gpe_buffer) { - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_buffer, is_media_block_rw, format, bti_idx); } else if (surface_object) { - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, surface_object, 0, is_media_block_rw, format, bti_idx); if (has_uv_surface) - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, surface_object, 1, is_media_block_rw, format, bti_idx + 1); @@ -855,7 +855,7 @@ gen9_hevc_set_gpe_adv_surface(VADriverContextP ctx, surface_object = priv_ctx->gpe_surfaces[surface_type].surface_object; if (surface_object) - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, surface_object, bti_idx); } @@ -3099,12 +3099,12 @@ gen9_hevc_scaling_set_surfaces(VADriverContextP ctx, else surface_format = I965_SURFACEFORMAT_R8_UNORM; - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, scaling_param->input_surface, 0, 1, surface_format, GEN9_HEVC_SCALING_FRAME_SRC_Y_INDEX); - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, scaling_param->output_surface, 0, 1, surface_format, GEN9_HEVC_SCALING_FRAME_DST_Y_INDEX); @@ -3113,7 +3113,7 @@ gen9_hevc_scaling_set_surfaces(VADriverContextP ctx, scaling_param->enable_mb_variance_output || scaling_param->enable_mb_pixel_average_output) && scaling_param->use_4x_scaling) { - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, scaling_param->pres_mbv_proc_stat_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -3404,26 +3404,26 @@ gen9_hevc_me_set_surfaces(VADriverContextP ctx, switch (hme_type) { case HEVC_HME_4X: scaled_surf_id = HEVC_SCALED_SURF_4X_ID; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->s4x_memv_data_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, GEN9_HEVC_ME_MV_DATA_SURFACE_INDEX); if (generic_state->b16xme_enabled) - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->s16x_memv_data_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, GEN9_HEVC_ME_16X_MV_DATA_SURFACE_INDEX); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->res_brc_me_dist_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, GEN9_HEVC_ME_BRC_DISTORTION_INDEX); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->s4x_memv_distortion_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -3432,20 +3432,20 @@ gen9_hevc_me_set_surfaces(VADriverContextP ctx, case HEVC_HME_16X: scaled_surf_id = HEVC_SCALED_SURF_16X_ID; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->s16x_memv_data_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, GEN9_HEVC_ME_MV_DATA_SURFACE_INDEX); if (generic_state->b32xme_enabled) - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->s32x_memv_data_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, GEN9_HEVC_ME_32X_MV_DATA_SURFACE_INDEX); else - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->s16x_memv_data_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -3453,7 +3453,7 @@ gen9_hevc_me_set_surfaces(VADriverContextP ctx, break; case HEVC_HME_32X: scaled_surf_id = HEVC_SCALED_SURF_32X_ID; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &priv_ctx->s32x_memv_data_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -3465,7 +3465,7 @@ gen9_hevc_me_set_surfaces(VADriverContextP ctx, obj_surface = encode_state->reconstructed_object; surface_priv = (struct gen9_hevc_surface_priv *)obj_surface->private_data; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, surface_priv->scaled_surface_obj[scaled_surf_id], GEN9_HEVC_ME_CURR_FOR_FWD_REF_INDEX); @@ -3476,14 +3476,14 @@ gen9_hevc_me_set_surfaces(VADriverContextP ctx, break; surface_priv = (struct gen9_hevc_surface_priv *)obj_surface->private_data; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, surface_priv->scaled_surface_obj[scaled_surf_id], GEN9_HEVC_ME_CURR_FOR_FWD_REF_INDEX + i * 2 + 1); } obj_surface = encode_state->reconstructed_object; surface_priv = (struct gen9_hevc_surface_priv *)obj_surface->private_data; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, surface_priv->scaled_surface_obj[scaled_surf_id], GEN9_HEVC_ME_CURR_FOR_BWD_REF_INDEX); @@ -3494,7 +3494,7 @@ gen9_hevc_me_set_surfaces(VADriverContextP ctx, break; surface_priv = (struct gen9_hevc_surface_priv *)obj_surface->private_data; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, surface_priv->scaled_surface_obj[scaled_surf_id], GEN9_HEVC_ME_CURR_FOR_BWD_REF_INDEX + i * 2 + 1); } diff --git a/src/gen9_vp9_encoder.c b/src/gen9_vp9_encoder.c index e3a7580..8389dde 100644 --- a/src/gen9_vp9_encoder.c +++ b/src/gen9_vp9_encoder.c @@ -1190,7 +1190,7 @@ gen9_brc_init_reset_add_surfaces_vp9(VADriverContextP ctx, { struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &vme_context->res_brc_history_buffer, 0, @@ -1198,7 +1198,7 @@ gen9_brc_init_reset_add_surfaces_vp9(VADriverContextP ctx, 0, VP9_BTI_BRC_HISTORY_G9); - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &vme_context->s4x_memv_distortion_buffer, 1, @@ -1286,18 +1286,18 @@ gen9_brc_intra_dist_add_surfaces_vp9(VADriverContextP ctx, vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); obj_surface = vp9_priv_surface->scaled_4x_surface_obj; - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 0, 1, I965_SURFACEFORMAT_R8_UNORM, VP9_BTI_BRC_SRCY4X_G9 ); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, VP9_BTI_BRC_VME_COARSE_INTRA_G9); - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, &vme_context->s4x_memv_distortion_buffer, 1, @@ -1613,7 +1613,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; /* 0. BRC history buffer */ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_brc_history_buffer, 0, @@ -1622,7 +1622,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_HISTORY_G9); /* 1. Constant data buffer */ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_brc_const_data_buffer, 0, @@ -1631,7 +1631,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_CONSTANT_DATA_G9); /* 2. Distortion 2D surface buffer */ - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, brc_gpe_context, &vme_context->s4x_memv_distortion_buffer, 1, @@ -1639,7 +1639,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_DISTORTION_G9); /* 3. pak buffer */ - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_brc_mmdk_pak_buffer, 0, @@ -1664,7 +1664,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_MBENC_CURBE_OUTPUT_G9); /* 6. BRC_PIC_STATE read buffer */ - gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_pic_state_brc_read_buffer, 0, vme_context->res_pic_state_brc_read_buffer.size, @@ -1672,7 +1672,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_PIC_STATE_INPUT_G9); /* 7. BRC_PIC_STATE write buffer */ - gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_pic_state_brc_write_hfw_read_buffer, 0, vme_context->res_pic_state_brc_write_hfw_read_buffer.size, @@ -1680,7 +1680,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_PIC_STATE_OUTPUT_G9); /* 8. SEGMENT_STATE read buffer */ - gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_seg_state_brc_read_buffer, 0, vme_context->res_seg_state_brc_read_buffer.size, @@ -1688,7 +1688,7 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_SEGMENT_STATE_INPUT_G9); /* 9. SEGMENT_STATE write buffer */ - gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_seg_state_brc_write_buffer, 0, vme_context->res_seg_state_brc_write_buffer.size, @@ -1696,14 +1696,14 @@ gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, VP9_BTI_BRC_SEGMENT_STATE_OUTPUT_G9); /* 10. Bitstream size buffer */ - gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_brc_bitstream_size_buffer, 0, vme_context->res_brc_bitstream_size_buffer.size, 0, VP9_BTI_BRC_BITSTREAM_SIZE_G9); - gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + i965_add_buffer_gpe_surface(ctx, brc_gpe_context, &vme_context->res_brc_hfw_data_buffer, 0, vme_context->res_brc_hfw_data_buffer.size, @@ -1973,7 +1973,7 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, gpe_resource = param->pres_4x_memv_data_buffer; } - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -1981,7 +1981,7 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, if (param->b16xme_enabled) { gpe_resource = param->pres_16x_memv_data_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -1991,7 +1991,7 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, if (!param->use_16x_me) { gpe_resource = param->pres_me_brc_distortion_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -1999,7 +1999,7 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, gpe_resource = param->pres_me_distortion_buffer; - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, gpe_resource, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -2011,7 +2011,7 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, else input_surface = vp9_priv_surface->scaled_4x_surface_obj; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, VP9_BTI_ME_CURR_PIC_L0); @@ -2035,10 +2035,10 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, else input_surface = vp9_priv_surface->dys_4x_surface_obj; } - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, ref_bti); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, ref_bti + 1); ref_bti += 2; @@ -2062,10 +2062,10 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, input_surface = vp9_priv_surface->dys_4x_surface_obj; } - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, ref_bti); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, ref_bti + 1); ref_bti += 2; @@ -2088,10 +2088,10 @@ gen9_vp9_send_me_surface(VADriverContextP ctx, else input_surface = vp9_priv_surface->dys_4x_surface_obj; } - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, ref_bti); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, input_surface, ref_bti + 1); ref_bti += 2; @@ -2268,12 +2268,12 @@ gen9_vp9_send_scaling_surface(VADriverContextP ctx, else surface_format = I965_SURFACEFORMAT_R8_UNORM; - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, scaling_surface_param->input_surface, 0, 1, surface_format, scaling_bti->scaling_frame_src_y); - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, scaling_surface_param->output_surface, 0, 1, surface_format, scaling_bti->scaling_frame_dst_y); @@ -2524,13 +2524,13 @@ gen9_vp9_send_dys_surface(VADriverContextP ctx, { if (surface_param->input_frame) - gen9_add_adv_gpe_surface(ctx, + i965_add_adv_gpe_surface(ctx, gpe_context, surface_param->input_frame, VP9_BTI_DYS_INPUT_NV12); if (surface_param->output_frame) { - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, surface_param->output_frame, 0, @@ -2538,7 +2538,7 @@ gen9_vp9_send_dys_surface(VADriverContextP ctx, I965_SURFACEFORMAT_R8_UNORM, VP9_BTI_DYS_OUTPUT_Y); - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, surface_param->output_frame, 1, @@ -3009,7 +3009,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, case VP9_MEDIA_STATE_MBENC_I_32x32: { obj_surface = mbenc_param->curr_frame_obj; - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 0, @@ -3017,7 +3017,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, I965_SURFACEFORMAT_R8_UNORM, VP9_BTI_MBENC_CURR_Y_G9); - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 1, @@ -3027,7 +3027,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, if (mbenc_param->segmentation_enabled) { - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, mbenc_param->pres_segmentation_map, 1, @@ -3038,7 +3038,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, res_size = 16 * mbenc_param->frame_width_in_mb * mbenc_param->frame_height_in_mb * sizeof(unsigned int); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, mbenc_param->pres_mode_decision, 0, @@ -3051,7 +3051,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, case VP9_MEDIA_STATE_MBENC_I_16x16: { obj_surface = mbenc_param->curr_frame_obj; - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 0, @@ -3059,7 +3059,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, I965_SURFACEFORMAT_R8_UNORM, VP9_BTI_MBENC_CURR_Y_G9); - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 1, @@ -3067,12 +3067,12 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, I965_SURFACEFORMAT_R16_UINT, VP9_BTI_MBENC_CURR_UV_G9); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, VP9_BTI_MBENC_CURR_NV12_G9); if (mbenc_param->segmentation_enabled) { - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, mbenc_param->pres_segmentation_map, 1, @@ -3083,7 +3083,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, res_size = 16 * mbenc_param->frame_width_in_mb * mbenc_param->frame_height_in_mb * sizeof(unsigned int); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, mbenc_param->pres_mode_decision, 0, @@ -3106,7 +3106,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, case VP9_MEDIA_STATE_MBENC_P: { obj_surface = mbenc_param->curr_frame_obj; - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 0, @@ -3114,14 +3114,14 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, I965_SURFACEFORMAT_R8_UNORM, VP9_BTI_MBENC_CURR_Y_G9); - gen9_add_2d_gpe_surface(ctx, gpe_context, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 1, 1, I965_SURFACEFORMAT_R16_UINT, VP9_BTI_MBENC_CURR_UV_G9); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, obj_surface, VP9_BTI_MBENC_CURR_NV12_G9); @@ -3136,11 +3136,11 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, else tmp_input = obj_surface; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, tmp_input, VP9_BTI_MBENC_LAST_NV12_G9); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, tmp_input, VP9_BTI_MBENC_LAST_NV12_G9 + 1); @@ -3157,11 +3157,11 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, else tmp_input = obj_surface; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, tmp_input, VP9_BTI_MBENC_GOLD_NV12_G9); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, tmp_input, VP9_BTI_MBENC_GOLD_NV12_G9 + 1); @@ -3178,24 +3178,24 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, else tmp_input = obj_surface; - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, tmp_input, VP9_BTI_MBENC_ALTREF_NV12_G9); - gen9_add_adv_gpe_surface(ctx, gpe_context, + i965_add_adv_gpe_surface(ctx, gpe_context, tmp_input, VP9_BTI_MBENC_ALTREF_NV12_G9 + 1); } if (mbenc_param->hme_enabled) { - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, mbenc_param->ps4x_memv_data_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, VP9_BTI_MBENC_HME_MV_DATA_G9); - gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, mbenc_param->ps4x_memv_distortion_buffer, 1, I965_SURFACEFORMAT_R8_UNORM, @@ -3203,7 +3203,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, } if (mbenc_param->segmentation_enabled) { - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, mbenc_param->pres_segmentation_map, 1, @@ -3214,7 +3214,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, res_size = 16 * mbenc_param->frame_width_in_mb * mbenc_param->frame_height_in_mb * sizeof(unsigned int); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, mbenc_param->pres_mode_decision_prev, 0, @@ -3222,7 +3222,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, 0, VP9_BTI_MBENC_MODE_DECISION_PREV_G9); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, mbenc_param->pres_mode_decision, 0, @@ -3230,7 +3230,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, 0, VP9_BTI_MBENC_MODE_DECISION_G9); - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, mbenc_param->pres_output_16x16_inter_modes, 1, @@ -3253,7 +3253,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, case VP9_MEDIA_STATE_MBENC_TX: { obj_surface = mbenc_param->curr_frame_obj; - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 0, @@ -3261,7 +3261,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, I965_SURFACEFORMAT_R8_UNORM, VP9_BTI_MBENC_CURR_Y_G9); - gen9_add_2d_gpe_surface(ctx, + i965_add_2d_gpe_surface(ctx, gpe_context, obj_surface, 1, @@ -3270,7 +3270,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, VP9_BTI_MBENC_CURR_UV_G9); if (mbenc_param->segmentation_enabled) { - gen9_add_buffer_2d_gpe_surface(ctx, + i965_add_buffer_2d_gpe_surface(ctx, gpe_context, mbenc_param->pres_segmentation_map, 1, @@ -3281,7 +3281,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, res_size = 16 * mbenc_param->frame_width_in_mb * mbenc_param->frame_height_in_mb * sizeof(unsigned int); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, mbenc_param->pres_mode_decision, 0, @@ -3290,7 +3290,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, VP9_BTI_MBENC_MODE_DECISION_G9); res_size = frame_width_in_sb * frame_height_in_sb * 4 * sizeof(unsigned int); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, mbenc_param->pres_mb_code_surface, 0, @@ -3302,7 +3302,7 @@ gen9_vp9_send_mbenc_surface(VADriverContextP ctx, res_size = frame_width_in_sb * frame_height_in_sb * 64 * 16 * sizeof(unsigned int); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, mbenc_param->pres_mb_code_surface, 0, diff --git a/src/i965_encoder_vp8.c b/src/i965_encoder_vp8.c index 03bea31..b5eb5ef 100644 --- a/src/i965_encoder_vp8.c +++ b/src/i965_encoder_vp8.c @@ -40,6 +40,7 @@ #include "i965_defines.h" #include "i965_drv_video.h" #include "i965_encoder.h" +#include "i965_gpe_utils.h" #include "i965_encoder_vp8.h" #include "vp8_probs.h" #include "vpx_quant.h" @@ -1478,110 +1479,6 @@ i965_encoder_vp8_gpe_context_vfe_scoreboard_init(struct i965_gpe_context *gpe_co } static void -i965_add_2d_gpe_surface(VADriverContextP ctx, - struct intel_encoder_context *encoder_context, - struct i965_gpe_context *gpe_context, - struct object_surface *obj_surface, - int is_uv_surface, - int is_media_block_rw, - unsigned int format, - int index) -{ - struct i965_encoder_vp8_context *vp8_context = encoder_context->vme_context; - struct i965_gpe_table *gpe = vp8_context->gpe_table; - struct i965_gpe_resource gpe_resource; - struct i965_gpe_surface gpe_surface; - - memset(&gpe_surface, 0, sizeof(gpe_surface)); - - i965_object_surface_to_2d_gpe_resource(&gpe_resource, obj_surface); - gpe_surface.gpe_resource = &gpe_resource; - gpe_surface.is_2d_surface = 1; - gpe_surface.is_uv_surface = !!is_uv_surface; - gpe_surface.is_media_block_rw = !!is_media_block_rw; - - gpe_surface.cacheability_control = vp8_context->mocs; - gpe_surface.format = format; - - gpe->context_add_surface(gpe_context, &gpe_surface, index); - i965_free_gpe_resource(&gpe_resource); -} - -static void -i965_add_adv_gpe_surface(VADriverContextP ctx, - struct intel_encoder_context *encoder_context, - struct i965_gpe_context *gpe_context, - struct object_surface *obj_surface, - int index) -{ - struct i965_encoder_vp8_context *vp8_context = encoder_context->vme_context; - struct i965_gpe_table *gpe = vp8_context->gpe_table; - struct i965_gpe_resource gpe_resource; - struct i965_gpe_surface gpe_surface; - - memset(&gpe_surface, 0, sizeof(gpe_surface)); - - i965_object_surface_to_2d_gpe_resource(&gpe_resource, obj_surface); - gpe_surface.gpe_resource = &gpe_resource; - gpe_surface.is_adv_surface = 1; - gpe_surface.cacheability_control = vp8_context->mocs; - gpe_surface.v_direction = I965_VDIRECTION_FULL_FRAME; - - gpe->context_add_surface(gpe_context, &gpe_surface, index); - i965_free_gpe_resource(&gpe_resource); -} - -static void -i965_add_buffer_gpe_surface(VADriverContextP ctx, - struct intel_encoder_context *encoder_context, - struct i965_gpe_context *gpe_context, - struct i965_gpe_resource *gpe_buffer, - int is_raw_buffer, - unsigned int size, - unsigned int offset, - int index) -{ - struct i965_encoder_vp8_context *vp8_context = encoder_context->vme_context; - struct i965_gpe_table *gpe = vp8_context->gpe_table; - struct i965_gpe_surface gpe_surface; - - memset(&gpe_surface, 0, sizeof(gpe_surface)); - - gpe_surface.gpe_resource = gpe_buffer; - gpe_surface.is_buffer = 1; - gpe_surface.is_raw_buffer = !!is_raw_buffer; - gpe_surface.cacheability_control = vp8_context->mocs; - gpe_surface.size = size; - gpe_surface.offset = offset; - - gpe->context_add_surface(gpe_context, &gpe_surface, index); -} - -static void -i965_add_buffer_2d_gpe_surface(VADriverContextP ctx, - struct intel_encoder_context *encoder_context, - struct i965_gpe_context *gpe_context, - struct i965_gpe_resource *gpe_buffer, - int is_media_block_rw, - unsigned int format, - int index) -{ - struct i965_encoder_vp8_context *vp8_context = encoder_context->vme_context; - struct i965_gpe_table *gpe = vp8_context->gpe_table; - struct i965_gpe_surface gpe_surface; - - memset(&gpe_surface, 0, sizeof(gpe_surface)); - - gpe_surface.gpe_resource = gpe_buffer; - gpe_surface.is_2d_surface = 1; - gpe_surface.is_media_block_rw = !!is_media_block_rw; - gpe_surface.cacheability_control = vp8_context->mocs; - gpe_surface.format = format; - - gpe->context_add_surface(gpe_context, &gpe_surface, index); -} - -static void i965_add_dri_buffer_gpe_surface(VADriverContextP ctx, struct intel_encoder_context *encoder_context, struct i965_gpe_context *gpe_context, @@ -1595,7 +1492,6 @@ i965_add_dri_buffer_gpe_surface(VADriverContextP ctx, i965_dri_object_to_buffer_gpe_resource(&gpe_resource, bo); i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &gpe_resource, is_raw_buffer, @@ -1622,7 +1518,6 @@ i965_add_dri_buffer_2d_gpe_surface(VADriverContextP ctx, i965_dri_object_to_2d_gpe_resource(&gpe_resource, bo, width, height, pitch); i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &gpe_resource, is_media_block_rw, @@ -2533,7 +2428,6 @@ i965_encoder_vp8_vme_brc_init_reset_add_surfaces(VADriverContextP ctx, struct i965_encoder_vp8_context *vp8_context = encoder_context->vme_context; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_history_buffer, 0, @@ -2542,7 +2436,6 @@ i965_encoder_vp8_vme_brc_init_reset_add_surfaces(VADriverContextP ctx, VP8_BTI_BRC_INIT_RESET_HISTORY); i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_distortion_buffer, 1, @@ -2644,7 +2537,6 @@ i965_encoder_vp8_vme_scaling_add_surfaces(VADriverContextP ctx, struct scaling_surface_parameters *params) { i965_add_2d_gpe_surface(ctx, - encoder_context, gpe_context, params->input_obj_surface, 0, @@ -2652,7 +2544,6 @@ i965_encoder_vp8_vme_scaling_add_surfaces(VADriverContextP ctx, I965_SURFACEFORMAT_R32_UNORM, VP8_BTI_SCALING_FRAME_SRC_Y); i965_add_2d_gpe_surface(ctx, - encoder_context, gpe_context, params->output_obj_surface, 0, @@ -2849,7 +2740,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, } i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, me_gpe_buffer, 1, @@ -2859,7 +2749,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, if (vp8_context->hme_16x_enabled) { me_gpe_buffer = &vp8_context->me_16x_mv_data_buffer; i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, me_gpe_buffer, 1, @@ -2870,7 +2759,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, if (!params->use_16x_me) { me_gpe_buffer = &vp8_context->me_4x_distortion_buffer; i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, me_gpe_buffer, 1, @@ -2879,7 +2767,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, me_gpe_buffer = me_brc_distortion_buffer; i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, me_gpe_buffer, 1, @@ -2897,7 +2784,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, } i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_VME_INTER_PRED); @@ -2917,7 +2803,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, if (obj_surface) { i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_ME_REF1_PIC); @@ -2942,7 +2827,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, case 2: case 6: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_ME_REF1_PIC); @@ -2951,7 +2835,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, case 3: case 7: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_ME_REF2_PIC); @@ -2977,7 +2860,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, switch (vp8_context->ref_frame_ctrl) { case 4: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_ME_REF1_PIC); @@ -2986,7 +2868,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, case 5: case 6: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_ME_REF2_PIC); @@ -2994,7 +2875,6 @@ i965_encoder_vp8_vme_me_add_surfaces(VADriverContextP ctx, case 7: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_ME_REF3_PIC); @@ -3603,7 +3483,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, /* Per MB output data buffer */ i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->mb_coded_buffer, 0, @@ -3613,7 +3492,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, /* Current input surface Y & UV */ i965_add_2d_gpe_surface(ctx, - encoder_context, gpe_context, encode_state->input_yuv_object, 0, @@ -3622,7 +3500,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, VP8_BTI_MBENC_CURR_Y); i965_add_2d_gpe_surface(ctx, - encoder_context, gpe_context, encode_state->input_yuv_object, 1, @@ -3632,7 +3509,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, /* Current surface for VME */ i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, encode_state->input_yuv_object, VP8_BTI_MBENC_VME); @@ -3661,7 +3537,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, /* Histogram buffer */ size = VP8_HISTOGRAM_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->histogram_buffer, 1, @@ -3671,7 +3546,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, if (vp8_context->frame_type == MPEG_I_PICTURE) { i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->mb_mode_cost_luma_buffer, 0, @@ -3679,7 +3553,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, VP8_BTI_MBENC_MB_MODE_COST_LUMA); i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->block_mode_cost_buffer, 0, @@ -3689,7 +3562,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, /* Chroma recon buffer */ size = vp8_context->frame_width_in_mbs * vp8_context->frame_height_in_mbs * 64; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->chroma_recon_buffer, 0, @@ -3699,7 +3571,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, if (params->i_frame_dist_in_use) { i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, params->me_brc_distortion_buffer, 1, @@ -3717,7 +3588,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, if (obj_surface) { i965_add_2d_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, 0, @@ -3726,7 +3596,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, VP8_BTI_MBENC_CURR_Y_DOWNSCALED); i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_MBENC_VME_COARSE_INTRA); @@ -3736,7 +3605,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, size = vp8_context->frame_width_in_mbs * vp8_context->frame_height_in_mbs * 64; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->mb_coded_buffer, 1, @@ -3746,7 +3614,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, if (vp8_context->hme_enabled) { i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->me_4x_mv_data_buffer, 1, @@ -3755,7 +3622,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, } i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->reference_frame_mb_count_buffer , 0, @@ -3764,7 +3630,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, VP8_BTI_MBENC_REF_MB_COUNT); i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, encode_state->input_yuv_object, VP8_BTI_MBENC_INTER_PRED); @@ -3779,7 +3644,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, case 5: case 7: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_MBENC_REF1_PIC); @@ -3795,7 +3659,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, case 2: case 6: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_MBENC_REF1_PIC); @@ -3804,7 +3667,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, case 3: case 7: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_MBENC_REF2_PIC); @@ -3819,7 +3681,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, switch (vp8_context->ref_frame_ctrl) { case 4: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_MBENC_REF1_PIC); @@ -3828,7 +3689,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, case 5: case 6: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_MBENC_REF2_PIC); @@ -3836,7 +3696,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, case 7: i965_add_adv_gpe_surface(ctx, - encoder_context, gpe_context, obj_surface, VP8_BTI_MBENC_REF3_PIC); @@ -3845,7 +3704,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, } i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->per_mb_quant_data_buffer, 1, @@ -3853,7 +3711,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, VP8_BTI_MBENC_P_PER_MB_QUANT); i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->me_4x_distortion_buffer, 0, @@ -3862,7 +3719,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, size = vp8_context->frame_width_in_mbs * vp8_context->frame_height_in_mbs * 16; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pred_mv_data_buffer, 0, @@ -3872,7 +3728,6 @@ i965_encoder_vp8_vme_mbenc_add_surfaces(VADriverContextP ctx, size = 16 * sizeof(unsigned int); i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->mode_cost_update_buffer, 1, @@ -4196,7 +4051,6 @@ i965_encoder_vp8_vme_brc_update_add_surfaces(VADriverContextP ctx, /* BRC history buffer */ size = VP8_BRC_HISTORY_BUFFER_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_history_buffer, 0, @@ -4207,7 +4061,6 @@ i965_encoder_vp8_vme_brc_update_add_surfaces(VADriverContextP ctx, /* PAK Statistics buffer */ size = sizeof(struct vp8_brc_pak_statistics); i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_pak_statistics_buffer, 0, @@ -4218,7 +4071,6 @@ i965_encoder_vp8_vme_brc_update_add_surfaces(VADriverContextP ctx, /* Encoder CFG command surface - read only */ size = VP8_BRC_IMG_STATE_SIZE_PER_PASS * VP8_BRC_MAXIMUM_NUM_PASSES; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_vp8_cfg_command_write_buffer, 0, @@ -4228,7 +4080,6 @@ i965_encoder_vp8_vme_brc_update_add_surfaces(VADriverContextP ctx, /* Encoder CFG command surface - write only */ i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_vp8_cfg_command_write_buffer, 0, @@ -4259,7 +4110,6 @@ i965_encoder_vp8_vme_brc_update_add_surfaces(VADriverContextP ctx, /* BRC Distortion data buffer - input/output */ i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, is_intra ? &vp8_context->brc_distortion_buffer : &vp8_context->me_4x_distortion_buffer, 1, @@ -4269,7 +4119,6 @@ i965_encoder_vp8_vme_brc_update_add_surfaces(VADriverContextP ctx, /* Constant Data Surface */ size = VP8_BRC_CONSTANT_DATA_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_vp8_constant_data_buffer, 0, @@ -4279,7 +4128,6 @@ i965_encoder_vp8_vme_brc_update_add_surfaces(VADriverContextP ctx, /* Segmap surface */ i965_add_buffer_2d_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_segment_map_buffer, 0, @@ -4599,7 +4447,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, /* Histogram buffer */ size = VP8_HISTOGRAM_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->histogram_buffer, 1, @@ -4610,7 +4457,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Reference mode probability size = VP8_MODE_PROPABILITIES_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_ref_mode_probs_buffer, 1, @@ -4620,7 +4466,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Mode probability i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_mode_probs_buffer, 1, @@ -4631,7 +4476,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Reference Token probability size = VP8_COEFFS_PROPABILITIES_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_ref_coeff_probs_buffer, 1, @@ -4641,7 +4485,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Token probability i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_coeff_probs_buffer, 1, @@ -4652,7 +4495,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Frame header size = VP8_FRAME_HEADER_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_frame_header_buffer, 0, @@ -4665,7 +4507,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, if (brc_enabled) { i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_vp8_cfg_command_write_buffer, 0, @@ -4674,7 +4515,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, VP8_BTI_MPU_HEADER_METADATA); } else { i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_picture_state_buffer, 0, @@ -4686,7 +4526,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Picture state MFX_VP8_PIC_STATE size = 38 * sizeof(unsigned int); i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_picture_state_buffer, 0, @@ -4697,7 +4536,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Mpu Bitstream size = VP8_MPU_BITSTREAM_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_mpu_bitstream_buffer, 0, @@ -4708,7 +4546,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Token bits Data Surface size = VP8_TOKEN_BITS_DATA_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_token_bits_data_buffer, 1, @@ -4719,7 +4556,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, // Entropy cost table size = VP8_ENTROPY_COST_TABLE_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_entropy_cost_table_buffer, 1, @@ -4730,7 +4566,6 @@ i965_encoder_vp8_vme_mpu_add_surfaces(VADriverContextP ctx, //Mode Cost Update Surface size = 16 * sizeof(unsigned int); i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->mode_cost_update_buffer, 0, @@ -5907,7 +5742,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Pak token statistics size = VP8_TOKEN_STATISTICS_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_pak_token_statistics_buffer, 1, @@ -5918,7 +5752,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Pak token Update flags size = VP8_COEFFS_PROPABILITIES_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_pak_token_update_flags_buffer, 0, @@ -5929,7 +5762,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Entropy cost size = VP8_ENTROPY_COST_TABLE_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_entropy_cost_table_buffer, 1, @@ -5940,7 +5772,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Frame header size = VP8_FRAME_HEADER_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_frame_header_buffer, 0, @@ -5951,7 +5782,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Default token token probability size = VP8_COEFFS_PROPABILITIES_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_default_token_probability_buffer, 0, @@ -5962,7 +5792,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Picture state surface size = VP8_PICTURE_STATE_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_picture_state_buffer, 0, @@ -5973,7 +5802,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // MPU Curbe info from TPU size = VP8_TOKEN_BITS_DATA_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_token_bits_data_buffer, 0, @@ -5986,7 +5814,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, if (brc_enabled) { i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->brc_vp8_cfg_command_write_buffer, 0, @@ -5995,7 +5822,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, VP8_BTI_TPU_HEADER_METADATA); } else { i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_picture_state_buffer, 0, @@ -6007,7 +5833,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Current frame token probability size = VP8_COEFFS_PROPABILITIES_SIZE; i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_coeff_probs_buffer, 0, @@ -6017,7 +5842,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Hardware token probability pass 1 i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_ref_coeff_probs_buffer, 0, @@ -6027,7 +5851,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // key frame token probability i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_updated_token_probability_buffer, 0, @@ -6037,7 +5860,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // update token probability i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_key_frame_token_probability_buffer, 0, @@ -6047,7 +5869,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Hardware token probability pass 2 i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_hw_token_probability_pak_pass_2_buffer, 0, @@ -6057,7 +5878,6 @@ i965_encoder_vp8_tpu_add_surfaces(VADriverContextP ctx, // Repak Decision i965_add_buffer_gpe_surface(ctx, - encoder_context, gpe_context, &vp8_context->pak_mpu_tpu_repak_decision_buffer, 0, diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c index 65f7763..32c30b4 100644 --- a/src/i965_gpe_utils.c +++ b/src/i965_gpe_utils.c @@ -2654,7 +2654,7 @@ i965_init_media_object_walker_parameter(struct gpe_encoder_kernel_walker_paramet } void -gen9_add_2d_gpe_surface(VADriverContextP ctx, +i965_add_2d_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct object_surface *obj_surface, int is_uv_surface, @@ -2688,7 +2688,7 @@ gen9_add_2d_gpe_surface(VADriverContextP ctx, } void -gen9_add_adv_gpe_surface(VADriverContextP ctx, +i965_add_adv_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct object_surface *obj_surface, int index) @@ -2711,7 +2711,7 @@ gen9_add_adv_gpe_surface(VADriverContextP ctx, } void -gen9_add_buffer_gpe_surface(VADriverContextP ctx, +i965_add_buffer_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct i965_gpe_resource *gpe_buffer, int is_raw_buffer, @@ -2736,7 +2736,7 @@ gen9_add_buffer_gpe_surface(VADriverContextP ctx, } void -gen9_add_buffer_2d_gpe_surface(VADriverContextP ctx, +i965_add_buffer_2d_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct i965_gpe_resource *gpe_buffer, int is_media_block_rw, @@ -2770,7 +2770,7 @@ gen9_add_dri_buffer_gpe_surface(VADriverContextP ctx, struct i965_gpe_resource gpe_resource; i965_dri_object_to_buffer_gpe_resource(&gpe_resource, bo); - gen9_add_buffer_gpe_surface(ctx, + i965_add_buffer_gpe_surface(ctx, gpe_context, &gpe_resource, is_raw_buffer, diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h index f9f607e..eaf6eb5 100644 --- a/src/i965_gpe_utils.h +++ b/src/i965_gpe_utils.h @@ -573,7 +573,7 @@ i965_init_media_object_walker_parameter(struct gpe_encoder_kernel_walker_paramet struct gpe_media_object_walker_parameter *walker_param); extern void -gen9_add_2d_gpe_surface(VADriverContextP ctx, +i965_add_2d_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct object_surface *obj_surface, int is_uv_surface, @@ -581,12 +581,12 @@ gen9_add_2d_gpe_surface(VADriverContextP ctx, unsigned int format, int index); extern void -gen9_add_adv_gpe_surface(VADriverContextP ctx, +i965_add_adv_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct object_surface *obj_surface, int index); extern void -gen9_add_buffer_gpe_surface(VADriverContextP ctx, +i965_add_buffer_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct i965_gpe_resource *gpe_buffer, int is_raw_buffer, @@ -594,7 +594,7 @@ gen9_add_buffer_gpe_surface(VADriverContextP ctx, unsigned int offset, int index); extern void -gen9_add_buffer_2d_gpe_surface(VADriverContextP ctx, +i965_add_buffer_2d_gpe_surface(VADriverContextP ctx, struct i965_gpe_context *gpe_context, struct i965_gpe_resource *gpe_buffer, int is_media_block_rw, -- 2.11.0