From 79abd1c27cf3436b94dc15adedf2e33167f96a8e Mon Sep 17 00:00:00 2001 From: Bruno Cardoso Lopes Date: Tue, 14 Jun 2011 05:11:46 +0000 Subject: [PATCH] Since ARM's prefetch implementation predicted the presence of a instruction cache prefetch and now that the info from "prefetch" to "ARMPreload" is present, only add a testcase for PLI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/prefetch.ll | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/test/CodeGen/ARM/prefetch.ll b/test/CodeGen/ARM/prefetch.ll index 03a6947699a..250a34e8b0e 100644 --- a/test/CodeGen/ARM/prefetch.ll +++ b/test/CodeGen/ARM/prefetch.ll @@ -64,3 +64,14 @@ entry: } declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind + +define void @t5(i8* %ptr) nounwind { +entry: +; ARM: t5: +; ARM: pli [r0] + +; THUMB2: t5: +; THUMB2: pli [r0] + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 0 ) + ret void +} -- 2.11.0