From 7dcf4a826ccdf01749b31b55af15ec0ba3b4079a Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 25 Jun 2009 01:05:06 +0000 Subject: [PATCH] Some reorg and additional comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74152 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrThumb.td | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index fd9ee2e8848..fc271ba40b0 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -132,6 +132,24 @@ def tPICADD : T1It<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp), "$cp:\n\tadd $dst, pc", [(set tGPR:$dst, (ARMpic_add tGPR:$lhs, imm:$cp))]>; +// PC relative add. +def tADDrPCi : T1I<(outs tGPR:$dst), (ins i32imm:$rhs), + "add $dst, pc, $rhs * 4", []>; + +// ADD rd, sp, #imm8 +// FIXME: hard code sp? +def tADDrSPi : T1I<(outs tGPR:$dst), (ins GPR:$sp, i32imm:$rhs), + "add $dst, $sp, $rhs * 4 @ addrspi", []>; + +// ADD sp, sp, #imm7 +// FIXME: hard code sp? +def tADDspi : T1It<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs), + "add $dst, $rhs * 4", []>; + +// FIXME: Make use of the following? +// ADD rm, sp, rm +// ADD sp, rm + //===----------------------------------------------------------------------===// // Control Flow Instructions. // @@ -303,15 +321,6 @@ let neverHasSideEffects = 1 in def tADDhirr : T1It<(outs tGPR:$dst), (ins GPR:$lhs, GPR:$rhs), "add $dst, $rhs @ addhirr", []>; -def tADDrPCi : T1I<(outs tGPR:$dst), (ins i32imm:$rhs), - "add $dst, pc, $rhs * 4", []>; - -def tADDrSPi : T1I<(outs tGPR:$dst), (ins GPR:$sp, i32imm:$rhs), - "add $dst, $sp, $rhs * 4 @ addrspi", []>; - -def tADDspi : T1It<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs), - "add $dst, $rhs * 4", []>; - let isCommutable = 1 in def tAND : T1It<(outs tGPR:$dst), (ins tGPR:$lhs, tGPR:$rhs), "and $dst, $rhs", -- 2.11.0