From 80d9802d9233de5c1033d938d297221321c1e8e8 Mon Sep 17 00:00:00 2001 From: Oliver Stannard Date: Thu, 27 Sep 2018 13:53:35 +0000 Subject: [PATCH] [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction This adds a new variant of the DC system instruction for persistent memory. Patch by Pablo Barrio! Differential revision: https://reviews.llvm.org/D52480 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343216 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64.td | 5 ++++- lib/Target/AArch64/AArch64InstrInfo.td | 2 ++ lib/Target/AArch64/AArch64Subtarget.h | 2 ++ lib/Target/AArch64/AArch64SystemOperands.td | 3 +++ lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 1 + lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp | 2 +- test/MC/AArch64/armv8.5a-persistent-memory.s | 7 +++++++ test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt | 7 +++++++ 8 files changed, 27 insertions(+), 2 deletions(-) create mode 100644 test/MC/AArch64/armv8.5a-persistent-memory.s create mode 100644 test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt diff --git a/lib/Target/AArch64/AArch64.td b/lib/Target/AArch64/AArch64.td index 8d2085030c0..c6a41d4ce55 100644 --- a/lib/Target/AArch64/AArch64.td +++ b/lib/Target/AArch64/AArch64.td @@ -217,6 +217,9 @@ def FeatureSpecCtrl : SubtargetFeature<"specctrl", "HasSpecCtrl", "true", def FeaturePredCtrl : SubtargetFeature<"predctrl", "HasPredCtrl", "true", "Enable execution and data prediction invalidation instructions" >; +def FeatureCacheDeepPersist : SubtargetFeature<"ccdp", "HasCCDP", + "true", "Enable Cache Clean to Point of Deep Persistence" >; + //===----------------------------------------------------------------------===// // Architectures. // @@ -236,7 +239,7 @@ def HasV8_4aOps : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true", def HasV8_5aOps : SubtargetFeature< "v8.5a", "HasV8_5aOps", "true", "Support ARM v8.5a instructions", [HasV8_4aOps, FeatureAltFPCmp, FeatureFRInt3264, FeatureSpecCtrl, - FeaturePredCtrl] + FeaturePredCtrl, FeatureCacheDeepPersist] >; //===----------------------------------------------------------------------===// diff --git a/lib/Target/AArch64/AArch64InstrInfo.td b/lib/Target/AArch64/AArch64InstrInfo.td index 1192fad94bd..004639e0b91 100644 --- a/lib/Target/AArch64/AArch64InstrInfo.td +++ b/lib/Target/AArch64/AArch64InstrInfo.td @@ -70,6 +70,8 @@ def HasSpecCtrl : Predicate<"Subtarget->hasSpecCtrl()">, AssemblerPredicate<"FeatureSpecCtrl", "specctrl">; def HasPredCtrl : Predicate<"Subtarget->hasPredCtrl()">, AssemblerPredicate<"FeaturePredCtrl", "predctrl">; +def HasCCDP : Predicate<"Subtarget->hasCCDP()">, + AssemblerPredicate<"FeatureCacheDeepPersist", "ccdp">; def IsLE : Predicate<"Subtarget->isLittleEndian()">; def IsBE : Predicate<"!Subtarget->isLittleEndian()">; def UseAlternateSExtLoadCVTF32 diff --git a/lib/Target/AArch64/AArch64Subtarget.h b/lib/Target/AArch64/AArch64Subtarget.h index cc901e1c644..d0be93ec79e 100644 --- a/lib/Target/AArch64/AArch64Subtarget.h +++ b/lib/Target/AArch64/AArch64Subtarget.h @@ -99,6 +99,7 @@ protected: bool HasFRInt3264 = false; bool HasSpecCtrl = false; bool HasPredCtrl = false; + bool HasCCDP = false; // HasZeroCycleRegMove - Has zero-cycle register mov instructions. bool HasZeroCycleRegMove = false; @@ -316,6 +317,7 @@ public: bool hasFRInt3264() const { return HasFRInt3264; } bool hasSpecCtrl() { return HasSpecCtrl; } bool hasPredCtrl() { return HasPredCtrl; } + bool hasCCDP() { return HasCCDP; } bool isLittleEndian() const { return IsLittle; } diff --git a/lib/Target/AArch64/AArch64SystemOperands.td b/lib/Target/AArch64/AArch64SystemOperands.td index 1b3887ed5e0..c6d29acd9f1 100644 --- a/lib/Target/AArch64/AArch64SystemOperands.td +++ b/lib/Target/AArch64/AArch64SystemOperands.td @@ -105,6 +105,9 @@ def : DC<"CISW", 0b000, 0b0111, 0b1110, 0b010>; let Requires = [{ {AArch64::HasV8_2aOps} }] in def : DC<"CVAP", 0b011, 0b0111, 0b1100, 0b001>; +let Requires = [{ {AArch64::FeatureCacheDeepPersist} }] in +def : DC<"CVADP", 0b011, 0b0111, 0b1101, 0b001>; + //===----------------------------------------------------------------------===// // IC (instruction cache maintenance) instruction options. //===----------------------------------------------------------------------===// diff --git a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index acbea2b5dcf..5648c9f469a 100644 --- a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -2757,6 +2757,7 @@ static const struct Extension { { "ras", {AArch64::FeatureRAS} }, { "lse", {AArch64::FeatureLSE} }, { "predctrl", {AArch64::FeaturePredCtrl} }, + { "ccdp", {AArch64::FeatureCacheDeepPersist} }, // FIXME: Unsupported extensions { "pan", {} }, diff --git a/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp b/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp index aa537abf6ab..da8b2812734 100644 --- a/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp +++ b/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp @@ -812,7 +812,7 @@ bool AArch64InstPrinter::printSysAlias(const MCInst *MI, } break; // DC aliases - case 4: case 6: case 10: case 11: case 12: case 14: + case 4: case 6: case 10: case 11: case 12: case 13: case 14: { const AArch64DC::DC *DC = AArch64DC::lookupDCByEncoding(Encoding); if (!DC || !DC->haveFeatures(STI.getFeatureBits())) diff --git a/test/MC/AArch64/armv8.5a-persistent-memory.s b/test/MC/AArch64/armv8.5a-persistent-memory.s new file mode 100644 index 00000000000..a77e1bc2d27 --- /dev/null +++ b/test/MC/AArch64/armv8.5a-persistent-memory.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ccdp < %s | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-ccdp < %s 2>&1 | FileCheck %s --check-prefix=NOCCDP + +dc cvadp, x7 +// CHECK: dc cvadp, x7 // encoding: [0x27,0x7d,0x0b,0xd5] +// NOCCDP: error: DC CVADP requires ccdp diff --git a/test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt b/test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt new file mode 100644 index 00000000000..7e07992b6d8 --- /dev/null +++ b/test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt @@ -0,0 +1,7 @@ +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+ccdp --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.5a --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=-ccdp --disassemble < %s | FileCheck %s --check-prefix=NOCCDP + +[0x27,0x7d,0x0b,0xd5] +# CHECK: dc cvadp, x7 +# NOCCDP: sys #3, c7, c13, #1, x7 -- 2.11.0