From 8175a1d583900f3f992ab0dcd6ecf97a7dc04461 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Thu, 4 May 2017 19:14:54 +0000 Subject: [PATCH] [PPC] When restoring R30 (PIC base pointer), mark it as This happened on the PPC32/SVR4 path and was discovered when building FreeBSD on PPC32. It was a typo-class error in the frame lowering code. This fixes PR26519. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302183 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCFrameLowering.cpp | 3 +-- test/CodeGen/PowerPC/restore-r30.ll | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/PowerPC/restore-r30.ll diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index 2a402deccbc..40bfe3a449f 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -1459,8 +1459,7 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF, } if (FI->usesPICBase()) - BuildMI(MBB, MBBI, dl, LoadInst) - .addReg(PPC::R30) + BuildMI(MBB, MBBI, dl, LoadInst, PPC::R30) .addImm(PBPOffset) .addReg(RBReg); diff --git a/test/CodeGen/PowerPC/restore-r30.ll b/test/CodeGen/PowerPC/restore-r30.ll new file mode 100644 index 00000000000..216d5a70934 --- /dev/null +++ b/test/CodeGen/PowerPC/restore-r30.ll @@ -0,0 +1,30 @@ +; RUN: llc -march=ppc32 -relocation-model=pic < %s | FileCheck %s + +; The load restoring r30 at the end of the function was placed out of order +; relative to its uses as the PIC base pointer. +; This was because the r30 operand was not marked as "def" which allowed +; the post-RA scheduler to move it over other uses of r30. + +; CHECK-LABEL: fred +; CHECK: lwz 30, 24(1) +; R30 should not appear in an instruction after it's been restored. +; CHECK-NOT: 30, + +target datalayout = "E-m:e-p:32:32-i64:64-n32" +target triple = "powerpc" + +define double @fred(i64 %a) #0 { +entry: + %0 = lshr i64 %a, 32 + %conv = trunc i64 %0 to i32 + %conv1 = sitofp i32 %conv to double + %mul = fmul double %conv1, 0x41F0000000000000 + %and = and i64 %a, 4294967295 + %or = or i64 %and, 4841369599423283200 + %sub = fadd double %mul, 0xC330000000000000 + %1 = bitcast i64 %or to double + %add = fadd double %sub, %1 + ret double %add +} + +attributes #0 = { norecurse nounwind readnone "target-cpu"="ppc" "use-soft-float"="false" } -- 2.11.0