From 8327af281d292524822bae5388d76742750e63b5 Mon Sep 17 00:00:00 2001 From: Vandita Kulkarni Date: Thu, 29 Nov 2018 16:12:23 +0200 Subject: [PATCH] drm/i915/icl: Add get config functionality for DSI This patch implements the functionality for getting PIPE configuration to which DSI encoder is connected. Use the same method to get port clock like other DDI encoders. Used during the atomic modeset. v2 by Jani: - Squash Madhav's and Vandita's get config bits together - Move cnl_calc_wrpll_link() to intel_drv.h - Drop extra temp variables - Use enc_to_intel_dsi() instead of open coding Co-developed-by: Madhav Chauhan Signed-off-by: Vandita Kulkarni Signed-off-by: Madhav Chauhan Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/f21fa4258068d04582f2bf30735e5536a8043bdf.1543500286.git.jani.nikula@intel.com --- drivers/gpu/drm/i915/icl_dsi.c | 15 +++++++++++++++ drivers/gpu/drm/i915/intel_ddi.c | 4 ++-- drivers/gpu/drm/i915/intel_drv.h | 2 ++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 43a4d19e36d8..fba68e1e1bd4 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -1060,6 +1060,20 @@ static void gen11_dsi_disable(struct intel_encoder *encoder, gen11_dsi_disable_io_power(encoder); } +static void gen11_dsi_get_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 pll_id; + + /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */ + pll_id = intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll); + pipe_config->port_clock = cnl_calc_wrpll_link(dev_priv, pll_id); + pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk; + pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); +} + static void gen11_dsi_encoder_destroy(struct drm_encoder *encoder) { intel_encoder_destroy(encoder); @@ -1173,6 +1187,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv) encoder->pre_enable = gen11_dsi_pre_enable; encoder->disable = gen11_dsi_disable; encoder->port = port; + encoder->get_config = gen11_dsi_get_config; encoder->type = INTEL_OUTPUT_DSI; encoder->cloneable = 0; encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 6308d0f151e1..f3e1d6a0b7dd 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1364,8 +1364,8 @@ static int skl_calc_wrpll_link(struct drm_i915_private *dev_priv, return dco_freq / (p0 * p1 * p2 * 5); } -static int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, - enum intel_dpll_id pll_id) +int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, + enum intel_dpll_id pll_id) { uint32_t cfgcr0, cfgcr1; uint32_t p0, p1, p2, dco_freq, ref_clock; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 04b9545994f2..f94a04b4ad87 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1535,6 +1535,8 @@ u8 intel_ddi_dp_pre_emphasis_max(struct intel_encoder *encoder, int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder, bool enable); void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); +int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, + enum intel_dpll_id pll_id); unsigned int intel_fb_align_height(const struct drm_framebuffer *fb, int color_plane, unsigned int height); -- 2.11.0