From 864cc419eb0a418827620afd42879698cb149088 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Tapani=20P=C3=A4lli?= Date: Mon, 17 Dec 2018 14:17:15 +0200 Subject: [PATCH] intel/isl: move tiled_memcpy static libs from i965 to isl MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Patch moves intel_tiled_memcpy[_sse41] libraries to isl, renames some functions and types and makes the required build system changes for meson, automake and Android. No functional changes are introduced. v2: code cleanups, move isl_get_memcpy_type to i965 (Jason) v3: move isl_mem_copy_fn to priv header, cleanups (Jason, Dylan) Signed-off-by: Tapani Pälli Reviewed-by: Jason Ekstrand Reviewed-by: Dylan Baker Acked-by: Kenneth Graunke --- src/intel/Android.isl.mk | 51 +++++++- src/intel/Makefile.isl.am | 22 +++- src/intel/Makefile.sources | 9 ++ src/intel/isl/isl.c | 46 +++++++ src/intel/isl/isl.h | 32 +++++ src/intel/isl/isl_priv.h | 39 ++++++ .../isl/isl_tiled_memcpy.c} | 62 ++++----- .../isl/isl_tiled_memcpy_normal.c} | 30 ++--- .../isl/isl_tiled_memcpy_sse41.c} | 31 +++-- src/intel/isl/meson.build | 35 +++++- src/mesa/drivers/dri/i965/Android.mk | 39 ------ src/mesa/drivers/dri/i965/Makefile.am | 18 --- src/mesa/drivers/dri/i965/Makefile.sources | 11 -- src/mesa/drivers/dri/i965/intel_buffer_objects.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 87 ++++++++++--- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4 + src/mesa/drivers/dri/i965/intel_pixel_read.c | 8 +- src/mesa/drivers/dri/i965/intel_tex_image.c | 19 +-- src/mesa/drivers/dri/i965/intel_tiled_memcpy.h | 139 --------------------- .../drivers/dri/i965/intel_tiled_memcpy_sse41.h | 59 --------- src/mesa/drivers/dri/i965/meson.build | 38 +----- 21 files changed, 381 insertions(+), 401 deletions(-) rename src/{mesa/drivers/dri/i965/intel_tiled_memcpy.c => intel/isl/isl_tiled_memcpy.c} (96%) rename src/{mesa/drivers/dri/i965/intel_tiled_memcpy_normal.c => intel/isl/isl_tiled_memcpy_normal.c} (66%) rename src/{mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.c => intel/isl/isl_tiled_memcpy_sse41.c} (64%) delete mode 100644 src/mesa/drivers/dri/i965/intel_tiled_memcpy.h delete mode 100644 src/mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.h diff --git a/src/intel/Android.isl.mk b/src/intel/Android.isl.mk index 23cff55d251..07a64b8ed1c 100644 --- a/src/intel/Android.isl.mk +++ b/src/intel/Android.isl.mk @@ -199,6 +199,47 @@ include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) # --------------------------------------- +# Build libmesa_isl_tiled_memcpy +# --------------------------------------- + +include $(CLEAR_VARS) + +LOCAL_MODULE := libmesa_isl_tiled_memcpy + +LOCAL_C_INCLUDES := \ + $(MESA_TOP)/src/gallium/include \ + $(MESA_TOP)/src/mapi \ + $(MESA_TOP)/src/mesa + +LOCAL_SRC_FILES := $(ISL_TILED_MEMCPY_FILES) + +include $(MESA_COMMON_MK) +include $(BUILD_STATIC_LIBRARY) + +# --------------------------------------- +# Build libmesa_isl_tiled_memcpy_sse41 +# --------------------------------------- + +ifeq ($(ARCH_X86_HAVE_SSE4_1),true) +include $(CLEAR_VARS) + +LOCAL_MODULE := libmesa_isl_tiled_memcpy_sse41 + +LOCAL_C_INCLUDES := \ + $(MESA_TOP)/src/gallium/include \ + $(MESA_TOP)/src/mapi \ + $(MESA_TOP)/src/mesa + +LOCAL_SRC_FILES := $(ISL_TILED_MEMCPY_SSE41_FILES) + +LOCAL_CFLAGS += \ + -DUSE_SSE41 -msse4.1 -mstackrealign + +include $(MESA_COMMON_MK) +include $(BUILD_STATIC_LIBRARY) +endif + +# --------------------------------------- # Build libmesa_isl # --------------------------------------- @@ -227,7 +268,15 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \ libmesa_isl_gen9 \ libmesa_isl_gen10 \ libmesa_isl_gen11 \ - libmesa_genxml + libmesa_genxml \ + libmesa_isl_tiled_memcpy + +ifeq ($(ARCH_X86_HAVE_SSE4_1),true) +LOCAL_CFLAGS += \ + -DUSE_SSE41 +LOCAL_WHOLE_STATIC_LIBRARIES += \ + libmesa_isl_tiled_memcpy_sse41 +endif # Autogenerated sources diff --git a/src/intel/Makefile.isl.am b/src/intel/Makefile.isl.am index f51294468cd..a6733f3ba8e 100644 --- a/src/intel/Makefile.isl.am +++ b/src/intel/Makefile.isl.am @@ -31,11 +31,26 @@ ISL_GEN_LIBS = \ isl/libisl-gen11.la \ $(NULL) -noinst_LTLIBRARIES += $(ISL_GEN_LIBS) isl/libisl.la +noinst_LTLIBRARIES += $(ISL_GEN_LIBS) \ + isl/libisl.la \ + libisl_tiled_memcpy.la \ + libisl_tiled_memcpy_sse41.la + +isl_libisl_la_LIBADD = $(ISL_GEN_LIBS) \ + libisl_tiled_memcpy.la \ + libisl_tiled_memcpy_sse41.la -isl_libisl_la_LIBADD = $(ISL_GEN_LIBS) isl_libisl_la_SOURCES = $(ISL_FILES) $(ISL_GENERATED_FILES) +libisl_tiled_memcpy_la_SOURCES = $(ISL_TILED_MEMCPY_FILES) +libisl_tiled_memcpy_la_CFLAGS = $(AM_CFLAGS) + +libisl_tiled_memcpy_sse41_la_SOURCES = $(ISL_TILED_MEMCPY_SSE41_FILES) +libisl_tiled_memcpy_sse41_la_CFLAGS = $(AM_CFLAGS) $(SSE41_CFLAGS) + +isl_tiled_memcpy_normal.c: $(ISL_TILED_MEMCPY_DEP_FILES) +isl_tiled_memcpy_sse41.c: $(ISL_TILED_MEMCPY_DEP_FILES) + isl_libisl_gen4_la_SOURCES = $(ISL_GEN4_FILES) isl_libisl_gen4_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=40 @@ -90,4 +105,5 @@ isl_tests_isl_surf_get_image_offset_test_LDADD = \ EXTRA_DIST += \ isl/gen_format_layout.py \ isl/isl_format_layout.csv \ - isl/README + isl/README \ + $(ISL_TILED_MEMCPY_DEP_FILES) diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources index fe06a57b42e..94a28d370e8 100644 --- a/src/intel/Makefile.sources +++ b/src/intel/Makefile.sources @@ -219,6 +219,15 @@ ISL_GEN11_FILES = \ ISL_GENERATED_FILES = \ isl/isl_format_layout.c +ISL_TILED_MEMCPY_FILES = \ + isl/isl_tiled_memcpy_normal.c + +ISL_TILED_MEMCPY_SSE41_FILES = \ + isl/isl_tiled_memcpy_sse41.c + +ISL_TILED_MEMCPY_DEP_FILES = \ + isl/isl_tiled_memcpy.c + VULKAN_FILES := \ vulkan/anv_allocator.c \ vulkan/anv_android.h \ diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 359293cfcb2..7bb0fce3b60 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -35,6 +35,52 @@ #include "isl_gen9.h" #include "isl_priv.h" +void +isl_memcpy_linear_to_tiled(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + uint32_t dst_pitch, int32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type) +{ +#ifdef USE_SSE41 + if (copy_type == ISL_MEMCPY_STREAMING_LOAD) { + _isl_memcpy_linear_to_tiled_sse41( + xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, + tiling, copy_type); + return; + } +#endif + + _isl_memcpy_linear_to_tiled( + xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, + tiling, copy_type); +} + +void +isl_memcpy_tiled_to_linear(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + int32_t dst_pitch, uint32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type) +{ +#ifdef USE_SSE41 + if (copy_type == ISL_MEMCPY_STREAMING_LOAD) { + _isl_memcpy_tiled_to_linear_sse41( + xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, + tiling, copy_type); + return; + } +#endif + + _isl_memcpy_tiled_to_linear( + xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, + tiling, copy_type); +} + void PRINTFLIKE(3, 4) UNUSED __isl_finishme(const char *file, int line, const char *fmt, ...) { diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index d53c69adbde..cfac922a3d2 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -949,6 +949,12 @@ enum isl_msaa_layout { ISL_MSAA_LAYOUT_ARRAY, }; +typedef enum { + ISL_MEMCPY = 0, + ISL_MEMCPY_BGRA8, + ISL_MEMCPY_STREAMING_LOAD, + ISL_MEMCPY_INVALID, +} isl_memcpy_type; struct isl_device { const struct gen_device_info *info; @@ -2065,6 +2071,32 @@ uint32_t isl_surf_get_depth_format(const struct isl_device *dev, const struct isl_surf *surf); +/** + * @brief performs a copy from linear to tiled surface + * + */ +void +isl_memcpy_linear_to_tiled(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + uint32_t dst_pitch, int32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + +/** + * @brief performs a copy from tiled to linear surface + * + */ +void +isl_memcpy_tiled_to_linear(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + int32_t dst_pitch, uint32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + #ifdef __cplusplus } #endif diff --git a/src/intel/isl/isl_priv.h b/src/intel/isl/isl_priv.h index 871518409ee..993ae13473d 100644 --- a/src/intel/isl/isl_priv.h +++ b/src/intel/isl/isl_priv.h @@ -25,6 +25,7 @@ #define ISL_PRIV_H #include +#include #include #include "dev/gen_device_info.h" @@ -47,6 +48,8 @@ __isl_finishme(const char *file, int line, const char *fmt, ...); #define MIN(a, b) ((a) < (b) ? (a) : (b)) #define MAX(a, b) ((a) > (b) ? (a) : (b)) +typedef void *(*isl_mem_copy_fn)(void *dest, const void *src, size_t n); + static inline bool isl_is_pow2(uintmax_t n) { @@ -158,6 +161,42 @@ isl_extent3d_el_to_sa(enum isl_format fmt, struct isl_extent3d extent_el) }; } +void +_isl_memcpy_linear_to_tiled(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + uint32_t dst_pitch, int32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + +void +_isl_memcpy_tiled_to_linear(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + int32_t dst_pitch, uint32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + +void +_isl_memcpy_linear_to_tiled_sse41(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + uint32_t dst_pitch, int32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + +void +_isl_memcpy_tiled_to_linear_sse41(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + int32_t dst_pitch, uint32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type); + /* This is useful for adding the isl_prefix to genX functions */ #define __PASTE2(x, y) x ## y #define __PASTE(x, y) __PASTE2(x, y) diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c b/src/intel/isl/isl_tiled_memcpy.c similarity index 96% rename from src/mesa/drivers/dri/i965/intel_tiled_memcpy.c rename to src/intel/isl/isl_tiled_memcpy.c index f9cc020d338..7df7835f9ab 100644 --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c +++ b/src/intel/isl/isl_tiled_memcpy.c @@ -32,9 +32,9 @@ #include #include "util/macros.h" +#include "main/macros.h" -#include "brw_context.h" -#include "intel_tiled_memcpy.h" +#include "isl_priv.h" #if defined(__SSSE3__) #include @@ -230,7 +230,7 @@ typedef void (*tile_copy_fn)(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t linear_pitch, uint32_t swizzle_bit, - mem_copy_fn_type copy_type); + isl_memcpy_type copy_type); /** * Copy texture data from linear to X tile layout. @@ -249,8 +249,8 @@ linear_to_xtiled(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t src_pitch, uint32_t swizzle_bit, - mem_copy_fn mem_copy, - mem_copy_fn mem_copy_align16) + isl_mem_copy_fn mem_copy, + isl_mem_copy_fn mem_copy_align16) { /* The copy destination offset for each range copied is the sum of * an X offset 'x0' or 'xo' and a Y offset 'yo.' @@ -291,8 +291,8 @@ linear_to_ytiled(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t src_pitch, uint32_t swizzle_bit, - mem_copy_fn mem_copy, - mem_copy_fn mem_copy_align16) + isl_mem_copy_fn mem_copy, + isl_mem_copy_fn mem_copy_align16) { /* Y tiles consist of columns that are 'ytile_span' wide (and the same height * as the tile). Thus the destination offset for (x,y) is the sum of: @@ -413,8 +413,8 @@ xtiled_to_linear(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t dst_pitch, uint32_t swizzle_bit, - mem_copy_fn mem_copy, - mem_copy_fn mem_copy_align16) + isl_mem_copy_fn mem_copy, + isl_mem_copy_fn mem_copy_align16) { /* The copy destination offset for each range copied is the sum of * an X offset 'x0' or 'xo' and a Y offset 'yo.' @@ -455,8 +455,8 @@ ytiled_to_linear(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t dst_pitch, uint32_t swizzle_bit, - mem_copy_fn mem_copy, - mem_copy_fn mem_copy_align16) + isl_mem_copy_fn mem_copy, + isl_mem_copy_fn mem_copy_align16) { /* Y tiles consist of columns that are 'ytile_span' wide (and the same height * as the tile). Thus the destination offset for (x,y) is the sum of: @@ -591,21 +591,21 @@ _memcpy_streaming_load(void *dest, const void *src, size_t count) } #endif -static mem_copy_fn -choose_copy_function(mem_copy_fn_type copy_type) +static isl_mem_copy_fn +choose_copy_function(isl_memcpy_type copy_type) { switch(copy_type) { - case INTEL_COPY_MEMCPY: + case ISL_MEMCPY: return memcpy; - case INTEL_COPY_RGBA8: + case ISL_MEMCPY_BGRA8: return rgba8_copy; - case INTEL_COPY_STREAMING_LOAD: + case ISL_MEMCPY_STREAMING_LOAD: #if defined(INLINE_SSE41) return _memcpy_streaming_load; #else - unreachable("INTEL_COPY_STREAMING_LOAD requires sse4.1"); + unreachable("ISL_MEMCOPY_STREAMING_LOAD requires sse4.1"); #endif - case INTEL_COPY_INVALID: + case ISL_MEMCPY_INVALID: unreachable("invalid copy_type"); } unreachable("unhandled copy_type"); @@ -627,9 +627,9 @@ linear_to_xtiled_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t src_pitch, uint32_t swizzle_bit, - mem_copy_fn_type copy_type) + isl_memcpy_type copy_type) { - mem_copy_fn mem_copy = choose_copy_function(copy_type); + isl_mem_copy_fn mem_copy = choose_copy_function(copy_type); if (x0 == 0 && x3 == xtile_width && y0 == 0 && y1 == xtile_height) { if (mem_copy == memcpy) @@ -672,9 +672,9 @@ linear_to_ytiled_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t src_pitch, uint32_t swizzle_bit, - mem_copy_fn_type copy_type) + isl_memcpy_type copy_type) { - mem_copy_fn mem_copy = choose_copy_function(copy_type); + isl_mem_copy_fn mem_copy = choose_copy_function(copy_type); if (x0 == 0 && x3 == ytile_width && y0 == 0 && y1 == ytile_height) { if (mem_copy == memcpy) @@ -716,9 +716,9 @@ xtiled_to_linear_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t dst_pitch, uint32_t swizzle_bit, - mem_copy_fn_type copy_type) + isl_memcpy_type copy_type) { - mem_copy_fn mem_copy = choose_copy_function(copy_type); + isl_mem_copy_fn mem_copy = choose_copy_function(copy_type); if (x0 == 0 && x3 == xtile_width && y0 == 0 && y1 == xtile_height) { if (mem_copy == memcpy) @@ -772,9 +772,9 @@ ytiled_to_linear_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, char *dst, const char *src, int32_t dst_pitch, uint32_t swizzle_bit, - mem_copy_fn_type copy_type) + isl_memcpy_type copy_type) { - mem_copy_fn mem_copy = choose_copy_function(copy_type); + isl_mem_copy_fn mem_copy = choose_copy_function(copy_type); if (x0 == 0 && x3 == ytile_width && y0 == 0 && y1 == ytile_height) { if (mem_copy == memcpy) @@ -785,7 +785,7 @@ ytiled_to_linear_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, dst, src, dst_pitch, swizzle_bit, rgba8_copy, rgba8_copy_aligned_src); #if defined(INLINE_SSE41) - else if (copy_type == INTEL_COPY_STREAMING_LOAD) + else if (copy_type == ISL_MEMCPY_STREAMING_LOAD) return ytiled_to_linear(0, 0, ytile_width, ytile_width, 0, ytile_height, dst, src, dst_pitch, swizzle_bit, memcpy, _memcpy_streaming_load); @@ -801,7 +801,7 @@ ytiled_to_linear_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, dst, src, dst_pitch, swizzle_bit, rgba8_copy, rgba8_copy_aligned_src); #if defined(INLINE_SSE41) - else if (copy_type == INTEL_COPY_STREAMING_LOAD) + else if (copy_type == ISL_MEMCPY_STREAMING_LOAD) return ytiled_to_linear(x0, x1, x2, x3, y0, y1, dst, src, dst_pitch, swizzle_bit, memcpy, _memcpy_streaming_load); @@ -831,7 +831,7 @@ intel_linear_to_tiled(uint32_t xt1, uint32_t xt2, uint32_t dst_pitch, int32_t src_pitch, bool has_swizzling, enum isl_tiling tiling, - mem_copy_fn_type copy_type) + isl_memcpy_type copy_type) { tile_copy_fn tile_copy; uint32_t xt0, xt3; @@ -922,7 +922,7 @@ intel_tiled_to_linear(uint32_t xt1, uint32_t xt2, int32_t dst_pitch, uint32_t src_pitch, bool has_swizzling, enum isl_tiling tiling, - mem_copy_fn_type copy_type) + isl_memcpy_type copy_type) { tile_copy_fn tile_copy; uint32_t xt0, xt3; @@ -946,7 +946,7 @@ intel_tiled_to_linear(uint32_t xt1, uint32_t xt2, } #if defined(INLINE_SSE41) - if (copy_type == INTEL_COPY_STREAMING_LOAD) { + if (copy_type == ISL_MEMCPY_STREAMING_LOAD) { /* The hidden cacheline sized register used by movntdqa can apparently * give you stale data, so do an mfence to invalidate it. */ diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy_normal.c b/src/intel/isl/isl_tiled_memcpy_normal.c similarity index 66% rename from src/mesa/drivers/dri/i965/intel_tiled_memcpy_normal.c rename to src/intel/isl/isl_tiled_memcpy_normal.c index c246067541b..d55b93d04a0 100644 --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy_normal.c +++ b/src/intel/isl/isl_tiled_memcpy_normal.c @@ -30,29 +30,29 @@ */ -#include "intel_tiled_memcpy.c" +#include "isl_tiled_memcpy.c" void -linear_to_tiled(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - uint32_t dst_pitch, int32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type) +_isl_memcpy_linear_to_tiled(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + uint32_t dst_pitch, int32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type) { intel_linear_to_tiled(xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, tiling, copy_type); } void -tiled_to_linear(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - int32_t dst_pitch, uint32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type) +_isl_memcpy_tiled_to_linear(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + int32_t dst_pitch, uint32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type) { intel_tiled_to_linear(xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, tiling, copy_type); diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.c b/src/intel/isl/isl_tiled_memcpy_sse41.c similarity index 64% rename from src/mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.c rename to src/intel/isl/isl_tiled_memcpy_sse41.c index bc33ea11839..684a8a8dfa6 100644 --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.c +++ b/src/intel/isl/isl_tiled_memcpy_sse41.c @@ -31,30 +31,29 @@ #define INLINE_SSE41 -#include "intel_tiled_memcpy_sse41.h" -#include "intel_tiled_memcpy.c" +#include "isl_tiled_memcpy.c" void -linear_to_tiled_sse41(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - uint32_t dst_pitch, int32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type) +_isl_memcpy_linear_to_tiled_sse41(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + uint32_t dst_pitch, int32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type) { intel_linear_to_tiled(xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, tiling, copy_type); } void -tiled_to_linear_sse41(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - int32_t dst_pitch, uint32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type) +_isl_memcpy_tiled_to_linear_sse41(uint32_t xt1, uint32_t xt2, + uint32_t yt1, uint32_t yt2, + char *dst, const char *src, + int32_t dst_pitch, uint32_t src_pitch, + bool has_swizzling, + enum isl_tiling tiling, + isl_memcpy_type copy_type) { intel_tiled_to_linear(xt1, xt2, yt1, yt2, dst, src, dst_pitch, src_pitch, has_swizzling, tiling, copy_type); diff --git a/src/intel/isl/meson.build b/src/intel/isl/meson.build index a6374f6c4f3..79eb6686059 100644 --- a/src/intel/isl/meson.build +++ b/src/intel/isl/meson.build @@ -69,6 +69,39 @@ isl_format_layout_c = custom_target( command : [prog_python, '@INPUT0@', '--csv', '@INPUT1@', '--out', '@OUTPUT@'], ) +files_isl_tiled_memcpy = files( + 'isl_tiled_memcpy_normal.c' +) + +files_isl_tiled_memcpy_sse41 = files( + 'isl_tiled_memcpy_sse41.c', +) + +isl_tiled_memcpy = static_library( + 'isl_tiled_memcpy', + [files_isl_tiled_memcpy], + include_directories : [ + inc_common, inc_intel, inc_drm_uapi, + ], + c_args : [c_vis_args, no_override_init_args, '-msse2'], + extra_files : ['isl_tiled_memcpy.c'] +) + +if with_sse41 + isl_tiled_memcpy_sse41 = static_library( + 'isl_tiled_memcpy_sse41', + [files_isl_tiled_memcpy_sse41], + include_directories : [ + inc_common, inc_intel, inc_drm_uapi, + ], + link_args : ['-Wl,--exclude-libs=ALL'], + c_args : [c_vis_args, no_override_init_args, '-msse2', sse41_args], + extra_files : ['isl_tiled_memcpy.c'] + ) +else + isl_tiled_memcpy_sse41 = [] +endif + libisl_files = files( 'isl.c', 'isl.h', @@ -83,7 +116,7 @@ libisl = static_library( 'isl', [libisl_files, isl_format_layout_c, genX_bits_h], include_directories : [inc_common, inc_intel, inc_drm_uapi], - link_with : isl_gen_libs, + link_with : [isl_gen_libs, isl_tiled_memcpy, isl_tiled_memcpy_sse41], c_args : [c_vis_args, no_override_init_args], ) diff --git a/src/mesa/drivers/dri/i965/Android.mk b/src/mesa/drivers/dri/i965/Android.mk index a14f427dfb7..1574c8834c9 100644 --- a/src/mesa/drivers/dri/i965/Android.mk +++ b/src/mesa/drivers/dri/i965/Android.mk @@ -51,42 +51,6 @@ I965_PERGEN_LIBS := \ libmesa_i965_gen10 \ libmesa_i965_gen11 - -# --------------------------------------- -# Build libmesa_intel_tiled_memcpy -# --------------------------------------- - -include $(CLEAR_VARS) - -LOCAL_MODULE := libmesa_intel_tiled_memcpy - -LOCAL_C_INCLUDES := $(I965_PERGEN_COMMON_INCLUDES) - -LOCAL_SRC_FILES := $(intel_tiled_memcpy_FILES) - -include $(MESA_COMMON_MK) -include $(BUILD_STATIC_LIBRARY) - -# --------------------------------------- -# Build libmesa_intel_tiled_memcpy_sse41 -# --------------------------------------- - -ifeq ($(ARCH_X86_HAVE_SSE4_1),true) -include $(CLEAR_VARS) - -LOCAL_MODULE := libmesa_intel_tiled_memcpy_sse41 - -LOCAL_C_INCLUDES := $(I965_PERGEN_COMMON_INCLUDES) - -LOCAL_SRC_FILES := $(intel_tiled_memcpy_sse41_FILES) - -LOCAL_CFLAGS += \ - -DUSE_SSE41 -msse4.1 -mstackrealign - -include $(MESA_COMMON_MK) -include $(BUILD_STATIC_LIBRARY) -endif - # --------------------------------------- # Build libmesa_i965_gen4 # --------------------------------------- @@ -321,7 +285,6 @@ LOCAL_SRC_FILES := \ LOCAL_WHOLE_STATIC_LIBRARIES := \ $(MESA_DRI_WHOLE_STATIC_LIBRARIES) \ $(I965_PERGEN_LIBS) \ - libmesa_intel_tiled_memcpy \ libmesa_intel_dev \ libmesa_intel_common \ libmesa_isl \ @@ -331,8 +294,6 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \ ifeq ($(ARCH_X86_HAVE_SSE4_1),true) LOCAL_CFLAGS += \ -DUSE_SSE41 -LOCAL_WHOLE_STATIC_LIBRARIES += \ - libmesa_intel_tiled_memcpy_sse41 endif LOCAL_SHARED_LIBRARIES := \ diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am index 491d3c8f780..b562c6ea21c 100644 --- a/src/mesa/drivers/dri/i965/Makefile.am +++ b/src/mesa/drivers/dri/i965/Makefile.am @@ -93,20 +93,8 @@ libi965_gen11_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=110 noinst_LTLIBRARIES = \ libi965_dri.la \ - libintel_tiled_memcpy.la \ - libintel_tiled_memcpy_sse41.la \ $(I965_PERGEN_LIBS) -libintel_tiled_memcpy_la_SOURCES = \ - $(intel_tiled_memcpy_FILES) -libintel_tiled_memcpy_la_CFLAGS = \ - $(AM_CFLAGS) - -libintel_tiled_memcpy_sse41_la_SOURCES = \ - $(intel_tiled_memcpy_sse41_FILES) -libintel_tiled_memcpy_sse41_la_CFLAGS = \ - $(AM_CFLAGS) $(SSE41_CFLAGS) - libi965_dri_la_SOURCES = \ $(i965_FILES) \ $(i965_oa_GENERATED_FILES) @@ -117,8 +105,6 @@ libi965_dri_la_LIBADD = \ $(top_builddir)/src/intel/compiler/libintel_compiler.la \ $(top_builddir)/src/intel/blorp/libblorp.la \ $(I965_PERGEN_LIBS) \ - libintel_tiled_memcpy.la \ - libintel_tiled_memcpy_sse41.la \ $(LIBDRM_LIBS) BUILT_SOURCES = $(i965_oa_GENERATED_FILES) @@ -127,7 +113,6 @@ CLEANFILES = $(BUILT_SOURCES) EXTRA_DIST = \ brw_oa.py \ $(i965_oa_xml_FILES) \ - $(intel_tiled_memcpy_dep_FILES) \ meson.build brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES) @@ -137,6 +122,3 @@ brw_oa_metrics.c: brw_oa.py $(i965_oa_xml_FILES) $(i965_oa_xml_FILES:%=$(srcdir)/%) brw_oa_metrics.h: brw_oa_metrics.c - -intel_tiled_memcpy_normal.c: $(intel_tiled_memcpy_dep_FILES) -intel_tiled_memcpy_sse41.c: $(intel_tiled_memcpy_dep_FILES) diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index 043a70029f2..8e87c3dc490 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -113,17 +113,6 @@ i965_FILES = \ intel_upload.c \ libdrm_macros.h -intel_tiled_memcpy_FILES = \ - intel_tiled_memcpy_normal.c \ - intel_tiled_memcpy.h - -intel_tiled_memcpy_sse41_FILES = \ - intel_tiled_memcpy_sse41.c \ - intel_tiled_memcpy_sse41.h - -intel_tiled_memcpy_dep_FILES = \ - intel_tiled_memcpy.c - i965_gen4_FILES = \ genX_blorp_exec.c \ genX_state_upload.c diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c index 452e6d33c07..054ba6b22ff 100644 --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c @@ -40,7 +40,6 @@ #include "brw_blorp.h" #include "intel_buffer_objects.h" #include "intel_batchbuffer.h" -#include "intel_tiled_memcpy.h" static void mark_buffer_gpu_usage(struct intel_buffer_object *intel_obj, @@ -320,6 +319,8 @@ brw_buffer_subdata(struct gl_context *ctx, mark_buffer_valid_data(intel_obj, offset, size); } +/* Typedef for memcpy function (used in brw_get_buffer_subdata below). */ +typedef void *(*mem_copy_fn)(void *dest, const void *src, size_t n); /** * The GetBufferSubData() driver hook. diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index a679ddf3e48..b4e3524aa51 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -31,8 +31,6 @@ #include "intel_image.h" #include "intel_mipmap_tree.h" #include "intel_tex.h" -#include "intel_tiled_memcpy.h" -#include "intel_tiled_memcpy_sse41.h" #include "intel_blit.h" #include "intel_fbo.h" @@ -3126,9 +3124,9 @@ intel_miptree_unmap_tiled_memcpy(struct brw_context *brw, char *dst = intel_miptree_map_raw(brw, mt, map->mode | MAP_RAW); dst += mt->offset; - linear_to_tiled(x1, x2, y1, y2, dst, map->ptr, mt->surf.row_pitch_B, - map->stride, brw->has_swizzling, mt->surf.tiling, - INTEL_COPY_MEMCPY); + isl_memcpy_linear_to_tiled( + x1, x2, y1, y2, dst, map->ptr, mt->surf.row_pitch_B, map->stride, + brw->has_swizzling, mt->surf.tiling, ISL_MEMCPY); intel_miptree_unmap_raw(mt); } @@ -3136,6 +3134,66 @@ intel_miptree_unmap_tiled_memcpy(struct brw_context *brw, map->buffer = map->ptr = NULL; } +/** + * Determine which copy function to use for the given format combination + * + * The only two possible copy functions which are ever returned are a + * direct memcpy and a RGBA <-> BGRA copy function. Since RGBA -> BGRA and + * BGRA -> RGBA are exactly the same operation (and memcpy is obviously + * symmetric), it doesn't matter whether the copy is from the tiled image + * to the untiled or vice versa. The copy function required is the same in + * either case so this function can be used. + * + * \param[in] tiledFormat The format of the tiled image + * \param[in] format The GL format of the client data + * \param[in] type The GL type of the client data + * \param[out] mem_copy Will be set to one of either the standard + * library's memcpy or a different copy function + * that performs an RGBA to BGRA conversion + * \param[out] cpp Number of bytes per channel + * + * \return true if the format and type combination are valid + */ +MAYBE_UNUSED isl_memcpy_type +intel_miptree_get_memcpy_type(mesa_format tiledFormat, GLenum format, GLenum type, + uint32_t *cpp) +{ + if (type == GL_UNSIGNED_INT_8_8_8_8_REV && + !(format == GL_RGBA || format == GL_BGRA)) + return ISL_MEMCPY_INVALID; /* Invalid type/format combination */ + + if ((tiledFormat == MESA_FORMAT_L_UNORM8 && format == GL_LUMINANCE) || + (tiledFormat == MESA_FORMAT_A_UNORM8 && format == GL_ALPHA)) { + *cpp = 1; + return ISL_MEMCPY; + } else if ((tiledFormat == MESA_FORMAT_B8G8R8A8_UNORM) || + (tiledFormat == MESA_FORMAT_B8G8R8X8_UNORM) || + (tiledFormat == MESA_FORMAT_B8G8R8A8_SRGB) || + (tiledFormat == MESA_FORMAT_B8G8R8X8_SRGB)) { + *cpp = 4; + if (format == GL_BGRA) { + return ISL_MEMCPY; + } else if (format == GL_RGBA) { + return ISL_MEMCPY_BGRA8; + } + } else if ((tiledFormat == MESA_FORMAT_R8G8B8A8_UNORM) || + (tiledFormat == MESA_FORMAT_R8G8B8X8_UNORM) || + (tiledFormat == MESA_FORMAT_R8G8B8A8_SRGB) || + (tiledFormat == MESA_FORMAT_R8G8B8X8_SRGB)) { + *cpp = 4; + if (format == GL_BGRA) { + /* Copying from RGBA to BGRA is the same as BGRA to RGBA so we can + * use the same function. + */ + return ISL_MEMCPY_BGRA8; + } else if (format == GL_RGBA) { + return ISL_MEMCPY; + } + } + + return ISL_MEMCPY_INVALID; +} + static void intel_miptree_map_tiled_memcpy(struct brw_context *brw, struct intel_mipmap_tree *mt, @@ -3162,21 +3220,16 @@ intel_miptree_map_tiled_memcpy(struct brw_context *brw, char *src = intel_miptree_map_raw(brw, mt, map->mode | MAP_RAW); src += mt->offset; - const tiled_to_linear_fn ttl_func = -#if defined(USE_SSE41) - cpu_has_sse4_1 ? tiled_to_linear_sse41 : -#endif - tiled_to_linear; - - const mem_copy_fn_type copy_type = + const isl_memcpy_type copy_type = #if defined(USE_SSE41) - cpu_has_sse4_1 ? INTEL_COPY_STREAMING_LOAD : + cpu_has_sse4_1 ? ISL_MEMCPY_STREAMING_LOAD : #endif - INTEL_COPY_MEMCPY; + ISL_MEMCPY; - ttl_func(x1, x2, y1, y2, map->ptr, src, map->stride, - mt->surf.row_pitch_B, brw->has_swizzling, mt->surf.tiling, - copy_type); + isl_memcpy_tiled_to_linear( + x1, x2, y1, y2, map->ptr, src, map->stride, + mt->surf.row_pitch_B, brw->has_swizzling, mt->surf.tiling, + copy_type); intel_miptree_unmap_raw(mt); } diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 21beeded92a..17668944adc 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -726,6 +726,10 @@ intel_miptree_blt_pitch(struct intel_mipmap_tree *mt) return pitch; } +isl_memcpy_type +intel_miptree_get_memcpy_type(mesa_format tiledFormat, GLenum format, GLenum type, + uint32_t *cpp); + #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 537ac057a36..dfae6ff15f9 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -44,7 +44,6 @@ #include "intel_mipmap_tree.h" #include "intel_pixel.h" #include "intel_buffer_objects.h" -#include "intel_tiled_memcpy.h" #define FILE_DEBUG_FLAG DEBUG_PIXEL @@ -87,7 +86,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, struct brw_bo *bo; uint32_t cpp; - mem_copy_fn_type copy_type; + isl_memcpy_type copy_type; /* This fastpath is restricted to specific renderbuffer types: * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support @@ -125,7 +124,8 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, if (rb->_BaseFormat == GL_RGB) return false; - if (!intel_get_memcpy_type(rb->Format, format, type, ©_type, &cpp)) + copy_type = intel_miptree_get_memcpy_type(rb->Format, format, type, &cpp); + if (copy_type == ISL_MEMCPY_INVALID) return false; if (!irb->mt || @@ -198,7 +198,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, pack->Alignment, pack->RowLength, pack->SkipPixels, pack->SkipRows); - tiled_to_linear( + isl_memcpy_tiled_to_linear( xoffset * cpp, (xoffset + width) * cpp, yoffset, yoffset + height, pixels, diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 674fa1c6fbf..8d4ca7fed72 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -23,7 +23,6 @@ #include "intel_tex.h" #include "intel_fbo.h" #include "intel_image.h" -#include "intel_tiled_memcpy.h" #include "brw_context.h" #include "brw_blorp.h" @@ -192,7 +191,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, struct brw_bo *bo; uint32_t cpp; - mem_copy_fn_type copy_type; + isl_memcpy_type copy_type; /* This fastpath is restricted to specific texture types: * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support @@ -222,8 +221,9 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, if (ctx->_ImageTransferState) return false; - if (!intel_get_memcpy_type(texImage->TexFormat, format, type, ©_type, - &cpp)) + copy_type = intel_miptree_get_memcpy_type(texImage->TexFormat, format, type, + &cpp); + if (copy_type == ISL_MEMCPY_INVALID) return false; /* If this is a nontrivial texture view, let another path handle it instead. */ @@ -290,7 +290,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, xoffset += level_x; yoffset += level_y; - linear_to_tiled( + isl_memcpy_linear_to_tiled( xoffset * cpp, (xoffset + width) * cpp, yoffset, yoffset + height, map, @@ -685,7 +685,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, struct brw_bo *bo; uint32_t cpp; - mem_copy_fn_type copy_type; + isl_memcpy_type copy_type; /* This fastpath is restricted to specific texture types: * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support @@ -719,8 +719,9 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, if (texImage->_BaseFormat == GL_RGB) return false; - if (!intel_get_memcpy_type(texImage->TexFormat, format, type, ©_type, - &cpp)) + copy_type = intel_miptree_get_memcpy_type(texImage->TexFormat, format, type, + &cpp); + if (copy_type == ISL_MEMCPY_INVALID) return false; /* If this is a nontrivial texture view, let another path handle it instead. */ @@ -784,7 +785,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, xoffset += level_x; yoffset += level_y; - tiled_to_linear( + isl_memcpy_tiled_to_linear( xoffset * cpp, (xoffset + width) * cpp, yoffset, yoffset + height, pixels, diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h deleted file mode 100644 index 90aadf9e090..00000000000 --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * Mesa 3-D graphics library - * - * Copyright 2012 Intel Corporation - * Copyright 2013 Google - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Chad Versace - * Frank Henigman - */ - -#ifndef INTEL_TILED_MEMCPY_H -#define INTEL_TILED_MEMCPY_H - -#include -#include "main/mtypes.h" - -typedef enum { - INTEL_COPY_MEMCPY = 0, - INTEL_COPY_RGBA8, - INTEL_COPY_STREAMING_LOAD, - INTEL_COPY_INVALID, -} mem_copy_fn_type; - -typedef void *(*mem_copy_fn)(void *dest, const void *src, size_t n); - -typedef void (*tiled_to_linear_fn) - (uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - int32_t dst_pitch, uint32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type); - -void -linear_to_tiled(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - uint32_t dst_pitch, int32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type); - -void -tiled_to_linear(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - int32_t dst_pitch, uint32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type); - -/** - * Determine which copy function to use for the given format combination - * - * The only two possible copy functions which are ever returned are a - * direct memcpy and a RGBA <-> BGRA copy function. Since RGBA -> BGRA and - * BGRA -> RGBA are exactly the same operation (and memcpy is obviously - * symmetric), it doesn't matter whether the copy is from the tiled image - * to the untiled or vice versa. The copy function required is the same in - * either case so this function can be used. - * - * \param[in] tiledFormat The format of the tiled image - * \param[in] format The GL format of the client data - * \param[in] type The GL type of the client data - * \param[out] mem_copy Will be set to one of either the standard - * library's memcpy or a different copy function - * that performs an RGBA to BGRA conversion - * \param[out] cpp Number of bytes per channel - * - * \return true if the format and type combination are valid - */ -static MAYBE_UNUSED bool -intel_get_memcpy_type(mesa_format tiledFormat, GLenum format, GLenum type, - mem_copy_fn_type *copy_type, uint32_t *cpp) -{ - *copy_type = INTEL_COPY_INVALID; - - if (type == GL_UNSIGNED_INT_8_8_8_8_REV && - !(format == GL_RGBA || format == GL_BGRA)) - return false; /* Invalid type/format combination */ - - if ((tiledFormat == MESA_FORMAT_L_UNORM8 && format == GL_LUMINANCE) || - (tiledFormat == MESA_FORMAT_A_UNORM8 && format == GL_ALPHA)) { - *cpp = 1; - *copy_type = INTEL_COPY_MEMCPY; - } else if ((tiledFormat == MESA_FORMAT_B8G8R8A8_UNORM) || - (tiledFormat == MESA_FORMAT_B8G8R8X8_UNORM) || - (tiledFormat == MESA_FORMAT_B8G8R8A8_SRGB) || - (tiledFormat == MESA_FORMAT_B8G8R8X8_SRGB)) { - *cpp = 4; - if (format == GL_BGRA) { - *copy_type = INTEL_COPY_MEMCPY; - } else if (format == GL_RGBA) { - *copy_type = INTEL_COPY_RGBA8; - } - } else if ((tiledFormat == MESA_FORMAT_R8G8B8A8_UNORM) || - (tiledFormat == MESA_FORMAT_R8G8B8X8_UNORM) || - (tiledFormat == MESA_FORMAT_R8G8B8A8_SRGB) || - (tiledFormat == MESA_FORMAT_R8G8B8X8_SRGB)) { - *cpp = 4; - if (format == GL_BGRA) { - /* Copying from RGBA to BGRA is the same as BGRA to RGBA so we can - * use the same function. - */ - *copy_type = INTEL_COPY_RGBA8; - } else if (format == GL_RGBA) { - *copy_type = INTEL_COPY_MEMCPY; - } - } - - if (*copy_type == INTEL_COPY_INVALID) - return false; - - return true; -} - -#endif /* INTEL_TILED_MEMCPY */ diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.h b/src/mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.h deleted file mode 100644 index 5ddd6d01bb8..00000000000 --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy_sse41.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Mesa 3-D graphics library - * - * Copyright 2012 Intel Corporation - * Copyright 2013 Google - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Chad Versace - * Frank Henigman - */ - -#ifndef INTEL_TILED_MEMCPY_SSE41_H -#define INTEL_TILED_MEMCPY_SSE41_H - -#include -#include "main/mtypes.h" -#include "isl/isl.h" - -#include "intel_tiled_memcpy.h" - -void -linear_to_tiled_sse41(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - uint32_t dst_pitch, int32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type); - -void -tiled_to_linear_sse41(uint32_t xt1, uint32_t xt2, - uint32_t yt1, uint32_t yt2, - char *dst, const char *src, - int32_t dst_pitch, uint32_t src_pitch, - bool has_swizzling, - enum isl_tiling tiling, - mem_copy_fn_type copy_type); - -#endif /* INTEL_TILED_MEMCPY_SSE41_H */ diff --git a/src/mesa/drivers/dri/i965/meson.build b/src/mesa/drivers/dri/i965/meson.build index 3b71cf2605b..cd3683ae7ec 100644 --- a/src/mesa/drivers/dri/i965/meson.build +++ b/src/mesa/drivers/dri/i965/meson.build @@ -133,16 +133,6 @@ files_i965 = files( 'libdrm_macros.h', ) -files_intel_tiled_memcpy = files( - 'intel_tiled_memcpy_normal.c', - 'intel_tiled_memcpy.h', -) - -files_intel_tiled_memcpy_sse41 = files( - 'intel_tiled_memcpy_sse41.c', - 'intel_tiled_memcpy_sse41.h', -) - i965_gen_libs = [] foreach v : ['40', '45', '50', '60', '70', '75', '80', '90', '100', '110'] i965_gen_libs += static_library( @@ -184,32 +174,6 @@ i965_oa_sources = custom_target( ], ) -intel_tiled_memcpy = static_library( - 'intel_tiled_memcpy', - [files_intel_tiled_memcpy], - include_directories : [ - inc_common, inc_intel, inc_dri_common, inc_drm_uapi, - ], - c_args : [c_vis_args, no_override_init_args, '-msse2'], - extra_files : ['intel_tiled_memcpy.c'] -) - -if with_sse41 - intel_tiled_memcpy_sse41 = static_library( - 'intel_tiled_memcpy_sse41', - [files_intel_tiled_memcpy_sse41], - include_directories : [ - inc_common, inc_intel, inc_dri_common, inc_drm_uapi, - ], - link_args : ['-Wl,--exclude-libs=ALL'], - c_args : [c_vis_args, no_override_init_args, '-Wl,--exclude-libs=ALL', '-msse2', sse41_args], - extra_files : ['intel_tiled_memcpy.c'] - ) -else - intel_tiled_memcpy_sse41 = [] -endif - - libi965 = static_library( 'i965', [files_i965, i965_oa_sources, ir_expression_operation_h, @@ -221,7 +185,7 @@ libi965 = static_library( cpp_args : [cpp_vis_args, c_sse2_args], link_with : [ i965_gen_libs, libintel_common, libintel_dev, libisl, libintel_compiler, - libblorp, intel_tiled_memcpy, intel_tiled_memcpy_sse41 + libblorp ], dependencies : [dep_libdrm, dep_valgrind, idep_nir_headers], ) -- 2.11.0