From 86721de9e5e8124a365b966f0eddd7130cee507f Mon Sep 17 00:00:00 2001
From: Daniel Sanders <daniel_l_sanders@apple.com>
Date: Tue, 19 Sep 2017 12:56:36 +0000
Subject: [PATCH] [globalisel] Add support for intrinsic_w_chain.

This maps directly to G_INTRINSIC_W_SIDE_EFFECTS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313627 91177308-0d34-0410-b5e6-96231b3b80d8
---
 .../llvm/Target/GlobalISel/SelectionDAGCompat.td   |  1 +
 .../select-intrinsic-x86-flags-read-u32.mir        | 27 ++++++++++++++++++++++
 utils/TableGen/GlobalISelEmitter.cpp               |  8 ++++---
 3 files changed, 33 insertions(+), 3 deletions(-)
 create mode 100644 test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir

diff --git a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
index b7b9e73eaf6..212f2e3b269 100644
--- a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
+++ b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
@@ -66,6 +66,7 @@ def : GINodeEquiv<G_FPOW, fpow>;
 def : GINodeEquiv<G_FEXP2, fexp2>;
 def : GINodeEquiv<G_FLOG2, flog2>;
 def : GINodeEquiv<G_INTRINSIC, intrinsic_wo_chain>;
+def : GINodeEquiv<G_INTRINSIC_W_SIDE_EFFECTS, intrinsic_w_chain>;
 def : GINodeEquiv<G_BR, br>;
 
 // Specifies the GlobalISel equivalents for SelectionDAG's ComplexPattern.
diff --git a/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir b/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
new file mode 100644
index 00000000000..33ffc6e790c
--- /dev/null
+++ b/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
@@ -0,0 +1,27 @@
+# RUN: llc -mtriple=i386-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
+
+--- |
+  define void @read_flags() { ret void }
+...
+
+---
+# Check that we select a the x86.flags.read.u32 intrinsic into a RDFLAGS
+# instruction. Also check that we constrain the register class of the COPY to
+# gr32.
+# CHECK-LABEL: name: read_flags
+name:            read_flags
+legalized:       true
+regBankSelected: true
+
+# CHECK:      registers:
+# CHECK-NEXT:  - { id: 0, class: gr32, preferred-register: '' }
+registers:
+  - { id: 0, class: gpr }
+
+# CHECK:  body:
+# CHECK:    %0 = RDFLAGS32
+body:             |
+  bb.0:
+    %0(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.x86.flags.read.u32)
+    %rax = COPY %0(s32)
+...
diff --git a/utils/TableGen/GlobalISelEmitter.cpp b/utils/TableGen/GlobalISelEmitter.cpp
index 4e7d5dc5174..5a85503e710 100644
--- a/utils/TableGen/GlobalISelEmitter.cpp
+++ b/utils/TableGen/GlobalISelEmitter.cpp
@@ -2038,9 +2038,11 @@ GlobalISelEmitter::createAndImportSelDAGMatcher(InstructionMatcher &InsnMatcher,
     for (unsigned i = 0, e = Src->getNumChildren(); i != e; ++i) {
       TreePatternNode *SrcChild = Src->getChild(i);
 
-      // For G_INTRINSIC, the operand immediately following the defs is an
-      // intrinsic ID.
-      if (SrcGIOrNull->TheDef->getName() == "G_INTRINSIC" && i == 0) {
+      // For G_INTRINSIC/G_INTRINSIC_W_SIDE_EFFECTS, the operand immediately
+      // following the defs is an intrinsic ID.
+      if ((SrcGIOrNull->TheDef->getName() == "G_INTRINSIC" ||
+           SrcGIOrNull->TheDef->getName() == "G_INTRINSIC_W_SIDE_EFFECTS") &&
+          i == 0) {
         if (const CodeGenIntrinsic *II = Src->getIntrinsicInfo(CGP)) {
           OperandMatcher &OM =
               InsnMatcher.addOperand(OpIdx++, SrcChild->getName(), TempOpIdx);
-- 
2.11.0