From 887aef72f394b9f062de6c80b8ccf852b49dc5dd Mon Sep 17 00:00:00 2001 From: Eugene Zelenko Date: Tue, 10 Oct 2017 22:33:29 +0000 Subject: [PATCH] [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315380 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/AsmPrinter.h | 18 +--- include/llvm/CodeGen/MachineModuleInfoImpls.h | 11 +- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 33 +++--- lib/CodeGen/AsmPrinter/EHStreamer.cpp | 19 +++- lib/CodeGen/AsmPrinter/EHStreamer.h | 21 ++-- lib/CodeGen/BranchFolding.cpp | 12 ++- lib/CodeGen/BranchFolding.h | 41 +++++-- lib/CodeGen/LocalStackSlotAllocation.cpp | 34 +++--- lib/CodeGen/MachineFunction.cpp | 63 ++++++++--- lib/CodeGen/MachineModuleInfoImpls.cpp | 10 +- lib/CodeGen/PrologEpilogInserter.cpp | 55 +++++++--- lib/CodeGen/SafeStackColoring.cpp | 17 ++- lib/CodeGen/SafeStackColoring.h | 35 ++++-- lib/CodeGen/SafeStackLayout.cpp | 12 ++- lib/CodeGen/SafeStackLayout.h | 18 +++- lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 136 ++++++++++++++---------- lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 38 +++++-- lib/CodeGen/ShrinkWrap.cpp | 55 +++++++--- 18 files changed, 414 insertions(+), 214 deletions(-) diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index 0847f7cb6d9..d755f10b80f 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -43,11 +43,11 @@ class DIE; class DIEAbbrev; class DwarfDebug; class GCMetadataPrinter; +class GCStrategy; class GlobalIndirectSymbol; class GlobalObject; class GlobalValue; class GlobalVariable; -class GCStrategy; class MachineBasicBlock; class MachineConstantPoolValue; class MachineFunction; @@ -76,11 +76,9 @@ class TargetMachine; class AsmPrinter : public MachineFunctionPass { public: /// Target machine description. - /// TargetMachine &TM; /// Target Asm Printer information. - /// const MCAsmInfo *MAI; /// This is the context for the output file that we are streaming. This owns @@ -103,7 +101,6 @@ public: /// The symbol for the current function. This is recalculated at the beginning /// of each call to runOnMachineFunction(). - /// MCSymbol *CurrentFnSym = nullptr; /// The symbol used to represent the start of the current function for the @@ -128,8 +125,8 @@ private: void *GCMetadataPrinters = nullptr; // Really a DenseMap. /// Emit comments in assembly output if this is true. - /// bool VerboseAsm; + static char ID; /// If VerboseAsm is set, a pointer to the loop info for this function. @@ -149,6 +146,7 @@ private: TimerDescription(TimerDescription), TimerGroupName(TimerGroupName), TimerGroupDescription(TimerGroupDescription) {} }; + /// A vector of all debug/EH info emitters we should use. This vector /// maintains ownership of the emitters. SmallVector Handlers; @@ -187,11 +185,9 @@ public: bool isPositionIndependent() const; /// Return true if assembly output should contain comments. - /// bool isVerbose() const { return VerboseAsm; } /// Return a unique ID for the current function. - /// unsigned getFunctionNumber() const; MCSymbol *getFunctionBegin() const { return CurrentFnBegin; } @@ -266,7 +262,6 @@ public: //===------------------------------------------------------------------===// /// Record analysis usage. - /// void getAnalysisUsage(AnalysisUsage &AU) const override; /// Set up the AsmPrinter when we are working on a new module. If your pass @@ -311,12 +306,10 @@ public: /// Print to the current output stream assembly representations of the /// constants in the constant pool MCP. This is used to print out constants /// which have been "spilled to memory" by the code generator. - /// virtual void EmitConstantPool(); /// Print assembly representations of the jump tables used by the current /// function to the current output stream. - /// virtual void EmitJumpTableInfo(); /// Emit the specified global variable to the .s file. @@ -331,7 +324,6 @@ public: /// global value is specified, and if that global has an explicit alignment /// requested, it will override the alignment request if required for /// correctness. - /// void EmitAlignment(unsigned NumBits, const GlobalObject *GO = nullptr) const; /// Lower the specified LLVM Constant to an MCExpr. @@ -449,15 +441,12 @@ public: void printOffset(int64_t Offset, raw_ostream &OS) const; /// Emit a byte directive and value. - /// void EmitInt8(int Value) const; /// Emit a short directive and value. - /// void EmitInt16(int Value) const; /// Emit a long directive and value. - /// void EmitInt32(int Value) const; /// Emit something like ".long Hi-Lo" where the size in bytes of the directive @@ -632,6 +621,7 @@ private: void EmitModuleIdents(Module &M); void EmitXXStructorList(const DataLayout &DL, const Constant *List, bool isCtor); + GCMetadataPrinter *GetOrCreateGCPrinter(GCStrategy &C); /// Emit GlobalAlias or GlobalIFunc. void emitGlobalIndirectSymbol(Module &M, diff --git a/include/llvm/CodeGen/MachineModuleInfoImpls.h b/include/llvm/CodeGen/MachineModuleInfoImpls.h index 34b21ceddd4..6a87fa2fbf0 100644 --- a/include/llvm/CodeGen/MachineModuleInfoImpls.h +++ b/include/llvm/CodeGen/MachineModuleInfoImpls.h @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/MachineModuleInfoImpls.h -------------------*- C++ -*-===// +//===- llvm/CodeGen/MachineModuleInfoImpls.h --------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -15,11 +15,12 @@ #ifndef LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H #define LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H -#include "llvm/BinaryFormat/Wasm.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/CodeGen/MachineModuleInfo.h" -#include "llvm/CodeGen/ValueTypes.h" +#include namespace llvm { + class MCSymbol; /// MachineModuleInfoMachO - This is a MachineModuleInfoImpl implementation @@ -36,6 +37,7 @@ class MachineModuleInfoMachO : public MachineModuleInfoImpl { DenseMap ThreadLocalGVStubs; virtual void anchor(); // Out of line virtual method. + public: MachineModuleInfoMachO(const MachineModuleInfo &) {} @@ -64,6 +66,7 @@ class MachineModuleInfoELF : public MachineModuleInfoImpl { DenseMap GVStubs; virtual void anchor(); // Out of line virtual method. + public: MachineModuleInfoELF(const MachineModuleInfo &) {} @@ -79,4 +82,4 @@ public: } // end namespace llvm -#endif +#endif // LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 26ca58a76e4..75de005bea1 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -1,4 +1,4 @@ -//===-- AsmPrinter.cpp - Common AsmPrinter code ---------------------------===// +//===- AsmPrinter.cpp - Common AsmPrinter code ----------------------------===// // // The LLVM Compiler Infrastructure // @@ -29,10 +29,11 @@ #include "llvm/ADT/Triple.h" #include "llvm/ADT/Twine.h" #include "llvm/Analysis/ConstantFolding.h" +#include "llvm/Analysis/EHPersonalities.h" #include "llvm/Analysis/ObjectUtils.h" +#include "llvm/Analysis/OptimizationRemarkEmitter.h" #include "llvm/BinaryFormat/Dwarf.h" #include "llvm/BinaryFormat/ELF.h" -#include "llvm/CodeGen/Analysis.h" #include "llvm/CodeGen/GCMetadata.h" #include "llvm/CodeGen/GCMetadataPrinter.h" #include "llvm/CodeGen/GCStrategy.h" @@ -46,10 +47,12 @@ #include "llvm/CodeGen/MachineJumpTableInfo.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineMemOperand.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineModuleInfoImpls.h" #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h" #include "llvm/IR/BasicBlock.h" +#include "llvm/IR/Comdat.h" #include "llvm/IR/Constant.h" #include "llvm/IR/Constants.h" #include "llvm/IR/DataLayout.h" @@ -62,14 +65,17 @@ #include "llvm/IR/GlobalObject.h" #include "llvm/IR/GlobalValue.h" #include "llvm/IR/GlobalVariable.h" +#include "llvm/IR/Instruction.h" #include "llvm/IR/Mangler.h" #include "llvm/IR/Metadata.h" #include "llvm/IR/Module.h" #include "llvm/IR/Operator.h" +#include "llvm/IR/Type.h" #include "llvm/IR/Value.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCContext.h" #include "llvm/MC/MCDirectives.h" +#include "llvm/MC/MCDwarf.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCSection.h" @@ -78,11 +84,13 @@ #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCSymbolELF.h" #include "llvm/MC/MCTargetOptions.h" #include "llvm/MC/MCValue.h" #include "llvm/MC/SectionKind.h" #include "llvm/Pass.h" #include "llvm/Support/Casting.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Format.h" @@ -96,12 +104,15 @@ #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOpcodes.h" +#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" #include #include #include #include +#include #include #include #include @@ -130,7 +141,8 @@ static cl::opt char AsmPrinter::ID = 0; -typedef DenseMap> gcp_map_type; +using gcp_map_type = DenseMap>; + static gcp_map_type &getGCMap(void *&P) { if (!P) P = new gcp_map_type(); @@ -185,7 +197,6 @@ bool AsmPrinter::isPositionIndependent() const { } /// getFunctionNumber - Return a unique ID for the current function. -/// unsigned AsmPrinter::getFunctionNumber() const { return MF->getFunctionNumber(); } @@ -983,7 +994,6 @@ void AsmPrinter::EmitFunctionBody() { // Print a label for the basic block. EmitBasicBlockStart(MBB); for (auto &MI : MBB) { - // Print the assembly for the instruction. if (!MI.isPosition() && !MI.isImplicitDef() && !MI.isKill() && !MI.isDebugValue()) { @@ -1007,11 +1017,9 @@ void AsmPrinter::EmitFunctionBody() { case TargetOpcode::CFI_INSTRUCTION: emitCFIInstruction(MI); break; - case TargetOpcode::LOCAL_ESCAPE: emitFrameAlloc(MI); break; - case TargetOpcode::EH_LABEL: case TargetOpcode::GC_LABEL: OutStreamer->EmitLabel(MI.getOperand(0).getMCSymbol()); @@ -1458,7 +1466,6 @@ namespace { /// representations of the constants in the constant pool MCP. This is /// used to print out constants which have been "spilled to memory" by /// the code generator. -/// void AsmPrinter::EmitConstantPool() { const MachineConstantPool *MCP = MF->getConstantPool(); const std::vector &CP = MCP->getConstants(); @@ -1538,7 +1545,6 @@ void AsmPrinter::EmitConstantPool() { /// EmitJumpTableInfo - Print assembly representations of the jump tables used /// by the current function to the current output stream. -/// void AsmPrinter::EmitJumpTableInfo() { const DataLayout &DL = MF->getDataLayout(); const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); @@ -1735,7 +1741,7 @@ struct Structor { Structor() = default; }; -} // end anonymous namespace +} // end anonymous namespace /// EmitXXStructorList - Emit the ctor or dtor list taking into account the init /// priority. @@ -1830,13 +1836,11 @@ void AsmPrinter::EmitInt8(int Value) const { } /// EmitInt16 - Emit a short directive and value. -/// void AsmPrinter::EmitInt16(int Value) const { OutStreamer->EmitIntValue(Value, 2); } /// EmitInt32 - Emit a long directive and value. -/// void AsmPrinter::EmitInt32(int Value) const { OutStreamer->EmitIntValue(Value, 4); } @@ -1878,7 +1882,6 @@ void AsmPrinter::EmitLabelPlusOffset(const MCSymbol *Label, uint64_t Offset, // byte alignment. If a global value is specified, and if that global has // an explicit alignment requested, it will override the alignment request // if required for correctness. -// void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalObject *GV) const { if (GV) NumBits = getGVAlignmentLog2(GV, GV->getParent()->getDataLayout(), NumBits); @@ -2329,7 +2332,6 @@ static void handleIndirectSymViaGOTPCRel(AsmPrinter &AP, const MCExpr **ME, // // cstexpr := - + gotpcrelcst, where // gotpcrelcst := + - // MCValue MV; if (!(*ME)->evaluateAsRelocatable(MV, nullptr, nullptr) || MV.isAbsolute()) return; @@ -2360,7 +2362,6 @@ static void handleIndirectSymViaGOTPCRel(AsmPrinter &AP, const MCExpr **ME, // If gotpcrelcst is positive it means that we can safely fold the pc rel // displacement into the GOTPCREL. We can also can have an extra offset // if the target knows how to encode it. - // int64_t GOTPCRelCst = Offset + MV.getConstant(); if (GOTPCRelCst < 0) return; @@ -2382,7 +2383,6 @@ static void handleIndirectSymViaGOTPCRel(AsmPrinter &AP, const MCExpr **ME, // .long 42 // foo: // .long bar@GOTPCREL+ - // AsmPrinter::GOTEquivUsePair Result = AP.GlobalGOTEquivs[GOTEquivSym]; const GlobalVariable *GV = Result.first; int NumUses = (int)Result.second; @@ -2562,7 +2562,6 @@ static void PrintParentLoopComment(raw_ostream &OS, const MachineLoop *Loop, << " Depth=" << Loop->getLoopDepth() << '\n'; } - /// PrintChildLoopComment - Print comments about child loops within /// the loop for this basic block, with nesting. static void PrintChildLoopComment(raw_ostream &OS, const MachineLoop *Loop, diff --git a/lib/CodeGen/AsmPrinter/EHStreamer.cpp b/lib/CodeGen/AsmPrinter/EHStreamer.cpp index 8767da76ff9..0d7305b8997 100644 --- a/lib/CodeGen/AsmPrinter/EHStreamer.cpp +++ b/lib/CodeGen/AsmPrinter/EHStreamer.cpp @@ -1,4 +1,4 @@ -//===-- CodeGen/AsmPrinter/EHStreamer.cpp - Exception Directive Streamer --===// +//===- CodeGen/AsmPrinter/EHStreamer.cpp - Exception Directive Streamer ---===// // // The LLVM Compiler Infrastructure // @@ -12,22 +12,34 @@ //===----------------------------------------------------------------------===// #include "EHStreamer.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/Twine.h" +#include "llvm/ADT/iterator_range.h" +#include "llvm/BinaryFormat/Dwarf.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/MachineOperand.h" +#include "llvm/IR/DataLayout.h" #include "llvm/IR/Function.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCTargetOptions.h" +#include "llvm/Support/Casting.h" #include "llvm/Support/LEB128.h" #include "llvm/Target/TargetLoweringObjectFile.h" +#include +#include +#include +#include using namespace llvm; EHStreamer::EHStreamer(AsmPrinter *A) : Asm(A), MMI(Asm->MMI) {} -EHStreamer::~EHStreamer() {} +EHStreamer::~EHStreamer() = default; /// How many leading type ids two landing pads have in common. unsigned EHStreamer::sharedTypeIDs(const LandingPadInfo *L, @@ -50,7 +62,6 @@ unsigned EHStreamer:: computeActionsTable(const SmallVectorImpl &LandingPads, SmallVectorImpl &Actions, SmallVectorImpl &FirstActions) { - // The action table follows the call-site table in the LSDA. The individual // records are of two types: // diff --git a/lib/CodeGen/AsmPrinter/EHStreamer.h b/lib/CodeGen/AsmPrinter/EHStreamer.h index 080fdd14b46..7962b761d8d 100644 --- a/lib/CodeGen/AsmPrinter/EHStreamer.h +++ b/lib/CodeGen/AsmPrinter/EHStreamer.h @@ -1,4 +1,4 @@ -//===-- EHStreamer.h - Exception Handling Directive Streamer ---*- C++ -*--===// +//===- EHStreamer.h - Exception Handling Directive Streamer -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -16,17 +16,16 @@ #include "AsmPrinterHandler.h" #include "llvm/ADT/DenseMap.h" +#include "llvm/Support/Compiler.h" namespace llvm { + +class AsmPrinter; struct LandingPadInfo; -class MachineModuleInfo; class MachineInstr; -class MachineFunction; +class MachineModuleInfo; class MCSymbol; -class MCSymbolRefExpr; - -template -class SmallVectorImpl; +template class SmallVectorImpl; /// Emits exception handling directives. class LLVM_LIBRARY_VISIBILITY EHStreamer : public AsmPrinterHandler { @@ -45,11 +44,12 @@ protected: struct PadRange { // The index of the landing pad. unsigned PadIndex; + // The index of the begin and end labels in the landing pad's label lists. unsigned RangeIndex; }; - typedef DenseMap RangeMapType; + using RangeMapType = DenseMap; /// Structure describing an entry in the actions table. struct ActionEntry { @@ -66,6 +66,7 @@ protected: // LPad contains the landing pad start labels. const LandingPadInfo *LPad; // Null indicates that there is no landing pad. + unsigned Action; }; @@ -131,7 +132,7 @@ public: /// `false' otherwise. static bool callToNoUnwindFunction(const MachineInstr *MI); }; -} -#endif +} // end namespace llvm +#endif // LLVM_LIB_CODEGEN_ASMPRINTER_EHSTREAMER_H diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp index fdd282ce124..40cb0c0cdf1 100644 --- a/lib/CodeGen/BranchFolding.cpp +++ b/lib/CodeGen/BranchFolding.cpp @@ -19,12 +19,14 @@ #include "BranchFolding.h" #include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" -#include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/Analysis.h" +#include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" #include "llvm/CodeGen/MachineBranchProbabilityInfo.h" @@ -41,6 +43,7 @@ #include "llvm/IR/DebugInfoMetadata.h" #include "llvm/IR/DebugLoc.h" #include "llvm/IR/Function.h" +#include "llvm/MC/LaneBitmask.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/Pass.h" #include "llvm/Support/BlockFrequency.h" @@ -51,6 +54,7 @@ #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOpcodes.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" #include @@ -82,8 +86,8 @@ TailMergeThreshold("tail-merge-threshold", // TODO: This should be replaced with a target query. static cl::opt TailMergeSize("tail-merge-size", - cl::desc("Min number of instructions to consider tail merging"), - cl::init(3), cl::Hidden); + cl::desc("Min number of instructions to consider tail merging"), + cl::init(3), cl::Hidden); namespace { @@ -107,6 +111,7 @@ namespace { } // end anonymous namespace char BranchFolderPass::ID = 0; + char &llvm::BranchFolderPassID = BranchFolderPass::ID; INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE, @@ -1865,7 +1870,6 @@ MachineBasicBlock::iterator findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, if (!PI->isSafeToMove(nullptr, DontMoveAcrossStore) || TII->isPredicated(*PI)) return MBB->end(); - // Find out what registers are live. Note this routine is ignoring other live // registers which are only used by instructions in successor blocks. for (const MachineOperand &MO : PI->operands()) { diff --git a/lib/CodeGen/BranchFolding.h b/lib/CodeGen/BranchFolding.h index f6efcb718c9..0f095255013 100644 --- a/lib/CodeGen/BranchFolding.h +++ b/lib/CodeGen/BranchFolding.h @@ -1,4 +1,4 @@ -//===-- BranchFolding.h - Fold machine code branch instructions -*- C++ -*-===// +//===- BranchFolding.h - Fold machine code branch instructions --*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -10,20 +10,27 @@ #ifndef LLVM_LIB_CODEGEN_BRANCHFOLDING_H #define LLVM_LIB_CODEGEN_BRANCHFOLDING_H +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/BlockFrequency.h" +#include "llvm/Support/Compiler.h" +#include #include namespace llvm { - class MachineBlockFrequencyInfo; - class MachineBranchProbabilityInfo; - class MachineFunction; - class MachineModuleInfo; - class MachineLoopInfo; - class TargetInstrInfo; - class TargetRegisterInfo; + +class BasicBlock; +class MachineBlockFrequencyInfo; +class MachineBranchProbabilityInfo; +class MachineFunction; +class MachineLoopInfo; +class MachineModuleInfo; +class MachineRegisterInfo; +class raw_ostream; +class TargetInstrInfo; +class TargetRegisterInfo; class LLVM_LIBRARY_VISIBILITY BranchFolder { public: @@ -49,6 +56,7 @@ namespace llvm { class MergePotentialsElt { unsigned Hash; MachineBasicBlock *Block; + public: MergePotentialsElt(unsigned h, MachineBasicBlock *b) : Hash(h), Block(b) {} @@ -62,7 +70,9 @@ namespace llvm { bool operator<(const MergePotentialsElt &) const; }; - typedef std::vector::iterator MPIterator; + + using MPIterator = std::vector::iterator; + std::vector MergePotentials; SmallPtrSet TriedMerging; DenseMap FuncletMembership; @@ -70,6 +80,7 @@ namespace llvm { class SameTailElt { MPIterator MPIter; MachineBasicBlock::iterator TailStartPos; + public: SameTailElt(MPIterator mp, MachineBasicBlock::iterator tsp) : MPIter(mp), TailStartPos(tsp) {} @@ -77,18 +88,23 @@ namespace llvm { MPIterator getMPIter() const { return MPIter; } + MergePotentialsElt &getMergePotentialsElt() const { return *getMPIter(); } + MachineBasicBlock::iterator getTailStartPos() const { return TailStartPos; } + unsigned getHash() const { return getMergePotentialsElt().getHash(); } + MachineBasicBlock *getBlock() const { return getMergePotentialsElt().getBlock(); } + bool tailIsWholeBlock() const { return TailStartPos == getBlock()->begin(); } @@ -96,6 +112,7 @@ namespace llvm { void setBlock(MachineBasicBlock *MBB) { getMergePotentialsElt().setBlock(MBB); } + void setTailStartPos(MachineBasicBlock::iterator Pos) { TailStartPos = Pos; } @@ -120,6 +137,7 @@ namespace llvm { class MBFIWrapper { public: MBFIWrapper(const MachineBlockFrequencyInfo &I) : MBFI(I) {} + BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const; void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F); raw_ostream &printBlockFreq(raw_ostream &OS, @@ -203,6 +221,7 @@ namespace llvm { /// the function, move the instructions before MBB terminator if it's legal. bool HoistCommonCodeInSuccs(MachineBasicBlock *MBB); }; -} -#endif /* LLVM_CODEGEN_BRANCHFOLDING_HPP */ +} // end namespace llvm + +#endif // LLVM_LIB_CODEGEN_BRANCHFOLDING_H diff --git a/lib/CodeGen/LocalStackSlotAllocation.cpp b/lib/CodeGen/LocalStackSlotAllocation.cpp index b109f1922a3..9d02422a09d 100644 --- a/lib/CodeGen/LocalStackSlotAllocation.cpp +++ b/lib/CodeGen/LocalStackSlotAllocation.cpp @@ -14,29 +14,30 @@ // //===----------------------------------------------------------------------===// -#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SetVector.h" #include "llvm/ADT/SmallSet.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/StackProtector.h" -#include "llvm/IR/Constants.h" -#include "llvm/IR/DerivedTypes.h" -#include "llvm/IR/Instructions.h" -#include "llvm/IR/Intrinsics.h" -#include "llvm/IR/LLVMContext.h" -#include "llvm/IR/Module.h" #include "llvm/Pass.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetFrameLowering.h" +#include "llvm/Target/TargetOpcodes.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" +#include +#include +#include +#include using namespace llvm; @@ -47,6 +48,7 @@ STATISTIC(NumBaseRegisters, "Number of virtual frame base registers allocated"); STATISTIC(NumReplacements, "Number of frame indices references replaced"); namespace { + class FrameRef { MachineBasicBlock::iterator MI; // Instr referencing the frame int64_t LocalOffset; // Local offset of the frame idx referenced @@ -72,9 +74,10 @@ namespace { }; class LocalStackSlotPass: public MachineFunctionPass { - SmallVector LocalOffsets; + SmallVector LocalOffsets; + /// StackObjSet - A set of stack object indexes - typedef SmallSetVector StackObjSet; + using StackObjSet = SmallSetVector; void AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, int64_t &Offset, bool StackGrowsDown, unsigned &MaxAlign); @@ -84,11 +87,14 @@ namespace { int64_t &Offset, unsigned &MaxAlign); void calculateFrameObjectOffsets(MachineFunction &Fn); bool insertFrameReferenceRegisters(MachineFunction &Fn); + public: static char ID; // Pass identification, replacement for typeid + explicit LocalStackSlotPass() : MachineFunctionPass(ID) { initializeLocalStackSlotPassPass(*PassRegistry::getPassRegistry()); } + bool runOnMachineFunction(MachineFunction &MF) override; void getAnalysisUsage(AnalysisUsage &AU) const override { @@ -96,20 +102,20 @@ namespace { AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); } - - private: }; + } // end anonymous namespace char LocalStackSlotPass::ID = 0; + char &llvm::LocalStackSlotAllocationID = LocalStackSlotPass::ID; + INITIALIZE_PASS_BEGIN(LocalStackSlotPass, DEBUG_TYPE, "Local Stack Slot Allocation", false, false) INITIALIZE_PASS_DEPENDENCY(StackProtector) INITIALIZE_PASS_END(LocalStackSlotPass, DEBUG_TYPE, "Local Stack Slot Allocation", false, false) - bool LocalStackSlotPass::runOnMachineFunction(MachineFunction &MF) { MachineFrameInfo &MFI = MF.getFrameInfo(); const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); @@ -178,7 +184,6 @@ void LocalStackSlotPass::AssignProtectedObjSet(const StackObjSet &UnassignedObjs MachineFrameInfo &MFI, bool StackGrowsDown, int64_t &Offset, unsigned &MaxAlign) { - for (StackObjSet::const_iterator I = UnassignedObjs.begin(), E = UnassignedObjs.end(); I != E; ++I) { int i = *I; @@ -189,7 +194,6 @@ void LocalStackSlotPass::AssignProtectedObjSet(const StackObjSet &UnassignedObjs /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the /// abstract stack objects. -/// void LocalStackSlotPass::calculateFrameObjectOffsets(MachineFunction &Fn) { // Loop over all of the stack objects, assigning sequential addresses... MachineFrameInfo &MFI = Fn.getFrameInfo(); diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index efd4bd00a45..250a10c7d07 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -1,4 +1,4 @@ -//===-- MachineFunction.cpp -----------------------------------------------===// +//===- MachineFunction.cpp ------------------------------------------------===// // // The LLVM Compiler Infrastructure // @@ -14,45 +14,76 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/DenseSet.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallString.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Twine.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/EHPersonalities.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFrameInfo.h" -#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineJumpTableInfo.h" +#include "llvm/CodeGen/MachineMemOperand.h" #include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/PseudoSourceValue.h" #include "llvm/CodeGen/WinEHFuncInfo.h" +#include "llvm/IR/Attributes.h" +#include "llvm/IR/BasicBlock.h" +#include "llvm/IR/Constant.h" #include "llvm/IR/DataLayout.h" -#include "llvm/IR/DebugInfo.h" +#include "llvm/IR/DerivedTypes.h" #include "llvm/IR/Function.h" +#include "llvm/IR/GlobalValue.h" +#include "llvm/IR/Instruction.h" +#include "llvm/IR/Instructions.h" +#include "llvm/IR/Metadata.h" #include "llvm/IR/Module.h" #include "llvm/IR/ModuleSlotTracker.h" -#include "llvm/MC/MCAsmInfo.h" +#include "llvm/IR/Value.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/SectionKind.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DOTGraphTraits.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/GraphWriter.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetFrameLowering.h" #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" +#include +#include +#include +#include +#include +#include +#include +#include + using namespace llvm; #define DEBUG_TYPE "codegen" static cl::opt - AlignAllFunctions("align-all-functions", - cl::desc("Force the alignment of all functions."), - cl::init(0), cl::Hidden); +AlignAllFunctions("align-all-functions", + cl::desc("Force the alignment of all functions."), + cl::init(0), cl::Hidden); static const char *getPropertyName(MachineFunctionProperties::Property Prop) { - typedef MachineFunctionProperties::Property P; + using P = MachineFunctionProperties::Property; + switch(Prop) { case P::FailedISel: return "FailedISel"; case P::IsSSA: return "IsSSA"; @@ -81,7 +112,7 @@ void MachineFunctionProperties::print(raw_ostream &OS) const { //===----------------------------------------------------------------------===// // Out-of-line virtual method. -MachineFunctionInfo::~MachineFunctionInfo() {} +MachineFunctionInfo::~MachineFunctionInfo() = default; void ilist_alloc_traits::deleteNode(MachineBasicBlock *MBB) { MBB->getParent()->DeleteMachineBasicBlock(MBB); @@ -277,7 +308,7 @@ MachineInstr &MachineFunction::CloneMachineInstrBundle(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) { MachineInstr *FirstClone = nullptr; MachineBasicBlock::const_instr_iterator I = Orig.getIterator(); - for (;;) { + while (true) { MachineInstr *Cloned = CloneMachineInstr(&*I); MBB.insert(InsertBefore, Cloned); if (FirstClone == nullptr) { @@ -499,10 +530,10 @@ void MachineFunction::print(raw_ostream &OS, const SlotIndexes *Indexes) const { } namespace llvm { + template<> struct DOTGraphTraits : public DefaultDOTGraphTraits { - - DOTGraphTraits (bool isSimple=false) : DefaultDOTGraphTraits(isSimple) {} + DOTGraphTraits(bool isSimple = false) : DefaultDOTGraphTraits(isSimple) {} static std::string getGraphName(const MachineFunction *F) { return ("CFG for '" + F->getName() + "' function").str(); @@ -533,7 +564,8 @@ namespace llvm { return OutStr; } }; -} + +} // end namespace llvm void MachineFunction::viewCFG() const { @@ -886,12 +918,11 @@ void MachineJumpTableInfo::print(raw_ostream &OS) const { LLVM_DUMP_METHOD void MachineJumpTableInfo::dump() const { print(dbgs()); } #endif - //===----------------------------------------------------------------------===// // MachineConstantPool implementation //===----------------------------------------------------------------------===// -void MachineConstantPoolValue::anchor() { } +void MachineConstantPoolValue::anchor() {} Type *MachineConstantPoolEntry::getType() const { if (isMachineConstantPoolEntry()) diff --git a/lib/CodeGen/MachineModuleInfoImpls.cpp b/lib/CodeGen/MachineModuleInfoImpls.cpp index 22d519e5d88..a29fbc28528 100644 --- a/lib/CodeGen/MachineModuleInfoImpls.cpp +++ b/lib/CodeGen/MachineModuleInfoImpls.cpp @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/MachineModuleInfoImpls.cpp ---------------------------===// +//===- llvm/CodeGen/MachineModuleInfoImpls.cpp ----------------------------===// // // The LLVM Compiler Infrastructure // @@ -13,7 +13,11 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/MachineModuleInfoImpls.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/MC/MCSymbol.h" +#include +#include + using namespace llvm; //===----------------------------------------------------------------------===// @@ -25,7 +29,8 @@ void MachineModuleInfoMachO::anchor() {} void MachineModuleInfoELF::anchor() {} static int SortSymbolPair(const void *LHS, const void *RHS) { - typedef std::pair PairTy; + using PairTy = std::pair; + const MCSymbol *LHSS = ((const PairTy *)LHS)->first; const MCSymbol *RHSS = ((const PairTy *)RHS)->first; return LHSS->getName().compare(RHSS->getName()); @@ -41,4 +46,3 @@ MachineModuleInfoImpl::SymbolListTy MachineModuleInfoImpl::getSortedStubs( Map.clear(); return List; } - diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index 3d7e1c9ecd4..e105dbe18ec 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -1,4 +1,4 @@ -//===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===// +//===- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function ---===// // // The LLVM Compiler Infrastructure // @@ -16,40 +16,66 @@ // //===----------------------------------------------------------------------===// +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DepthFirstIterator.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SetVector.h" +#include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/SmallSet.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" +#include "llvm/Analysis/OptimizationRemarkEmitter.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/CodeGen/StackProtector.h" #include "llvm/CodeGen/WinEHFuncInfo.h" +#include "llvm/IR/Attributes.h" +#include "llvm/IR/CallingConv.h" #include "llvm/IR/DebugInfoMetadata.h" #include "llvm/IR/DiagnosticInfo.h" +#include "llvm/IR/Function.h" #include "llvm/IR/InlineAsm.h" #include "llvm/IR/LLVMContext.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/Pass.h" +#include "llvm/Support/CodeGen.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MathExtras.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetFrameLowering.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOpcodes.h" +#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" -#include +#include +#include +#include +#include +#include +#include +#include using namespace llvm; #define DEBUG_TYPE "prologepilog" -typedef SmallVector MBBVector; +using MBBVector = SmallVector; + static void spillCalleeSavedRegs(MachineFunction &MF, RegScavenger *RS, unsigned &MinCSFrameIndex, unsigned &MaxCXFrameIndex, @@ -57,9 +83,11 @@ static void spillCalleeSavedRegs(MachineFunction &MF, RegScavenger *RS, const MBBVector &RestoreBlocks); namespace { + class PEI : public MachineFunctionPass { public: static char ID; + PEI() : MachineFunctionPass(ID) { initializePEIPass(*PassRegistry::getPassRegistry()); } @@ -68,7 +96,6 @@ public: /// runOnMachineFunction - Insert prolog/epilog code and replace abstract /// frame indexes with appropriate references. - /// bool runOnMachineFunction(MachineFunction &Fn) override; private: @@ -105,9 +132,11 @@ private: int &SPAdj); void insertPrologEpilogCode(MachineFunction &Fn); }; -} // namespace + +} // end anonymous namespace char PEI::ID = 0; + char &llvm::PrologEpilogCodeInserterID = PEI::ID; static cl::opt @@ -141,13 +170,11 @@ void PEI::getAnalysisUsage(AnalysisUsage &AU) const { MachineFunctionPass::getAnalysisUsage(AU); } - /// StackObjSet - A set of stack object indexes -typedef SmallSetVector StackObjSet; +using StackObjSet = SmallSetVector; /// runOnMachineFunction - Insert prolog/epilog code and replace abstract /// frame indexes with appropriate references. -/// bool PEI::runOnMachineFunction(MachineFunction &Fn) { const Function* F = Fn.getFunction(); const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo(); @@ -552,7 +579,6 @@ AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, /// Compute which bytes of fixed and callee-save stack area are unused and keep /// track of them in StackBytesFree. -/// static inline void computeFreeStackSlots(MachineFrameInfo &MFI, bool StackGrowsDown, unsigned MinCSFrameIndex, unsigned MaxCSFrameIndex, @@ -593,7 +619,6 @@ computeFreeStackSlots(MachineFrameInfo &MFI, bool StackGrowsDown, /// Assign frame object to an unused portion of the stack in the fixed stack /// object range. Return true if the allocation was successful. -/// static inline bool scavengeStackSlot(MachineFrameInfo &MFI, int FrameIdx, bool StackGrowsDown, unsigned MaxAlign, BitVector &StackBytesFree) { @@ -670,7 +695,6 @@ AssignProtectedObjSet(const StackObjSet &UnassignedObjs, /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the /// abstract stack objects. -/// void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering(); StackProtector *SP = &getAnalysis(); @@ -792,7 +816,7 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { } // Retrieve the Exception Handler registration node. - int EHRegNodeFrameIndex = INT_MAX; + int EHRegNodeFrameIndex = std::numeric_limits::max(); if (const WinEHFuncInfo *FuncInfo = Fn.getWinEHFuncInfo()) EHRegNodeFrameIndex = FuncInfo->EHRegNodeFrameIndex; @@ -870,7 +894,7 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { } // Allocate the EH registration node first if one is present. - if (EHRegNodeFrameIndex != INT_MAX) + if (EHRegNodeFrameIndex != std::numeric_limits::max()) AdjustStackOffset(MFI, EHRegNodeFrameIndex, StackGrowsDown, Offset, MaxAlign, Skew); @@ -946,7 +970,6 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { /// insertPrologEpilogCode - Scan the function for modified callee saved /// registers, insert spill code for these callee saved registers, then add /// prolog and epilog code to the function. -/// void PEI::insertPrologEpilogCode(MachineFunction &Fn) { const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering(); @@ -986,7 +1009,6 @@ void PEI::insertPrologEpilogCode(MachineFunction &Fn) { /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical /// register references and actual offsets. -/// void PEI::replaceFrameIndices(MachineFunction &Fn) { const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering(); if (!TFI.needsFrameIndexResolution(Fn)) return; @@ -1036,7 +1058,6 @@ void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn, bool InsideCallSequence = false; for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { - if (TII.isFrameInstr(*I)) { InsideCallSequence = TII.isFrameSetup(*I); SPAdj += TII.getSPAdjust(*I); diff --git a/lib/CodeGen/SafeStackColoring.cpp b/lib/CodeGen/SafeStackColoring.cpp index 21f2fa49723..072e6e090e1 100644 --- a/lib/CodeGen/SafeStackColoring.cpp +++ b/lib/CodeGen/SafeStackColoring.cpp @@ -1,4 +1,4 @@ -//===-- SafeStackColoring.cpp - SafeStack frame coloring -------*- C++ -*--===// +//===- SafeStackColoring.cpp - SafeStack frame coloring -------------------===// // // The LLVM Compiler Infrastructure // @@ -8,12 +8,25 @@ //===----------------------------------------------------------------------===// #include "SafeStackColoring.h" - +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/DepthFirstIterator.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/IR/BasicBlock.h" #include "llvm/IR/CFG.h" +#include "llvm/IR/Instruction.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/IntrinsicInst.h" +#include "llvm/IR/Intrinsics.h" +#include "llvm/IR/User.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include using namespace llvm; using namespace llvm::safestack; diff --git a/lib/CodeGen/SafeStackColoring.h b/lib/CodeGen/SafeStackColoring.h index 08b179ccb7f..902e63ebeb7 100644 --- a/lib/CodeGen/SafeStackColoring.h +++ b/lib/CodeGen/SafeStackColoring.h @@ -1,4 +1,4 @@ -//===-- SafeStackColoring.h - SafeStack frame coloring ---------*- C++ -*--===// +//===- SafeStackColoring.h - SafeStack frame coloring ----------*- C++ -*--===// // // The LLVM Compiler Infrastructure // @@ -10,16 +10,23 @@ #ifndef LLVM_LIB_CODEGEN_SAFESTACKCOLORING_H #define LLVM_LIB_CODEGEN_SAFESTACKCOLORING_H +#include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallVector.h" -#include "llvm/IR/Function.h" -#include "llvm/Support/raw_os_ostream.h" +#include "llvm/IR/Instructions.h" +#include "llvm/Support/raw_ostream.h" +#include +#include namespace llvm { -class AllocaInst; + +class BasicBlock; +class Function; +class Instruction; namespace safestack { + /// Compute live ranges of allocas. /// Live ranges are represented as sets of "interesting" instructions, which are /// defined as instructions that may start or end an alloca's lifetime. These @@ -35,10 +42,13 @@ class StackColoring { struct BlockLifetimeInfo { /// Which slots BEGINs in each basic block. BitVector Begin; + /// Which slots ENDs in each basic block. BitVector End; + /// Which slots are marked as LIVE_IN, coming into each basic block. BitVector LiveIn; + /// Which slots are marked as LIVE_OUT, coming out of each basic block. BitVector LiveOut; }; @@ -48,11 +58,14 @@ public: /// live. struct LiveRange { BitVector bv; + void SetMaximum(int size) { bv.resize(size); } void AddRange(unsigned start, unsigned end) { bv.set(start, end); } + bool Overlaps(const LiveRange &Other) const { return bv.anyCommon(Other.bv); } + void Join(const LiveRange &Other) { bv |= Other.bv; } }; @@ -60,13 +73,15 @@ private: Function &F; /// Maps active slots (per bit) for each basic block. - typedef DenseMap LivenessMap; + using LivenessMap = DenseMap; LivenessMap BlockLiveness; /// Number of interesting instructions. - int NumInst; + int NumInst = -1; + /// Numeric ids for interesting instructions. DenseMap InstructionNumbering; + /// A range [Start, End) of instruction ids for each basic block. /// Instructions inside each BB have monotonic and consecutive ids. DenseMap> BlockInstRange; @@ -74,6 +89,7 @@ private: ArrayRef Allocas; unsigned NumAllocas; DenseMap AllocaNumbering; + /// LiveRange for allocas. SmallVector LiveRanges; @@ -101,7 +117,7 @@ private: public: StackColoring(Function &F, ArrayRef Allocas) - : F(F), NumInst(-1), Allocas(Allocas), NumAllocas(Allocas.size()) {} + : F(F), Allocas(Allocas), NumAllocas(Allocas.size()) {} void run(); void removeAllMarkers(); @@ -143,7 +159,8 @@ static inline raw_ostream &operator<<(raw_ostream &OS, return OS << R.bv; } -} // namespace safestack -} // namespace llvm +} // end namespace safestack + +} // end namespace llvm #endif // LLVM_LIB_CODEGEN_SAFESTACKCOLORING_H diff --git a/lib/CodeGen/SafeStackLayout.cpp b/lib/CodeGen/SafeStackLayout.cpp index 7d4dbd13abf..b1759359e46 100644 --- a/lib/CodeGen/SafeStackLayout.cpp +++ b/lib/CodeGen/SafeStackLayout.cpp @@ -1,4 +1,4 @@ -//===-- SafeStackLayout.cpp - SafeStack frame layout -----------*- C++ -*--===// +//===- SafeStackLayout.cpp - SafeStack frame layout -----------------------===// // // The LLVM Compiler Infrastructure // @@ -8,9 +8,15 @@ //===----------------------------------------------------------------------===// #include "SafeStackLayout.h" - -#include "llvm/IR/Instructions.h" +#include "SafeStackColoring.h" +#include "llvm/IR/Value.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/raw_ostream.h" +#include +#include using namespace llvm; using namespace llvm::safestack; diff --git a/lib/CodeGen/SafeStackLayout.h b/lib/CodeGen/SafeStackLayout.h index 313ed21c886..7c1292f251f 100644 --- a/lib/CodeGen/SafeStackLayout.h +++ b/lib/CodeGen/SafeStackLayout.h @@ -1,4 +1,4 @@ -//===-- SafeStackLayout.h - SafeStack frame layout -------------*- C++ -*--===// +//===- SafeStackLayout.h - SafeStack frame layout --------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // @@ -11,8 +11,14 @@ #define LLVM_LIB_CODEGEN_SAFESTACKLAYOUT_H #include "SafeStackColoring.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallVector.h" namespace llvm { + +class raw_ostream; +class Value; + namespace safestack { /// Compute the layout of an unsafe stack frame. @@ -23,10 +29,12 @@ class StackLayout { unsigned Start; unsigned End; StackColoring::LiveRange Range; + StackRegion(unsigned Start, unsigned End, const StackColoring::LiveRange &Range) : Start(Start), End(End), Range(Range) {} }; + /// The list of current stack regions, sorted by StackRegion::Start. SmallVector Regions; @@ -35,6 +43,7 @@ class StackLayout { unsigned Size, Alignment; StackColoring::LiveRange Range; }; + SmallVector StackObjects; DenseMap ObjectOffsets; @@ -43,6 +52,7 @@ class StackLayout { public: StackLayout(unsigned StackAlignment) : MaxAlignment(StackAlignment) {} + /// Add an object to the stack frame. Value pointer is opaque and used as a /// handle to retrieve the object's offset in the frame later. void addObject(const Value *V, unsigned Size, unsigned Alignment, @@ -59,10 +69,12 @@ public: /// Returns the alignment of the frame. unsigned getFrameAlignment() { return MaxAlignment; } + void print(raw_ostream &OS); }; -} // namespace safestack -} // namespace llvm +} // end namespace safestack + +} // end namespace llvm #endif // LLVM_LIB_CODEGEN_SAFESTACKLAYOUT_H diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 53ef28e473a..98202925629 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1,4 +1,4 @@ -//===----- ScheduleDAGRRList.cpp - Reg pressure reduction list scheduler --===// +//===- ScheduleDAGRRList.cpp - Reg pressure reduction list scheduler ------===// // // The LLVM Compiler Infrastructure // @@ -16,23 +16,47 @@ //===----------------------------------------------------------------------===// #include "ScheduleDAGSDNodes.h" +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallSet.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" +#include "llvm/CodeGen/ISDOpcodes.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/MachineValueType.h" +#include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/CodeGen/ScheduleHazardRecognizer.h" #include "llvm/CodeGen/SchedulerRegistry.h" #include "llvm/CodeGen/SelectionDAGISel.h" -#include "llvm/IR/DataLayout.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/IR/InlineAsm.h" +#include "llvm/MC/MCInstrDesc.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/CodeGen.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetOpcodes.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" -#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + using namespace llvm; #define DEBUG_TYPE "pre-RA-sched" @@ -46,6 +70,7 @@ static RegisterScheduler burrListDAGScheduler("list-burr", "Bottom-up register reduction list scheduling", createBURRListDAGScheduler); + static RegisterScheduler sourceListDAGScheduler("source", "Similar to list-burr but schedules in source " @@ -105,6 +130,7 @@ static cl::opt AvgIPC( cl::desc("Average inst/cycle whan no target itinerary exists.")); namespace { + //===----------------------------------------------------------------------===// /// ScheduleDAGRRList - The actual register reduction list scheduler /// implementation. This supports both top-down and bottom-up scheduling. @@ -112,7 +138,6 @@ namespace { class ScheduleDAGRRList : public ScheduleDAGSDNodes { private: /// NeedLatency - True if the scheduler will make use of latency information. - /// bool NeedLatency; /// AvailableQueue - The priority queue to use for the available SUnits. @@ -122,13 +147,13 @@ private: /// been issued, but their results are not ready yet (due to the latency of /// the operation). Once the operands becomes available, the instruction is /// added to the AvailableQueue. - std::vector PendingQueue; + std::vector PendingQueue; /// HazardRec - The hazard recognizer to use. ScheduleHazardRecognizer *HazardRec; /// CurCycle - The current scheduler state corresponds to this cycle. - unsigned CurCycle; + unsigned CurCycle = 0; /// MinAvailableCycle - Cycle of the soonest available instruction. unsigned MinAvailableCycle; @@ -147,7 +172,9 @@ private: // Collect interferences between physical register use/defs. // Each interference is an SUnit and set of physical registers. SmallVector Interferences; - typedef DenseMap > LRegsMapT; + + using LRegsMapT = DenseMap>; + LRegsMapT LRegsMap; /// Topo - A topological ordering for SUnits which permits fast IsReachable @@ -163,9 +190,8 @@ public: SchedulingPriorityQueue *availqueue, CodeGenOpt::Level OptLevel) : ScheduleDAGSDNodes(mf), - NeedLatency(needlatency), AvailableQueue(availqueue), CurCycle(0), + NeedLatency(needlatency), AvailableQueue(availqueue), Topo(SUnits, nullptr) { - const TargetSubtargetInfo &STI = mf.getSubtarget(); if (DisableSchedCycles || !NeedLatency) HazardRec = new ScheduleHazardRecognizer(); @@ -267,6 +293,7 @@ private: return !NeedLatency; } }; + } // end anonymous namespace /// GetCostForDef - Looks up the register class and cost for a given definition. @@ -325,7 +352,8 @@ void ScheduleDAGRRList::Schedule() { CurCycle = 0; IssueCount = 0; - MinAvailableCycle = DisableSchedCycles ? 0 : UINT_MAX; + MinAvailableCycle = + DisableSchedCycles ? 0 : std::numeric_limits::max(); NumLiveRegs = 0; // Allocate slots for each physical register, plus one for a special register // to track the virtual resource of a calling sequence. @@ -409,7 +437,7 @@ static bool IsChainDependent(SDNode *Outer, SDNode *Inner, unsigned NestLevel, const TargetInstrInfo *TII) { SDNode *N = Outer; - for (;;) { + while (true) { if (N == Inner) return true; // For a TokenFactor, examine each operand. There may be multiple ways @@ -456,7 +484,7 @@ static bool IsChainDependent(SDNode *Outer, SDNode *Inner, static SDNode * FindCallSeqStart(SDNode *N, unsigned &NestLevel, unsigned &MaxNest, const TargetInstrInfo *TII) { - for (;;) { + while (true) { // For a TokenFactor, examine each operand. There may be multiple ways // to get to the CALLSEQ_BEGIN, but we need to find the path with the // most nesting in order to ensure that we find the corresponding match. @@ -572,7 +600,7 @@ void ScheduleDAGRRList::ReleasePending() { // If the available queue is empty, it is safe to reset MinAvailableCycle. if (AvailableQueue->empty()) - MinAvailableCycle = UINT_MAX; + MinAvailableCycle = std::numeric_limits::max(); // Check to see if any of the pending instructions are ready to issue. If // so, add them to the available queue. @@ -792,7 +820,8 @@ void ScheduleDAGRRList::CapturePred(SDep *PredEdge) { AvailableQueue->remove(PredSU); } - assert(PredSU->NumSuccsLeft < UINT_MAX && "NumSuccsLeft will overflow!"); + assert(PredSU->NumSuccsLeft < std::numeric_limits::max() && + "NumSuccsLeft will overflow!"); ++PredSU->NumSuccsLeft; } @@ -898,7 +927,7 @@ void ScheduleDAGRRList::RestoreHazardCheckerBottomUp() { if (LookAhead == 0) return; - std::vector::const_iterator I = (Sequence.end() - LookAhead); + std::vector::const_iterator I = (Sequence.end() - LookAhead); unsigned HazardCycle = (*I)->getHeight(); for (auto E = Sequence.end(); I != E; ++I) { SUnit *SU = *I; @@ -1432,7 +1461,7 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() { // Try unscheduling up to the point where it's safe to schedule // this node. SUnit *BtSU = nullptr; - unsigned LiveCycle = UINT_MAX; + unsigned LiveCycle = std::numeric_limits::max(); for (unsigned Reg : LRegs) { if (LiveRegGens[Reg]->getHeight() < LiveCycle) { BtSU = LiveRegGens[Reg]; @@ -1552,7 +1581,8 @@ void ScheduleDAGRRList::ListScheduleBottomUp() { while (AvailableQueue->empty() && !PendingQueue.empty()) { // Advance the cycle to free resources. Skip ahead to the next ready SU. - assert(MinAvailableCycle < UINT_MAX && "MinAvailableCycle uninitialized"); + assert(MinAvailableCycle < std::numeric_limits::max() && + "MinAvailableCycle uninitialized"); AdvanceToCycle(std::max(CurCycle + 1, MinAvailableCycle)); } } @@ -1565,14 +1595,8 @@ void ScheduleDAGRRList::ListScheduleBottomUp() { #endif } -//===----------------------------------------------------------------------===// -// RegReductionPriorityQueue Definition -//===----------------------------------------------------------------------===// -// -// This is a SchedulingPriorityQueue that schedules using Sethi Ullman numbers -// to reduce register pressure. -// namespace { + class RegReductionPQBase; struct queue_sort { @@ -1583,6 +1607,7 @@ struct queue_sort { template struct reverse_sort : public queue_sort { SF &SortFunc; + reverse_sort(SF &sf) : SortFunc(sf) {} bool operator()(SUnit* left, SUnit* right) const { @@ -1602,6 +1627,7 @@ struct bu_ls_rr_sort : public queue_sort { }; RegReductionPQBase *SPQ; + bu_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {} bool operator()(SUnit* left, SUnit* right) const; @@ -1615,8 +1641,8 @@ struct src_ls_rr_sort : public queue_sort { }; RegReductionPQBase *SPQ; - src_ls_rr_sort(RegReductionPQBase *spq) - : SPQ(spq) {} + + src_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {} bool operator()(SUnit* left, SUnit* right) const; }; @@ -1629,8 +1655,8 @@ struct hybrid_ls_rr_sort : public queue_sort { }; RegReductionPQBase *SPQ; - hybrid_ls_rr_sort(RegReductionPQBase *spq) - : SPQ(spq) {} + + hybrid_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {} bool isReady(SUnit *SU, unsigned CurCycle) const; @@ -1646,8 +1672,8 @@ struct ilp_ls_rr_sort : public queue_sort { }; RegReductionPQBase *SPQ; - ilp_ls_rr_sort(RegReductionPQBase *spq) - : SPQ(spq) {} + + ilp_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {} bool isReady(SUnit *SU, unsigned CurCycle) const; @@ -1656,8 +1682,8 @@ struct ilp_ls_rr_sort : public queue_sort { class RegReductionPQBase : public SchedulingPriorityQueue { protected: - std::vector Queue; - unsigned CurQueueId; + std::vector Queue; + unsigned CurQueueId = 0; bool TracksRegPressure; bool SrcOrder; @@ -1668,13 +1694,12 @@ protected: const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; const TargetLowering *TLI; - ScheduleDAGRRList *scheduleDAG; + ScheduleDAGRRList *scheduleDAG = nullptr; // SethiUllmanNumbers - The SethiUllman number for each node. std::vector SethiUllmanNumbers; /// RegPressure - Tracking current reg pressure per register class. - /// std::vector RegPressure; /// RegLimit - Tracking the number of allocatable registers per register @@ -1689,9 +1714,8 @@ public: const TargetInstrInfo *tii, const TargetRegisterInfo *tri, const TargetLowering *tli) - : SchedulingPriorityQueue(hasReadyFilter), - CurQueueId(0), TracksRegPressure(tracksrp), SrcOrder(srcorder), - MF(mf), TII(tii), TRI(tri), TLI(tli), scheduleDAG(nullptr) { + : SchedulingPriorityQueue(hasReadyFilter), TracksRegPressure(tracksrp), + SrcOrder(srcorder), MF(mf), TII(tii), TRI(tri), TLI(tli) { if (TracksRegPressure) { unsigned NumRC = TRI->getNumRegClasses(); RegLimit.resize(NumRC); @@ -1742,7 +1766,7 @@ public: void remove(SUnit *SU) override { assert(!Queue.empty() && "Queue is empty!"); assert(SU->NodeQueueId != 0 && "Not in queue!"); - std::vector::iterator I = find(Queue, SU); + std::vector::iterator I = llvm::find(Queue, SU); if (I != std::prev(Queue.end())) std::swap(*I, Queue.back()); Queue.pop_back(); @@ -1771,7 +1795,7 @@ protected: }; template -static SUnit *popFromQueueImpl(std::vector &Q, SF &Picker) { +static SUnit *popFromQueueImpl(std::vector &Q, SF &Picker) { std::vector::iterator Best = Q.begin(); for (auto I = std::next(Q.begin()), E = Q.end(); I != E; ++I) if (Picker(*Best, *I)) @@ -1784,7 +1808,7 @@ static SUnit *popFromQueueImpl(std::vector &Q, SF &Picker) { } template -SUnit *popFromQueue(std::vector &Q, SF &Picker, ScheduleDAG *DAG) { +SUnit *popFromQueue(std::vector &Q, SF &Picker, ScheduleDAG *DAG) { #ifndef NDEBUG if (DAG->StressSched) { reverse_sort RPicker(Picker); @@ -1795,6 +1819,13 @@ SUnit *popFromQueue(std::vector &Q, SF &Picker, ScheduleDAG *DAG) { return popFromQueueImpl(Q, Picker); } +//===----------------------------------------------------------------------===// +// RegReductionPriorityQueue Definition +//===----------------------------------------------------------------------===// +// +// This is a SchedulingPriorityQueue that schedules using Sethi Ullman numbers +// to reduce register pressure. +// template class RegReductionPriorityQueue : public RegReductionPQBase { SF Picker; @@ -1827,7 +1858,7 @@ public: #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void dump(ScheduleDAG *DAG) const override { // Emulate pop() without clobbering NodeQueueIds. - std::vector DumpQueue = Queue; + std::vector DumpQueue = Queue; SF DumpPicker = Picker; while (!DumpQueue.empty()) { SUnit *SU = popFromQueue(DumpQueue, DumpPicker, scheduleDAG); @@ -1838,17 +1869,11 @@ public: #endif }; -typedef RegReductionPriorityQueue -BURegReductionPriorityQueue; - -typedef RegReductionPriorityQueue -SrcRegReductionPriorityQueue; +using BURegReductionPriorityQueue = RegReductionPriorityQueue; +using SrcRegReductionPriorityQueue = RegReductionPriorityQueue; +using HybridBURRPriorityQueue = RegReductionPriorityQueue; +using ILPBURRPriorityQueue = RegReductionPriorityQueue; -typedef RegReductionPriorityQueue -HybridBURRPriorityQueue; - -typedef RegReductionPriorityQueue -ILPBURRPriorityQueue; } // end anonymous namespace //===----------------------------------------------------------------------===// @@ -2867,7 +2892,6 @@ static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU, /// This results in the store being scheduled immediately /// after N, which shortens the U->N live range, reducing /// register pressure. -/// void RegReductionPQBase::PrescheduleNodesWithMultipleUses() { // Visit all the nodes in topological order, working top-down. for (SUnit &SU : *SUnits) { @@ -3034,7 +3058,7 @@ void RegReductionPQBase::AddPseudoTwoAddrDeps() { // Public Constructor Functions //===----------------------------------------------------------------------===// -llvm::ScheduleDAGSDNodes * +ScheduleDAGSDNodes * llvm::createBURRListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel) { const TargetSubtargetInfo &STI = IS->MF->getSubtarget(); @@ -3048,7 +3072,7 @@ llvm::createBURRListDAGScheduler(SelectionDAGISel *IS, return SD; } -llvm::ScheduleDAGSDNodes * +ScheduleDAGSDNodes * llvm::createSourceListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel) { const TargetSubtargetInfo &STI = IS->MF->getSubtarget(); @@ -3062,7 +3086,7 @@ llvm::createSourceListDAGScheduler(SelectionDAGISel *IS, return SD; } -llvm::ScheduleDAGSDNodes * +ScheduleDAGSDNodes * llvm::createHybridListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel) { const TargetSubtargetInfo &STI = IS->MF->getSubtarget(); @@ -3078,7 +3102,7 @@ llvm::createHybridListDAGScheduler(SelectionDAGISel *IS, return SD; } -llvm::ScheduleDAGSDNodes * +ScheduleDAGSDNodes * llvm::createILPListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel) { const TargetSubtargetInfo &STI = IS->MF->getSubtarget(); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp index 3dd58975b1f..362ecab7320 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @@ -1,4 +1,4 @@ -//===-- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() -----------===// +//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// // // The LLVM Compiler Infrastructure // @@ -11,24 +11,42 @@ // //===----------------------------------------------------------------------===// -#include "ScheduleDAGSDNodes.h" +#include "llvm/ADT/APFloat.h" +#include "llvm/ADT/APInt.h" +#include "llvm/ADT/None.h" +#include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/CodeGen/ISDOpcodes.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineConstantPool.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/MachineMemOperand.h" +#include "llvm/CodeGen/MachineValueType.h" #include "llvm/CodeGen/SelectionDAG.h" -#include "llvm/IR/DebugInfo.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" +#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/IR/BasicBlock.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/DebugInfoMetadata.h" +#include "llvm/IR/DebugLoc.h" #include "llvm/IR/Function.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/Value.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" -#include "llvm/Support/GraphWriter.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Printable.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetIntrinsicInfo.h" +#include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" +#include +#include + using namespace llvm; static cl::opt @@ -385,6 +403,7 @@ static Printable PrintNodeId(const SDNode &Node) { #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } + LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { print(dbgs(), G); dbgs() << '\n'; @@ -429,9 +448,9 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { } else if (const ConstantSDNode *CSDN = dyn_cast(this)) { OS << '<' << CSDN->getAPIntValue() << '>'; } else if (const ConstantFPSDNode *CSDN = dyn_cast(this)) { - if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle()) + if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; - else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble()) + else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; else { OS << " VisitedSDNodeSet; +using VisitedSDNodeSet = SmallPtrSet; + static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once) { if (!once.insert(N).second) // If we've been here before, return now. diff --git a/lib/CodeGen/ShrinkWrap.cpp b/lib/CodeGen/ShrinkWrap.cpp index aa75f5e2caa..5fb6afee88a 100644 --- a/lib/CodeGen/ShrinkWrap.cpp +++ b/lib/CodeGen/ShrinkWrap.cpp @@ -1,4 +1,4 @@ -//===-- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ---===// +//===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===// // // The LLVM Compiler Infrastructure // @@ -45,50 +45,58 @@ // // If this pass found points matching all these properties, then // MachineFrameInfo is updated with this information. +// //===----------------------------------------------------------------------===// + #include "llvm/ADT/BitVector.h" #include "llvm/ADT/PostOrderIterator.h" #include "llvm/ADT/SetVector.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" -// To check for profitability. +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" -// For property #1 for Save. #include "llvm/CodeGen/MachineDominators.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" -// To record the result of the analysis. #include "llvm/CodeGen/MachineFrameInfo.h" -// For property #2. +#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineLoopInfo.h" -// For property #1 for Restore. +#include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachinePostDominators.h" -#include "llvm/CodeGen/Passes.h" -// To know about callee-saved. #include "llvm/CodeGen/RegisterClassInfo.h" #include "llvm/CodeGen/RegisterScavenging.h" +#include "llvm/IR/Attributes.h" +#include "llvm/IR/Function.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/Pass.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" -// To query the target about frame lowering. +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetFrameLowering.h" -// To know about frame setup operation. #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -// To access TargetInstrInfo. +#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" - -#define DEBUG_TYPE "shrink-wrap" +#include +#include +#include using namespace llvm; +#define DEBUG_TYPE "shrink-wrap" + STATISTIC(NumFunc, "Number of functions"); STATISTIC(NumCandidates, "Number of shrink-wrapping candidates"); STATISTIC(NumCandidatesDropped, "Number of shrink-wrapping candidates dropped because of frequency"); static cl::opt - EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, - cl::desc("enable the shrink-wrapping pass")); +EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, + cl::desc("enable the shrink-wrapping pass")); namespace { + /// \brief Class to determine where the safe point to insert the /// prologue and epilogue are. /// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the @@ -101,31 +109,42 @@ class ShrinkWrap : public MachineFunctionPass { RegisterClassInfo RCI; MachineDominatorTree *MDT; MachinePostDominatorTree *MPDT; + /// Current safe point found for the prologue. /// The prologue will be inserted before the first instruction /// in this basic block. MachineBasicBlock *Save; + /// Current safe point found for the epilogue. /// The epilogue will be inserted before the first terminator instruction /// in this basic block. MachineBasicBlock *Restore; + /// Hold the information of the basic block frequency. /// Use to check the profitability of the new points. MachineBlockFrequencyInfo *MBFI; + /// Hold the loop information. Used to determine if Save and Restore /// are in the same loop. MachineLoopInfo *MLI; + /// Frequency of the Entry block. uint64_t EntryFreq; + /// Current opcode for frame setup. unsigned FrameSetupOpcode; + /// Current opcode for frame destroy. unsigned FrameDestroyOpcode; + /// Entry block. const MachineBasicBlock *Entry; - typedef SmallSetVector SetOfRegs; + + using SetOfRegs = SmallSetVector; + /// Registers that need to be saved for the current function. mutable SetOfRegs CurrentCSRs; + /// Current MachineFunction. MachineFunction *MachineFunc; @@ -205,9 +224,11 @@ public: /// the MachineFrameInfo attached to \p MF with the results. bool runOnMachineFunction(MachineFunction &MF) override; }; -} // End anonymous namespace. + +} // end anonymous namespace char ShrinkWrap::ID = 0; + char &llvm::ShrinkWrapID = ShrinkWrap::ID; INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false) -- 2.11.0