From 887dfdc03948a3fb88e714349320f4b7250ed455 Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Thu, 23 Sep 1999 13:10:07 +0000 Subject: [PATCH] * hppa.h: Update comments about character usage. --- include/opcode/ChangeLog | 4 ++++ include/opcode/hppa.h | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index c73b592874..f9e6c2e60a 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +Thu Sep 23 07:08:38 1999 Jerry Quinn + + * hppa.h: Update comments about character usage. + Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h index 0900a0d30a..a9a834a238 100644 --- a/include/opcode/hppa.h +++ b/include/opcode/hppa.h @@ -107,7 +107,10 @@ Also these: 31-p ~ 6 bit shift count at 20,22:26 encoded as 63-~. P 5 bit bit position at 26 + q 6 bit bit position at 20,22:26 T 5 bit field length at 31 (encoded as 32-T) + % 6 bit field length at 23,27:31 (variable extract/deposit) + | 6 bit field length at 19,27:31 (fixed extract/deposit) A 13 bit immediate at 18 (to support the BREAK instruction) ^ like b, but describes a control register ! sar (cr11) register @@ -222,7 +225,7 @@ Condition operands all have '?' as the prefix: ?U 64 bit unit conditions Floating point registers all have 'f' as a prefix: - + ft target register at 31 fT target register with L/R halves at 31 fa operand 1 register at 10 -- 2.11.0