From 890a876e0e16cf3b6cbcd69ebdfc75608fbc2537 Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Tue, 26 May 2015 18:35:10 +0000 Subject: [PATCH] Print "lock \t foo" instead of "lock \n foo". This gets gas and llc -filetype=obj to agree on the order of prefixes. For llvm-mc we need to fix the asm parser to know that it makes a difference on which line the "lock" is in. Part of pr23594. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238232 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp | 2 +- test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll | 3 +-- test/CodeGen/X86/2010-01-08-Atomic64Bug.ll | 3 +-- test/CodeGen/X86/2010-10-08-cmpxchg8b.ll | 3 +-- test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll | 3 +-- test/CodeGen/X86/atomic-load-store-wide.ll | 6 ++---- test/CodeGen/X86/atomic-minmax-i6432.ll | 12 ++++-------- test/CodeGen/X86/atomic-or.ll | 6 ++---- test/CodeGen/X86/cmpxchg16b.ll | 3 +-- test/CodeGen/X86/i486-fence-loop.ll | 3 +-- test/CodeGen/X86/pr21099.ll | 3 +-- test/CodeGen/X86/pr5145.ll | 12 ++++-------- 12 files changed, 20 insertions(+), 39 deletions(-) diff --git a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp index e0b6c50415b..af4399a41a0 100644 --- a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp +++ b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp @@ -48,7 +48,7 @@ void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); if (TSFlags & X86II::LOCK) - OS << "\tlock\n"; + OS << "\tlock\t"; // Output CALLpcrel32 as "callq" in 64-bit mode. // In Intel annotation it's always emitted as "call". diff --git a/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll b/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll index 386b028086b..e1ca3fd2a97 100644 --- a/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll +++ b/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll @@ -37,8 +37,7 @@ lt_init.exit: ; preds = %if.end.i, %if.then. %4 = call i64 @llvm.readcyclecounter() nounwind ; [#uses=1] %5 = sub i64 %4, %2 ; [#uses=1] %6 = atomicrmw add i64* getelementptr inbounds ([1216 x i64], [1216 x i64]* @__profiling_callsite_timestamps_live, i32 0, i32 51), i64 %5 monotonic -;CHECK: lock -;CHECK-NEXT: {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live +;CHECK: lock {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live ;CHECK-NEXT: cmpl $0, ;CHECK-NEXT: jne %cmp = icmp eq i32 %3, 0 ; [#uses=1] diff --git a/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll index 850f678c9c2..3391f1f5ec4 100644 --- a/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll +++ b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll @@ -14,8 +14,7 @@ entry: ; CHECK: addl $1, %ebx ; CHECK: movl %edx, %ecx ; CHECK: adcl $0, %ecx -; CHECK: lock -; CHECK-NEXT: cmpxchg8b ([[REG]]) +; CHECK: lock cmpxchg8b ([[REG]]) ; CHECK-NEXT: jne %0 = atomicrmw add i64* %p, i64 1 seq_cst ret void diff --git a/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll b/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll index ebf51a5d660..ee50cb13e63 100644 --- a/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll +++ b/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll @@ -16,8 +16,7 @@ define void @foo(i64* %ptr) nounwind inlinehint { entry: br label %loop loop: -; CHECK: lock -; CHECK-NEXT: cmpxchg8b +; CHECK: lock cmpxchg8b %pair = cmpxchg i64* %ptr, i64 0, i64 1 monotonic monotonic %r = extractvalue { i64, i1 } %pair, 0 %stored1 = icmp eq i64 %r, 0 diff --git a/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll b/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll index 16eef0a28aa..a6c34b8fffa 100644 --- a/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll +++ b/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll @@ -13,8 +13,7 @@ entry: ; Make sure the fence comes before the comparison, since it ; clobbers EFLAGS. -; CHECK: lock -; CHECK-NEXT: orl {{.*}}, (%esp) +; CHECK: lock orl {{.*}}, (%esp) ; CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]] if.then: ; preds = %entry diff --git a/test/CodeGen/X86/atomic-load-store-wide.ll b/test/CodeGen/X86/atomic-load-store-wide.ll index 5c463978ae5..df0af5f7f27 100644 --- a/test/CodeGen/X86/atomic-load-store-wide.ll +++ b/test/CodeGen/X86/atomic-load-store-wide.ll @@ -5,8 +5,7 @@ define void @test1(i64* %ptr, i64 %val1) { ; CHECK-LABEL: test1 -; CHECK: lock -; CHECK-NEXT: cmpxchg8b +; CHECK: lock cmpxchg8b ; CHECK-NEXT: jne store atomic i64 %val1, i64* %ptr seq_cst, align 8 ret void @@ -14,8 +13,7 @@ define void @test1(i64* %ptr, i64 %val1) { define i64 @test2(i64* %ptr) { ; CHECK-LABEL: test2 -; CHECK: lock -; CHECK-NEXT: cmpxchg8b +; CHECK: lock cmpxchg8b %val = load atomic i64, i64* %ptr seq_cst, align 8 ret i64 %val } diff --git a/test/CodeGen/X86/atomic-minmax-i6432.ll b/test/CodeGen/X86/atomic-minmax-i6432.ll index ffb7a3fd6f6..4989bc14ef8 100644 --- a/test/CodeGen/X86/atomic-minmax-i6432.ll +++ b/test/CodeGen/X86/atomic-minmax-i6432.ll @@ -11,8 +11,7 @@ define void @atomic_maxmin_i6432() { ; LINUX: seta ; LINUX: cmovne ; LINUX: cmovne -; LINUX: lock -; LINUX-NEXT: cmpxchg8b +; LINUX: lock cmpxchg8b ; LINUX: jne [[LABEL]] %2 = atomicrmw min i64* @sc64, i64 6 acquire ; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]] @@ -20,8 +19,7 @@ define void @atomic_maxmin_i6432() { ; LINUX: setb ; LINUX: cmovne ; LINUX: cmovne -; LINUX: lock -; LINUX-NEXT: cmpxchg8b +; LINUX: lock cmpxchg8b ; LINUX: jne [[LABEL]] %3 = atomicrmw umax i64* @sc64, i64 7 acquire ; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]] @@ -29,8 +27,7 @@ define void @atomic_maxmin_i6432() { ; LINUX: seta ; LINUX: cmovne ; LINUX: cmovne -; LINUX: lock -; LINUX-NEXT: cmpxchg8b +; LINUX: lock cmpxchg8b ; LINUX: jne [[LABEL]] %4 = atomicrmw umin i64* @sc64, i64 8 acquire ; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]] @@ -38,8 +35,7 @@ define void @atomic_maxmin_i6432() { ; LINUX: setb ; LINUX: cmovne ; LINUX: cmovne -; LINUX: lock -; LINUX-NEXT: cmpxchg8b +; LINUX: lock cmpxchg8b ; LINUX: jne [[LABEL]] ret void } diff --git a/test/CodeGen/X86/atomic-or.ll b/test/CodeGen/X86/atomic-or.ll index 07838468ade..60e9968bdc7 100644 --- a/test/CodeGen/X86/atomic-or.ll +++ b/test/CodeGen/X86/atomic-or.ll @@ -9,8 +9,7 @@ entry: %tmp = load i64*, i64** %p.addr, align 8 ; CHECK-LABEL: t1: ; CHECK: movl $2147483648, %eax -; CHECK: lock -; CHECK-NEXT: orq %r{{.*}}, (%r{{.*}}) +; CHECK: lock orq %r{{.*}}, (%r{{.*}}) %0 = atomicrmw or i64* %tmp, i64 2147483648 seq_cst ret void } @@ -21,8 +20,7 @@ entry: store i64* %p, i64** %p.addr, align 8 %tmp = load i64*, i64** %p.addr, align 8 ; CHECK-LABEL: t2: -; CHECK: lock -; CHECK-NEXT: orq $2147483644, (%r{{.*}}) +; CHECK: lock orq $2147483644, (%r{{.*}}) %0 = atomicrmw or i64* %tmp, i64 2147483644 seq_cst ret void } diff --git a/test/CodeGen/X86/cmpxchg16b.ll b/test/CodeGen/X86/cmpxchg16b.ll index 1d5bb85f8d2..d514c0a35f5 100644 --- a/test/CodeGen/X86/cmpxchg16b.ll +++ b/test/CodeGen/X86/cmpxchg16b.ll @@ -4,8 +4,7 @@ define void @t1(i128* nocapture %p) nounwind ssp { entry: ; CHECK: movl $1, %ebx -; CHECK: lock -; CHECK-NEXT: cmpxchg16b +; CHECK: lock cmpxchg16b %r = cmpxchg i128* %p, i128 0, i128 1 seq_cst seq_cst ret void } diff --git a/test/CodeGen/X86/i486-fence-loop.ll b/test/CodeGen/X86/i486-fence-loop.ll index 96ed0569cf0..936e54eddaf 100644 --- a/test/CodeGen/X86/i486-fence-loop.ll +++ b/test/CodeGen/X86/i486-fence-loop.ll @@ -7,8 +7,7 @@ define void @gst_atomic_queue_push(i32* %addr) { ; CHECK-LABEL: gst_atomic_queue_push: ; CHECK: movl (%eax), [[LHS:%e[a-z]+]] -; CHECK: lock -; CHECK-NEXT: orl +; CHECK: lock orl ; CHECK: movl (%eax), [[RHS:%e[a-z]+]] ; CHECK: cmpl [[LHS]], [[RHS]] diff --git a/test/CodeGen/X86/pr21099.ll b/test/CodeGen/X86/pr21099.ll index 07292c125ee..cd8205dbc81 100644 --- a/test/CodeGen/X86/pr21099.ll +++ b/test/CodeGen/X86/pr21099.ll @@ -2,8 +2,7 @@ define void @pr21099(i64* %p) { ; CHECK-LABEL: pr21099 -; CHECK: lock -; CHECK-NEXT: addq $-2147483648 +; CHECK: lock addq $-2147483648 ; This number is INT32_MIN: 0x80000000UL %1 = atomicrmw add i64* %p, i64 -2147483648 seq_cst ret void diff --git a/test/CodeGen/X86/pr5145.ll b/test/CodeGen/X86/pr5145.ll index 32a797ba138..4dee5f8d7d2 100644 --- a/test/CodeGen/X86/pr5145.ll +++ b/test/CodeGen/X86/pr5145.ll @@ -7,29 +7,25 @@ define void @atomic_maxmin_i8() { ; CHECK: [[LABEL1:\.?LBB[0-9]+_[0-9]+]]: ; CHECK: movsbl ; CHECK: cmpl -; CHECK: lock -; CHECK-NEXT: cmpxchgb +; CHECK: lock cmpxchgb ; CHECK: jne [[LABEL1]] %2 = atomicrmw min i8* @sc8, i8 6 acquire ; CHECK: [[LABEL3:\.?LBB[0-9]+_[0-9]+]]: ; CHECK: movsbl ; CHECK: cmpl -; CHECK: lock -; CHECK-NEXT: cmpxchgb +; CHECK: lock cmpxchgb ; CHECK: jne [[LABEL3]] %3 = atomicrmw umax i8* @sc8, i8 7 acquire ; CHECK: [[LABEL5:\.?LBB[0-9]+_[0-9]+]]: ; CHECK: movzbl ; CHECK: cmpl -; CHECK: lock -; CHECK-NEXT: cmpxchgb +; CHECK: lock cmpxchgb ; CHECK: jne [[LABEL5]] %4 = atomicrmw umin i8* @sc8, i8 8 acquire ; CHECK: [[LABEL7:\.?LBB[0-9]+_[0-9]+]]: ; CHECK: movzbl ; CHECK: cmpl -; CHECK: lock -; CHECK-NEXT: cmpxchgb +; CHECK: lock cmpxchgb ; CHECK: jne [[LABEL7]] ret void } -- 2.11.0