From 8d4b9eddc00ad2c1c8f5bada32750c72f06c1517 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Thu, 7 Jul 2005 17:12:53 +0000 Subject: [PATCH] Restore some code that was accidentally removed by Nate's patch yesterday. This fixes the regressions from last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22344 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelPattern.cpp | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp index fe0772000b5..d7a1c4d01d8 100644 --- a/lib/Target/X86/X86ISelPattern.cpp +++ b/lib/Target/X86/X86ISelPattern.cpp @@ -2379,6 +2379,7 @@ unsigned ISel::SelectExpr(SDOperand N) { // MVT::ValueType PromoteType = MVT::Other; MVT::ValueType SrcTy = N.getOperand(0).getValueType(); + unsigned RealDestReg = Result; switch (SrcTy) { case MVT::i1: case MVT::i8: @@ -2426,7 +2427,25 @@ unsigned ISel::SelectExpr(SDOperand N) { break; default: break; // No promotion required. } - return Result; + + if (Node->getOpcode() == ISD::UINT_TO_FP && Result != RealDestReg) { + // If this is a cast from uint -> double, we need to be careful when if + // the "sign" bit is set. If so, we don't want to make a negative number, + // we want to make a positive number. Emit code to add an offset if the + // sign bit is set. + + // Compute whether the sign bit is set by shifting the reg right 31 bits. + unsigned IsNeg = MakeReg(MVT::i32); + BuildMI(BB, X86::SHR32ri, 2, IsNeg).addReg(Tmp1).addImm(31); + + // Create a CP value that has the offset in one word and 0 in the other. + static ConstantInt *TheOffset = ConstantUInt::get(Type::ULongTy, + 0x4f80000000000000ULL); + unsigned CPI = F->getConstantPool()->getConstantPoolIndex(TheOffset); + BuildMI(BB, X86::FADD32m, 5, RealDestReg).addReg(Result) + .addConstantPoolIndex(CPI).addZImm(4).addReg(IsNeg).addSImm(0); + } + return RealDestReg; } case ISD::FP_TO_SINT: case ISD::FP_TO_UINT: { -- 2.11.0