From 92e0ef7d907a7b39d942732a29c04446a4ef5cac Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 4 Sep 2023 18:12:16 +0200 Subject: [PATCH] target/mips: Clean up local variable shadowing MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Fix: target/mips/tcg/nanomips_translate.c.inc:4410:33: error: declaration shadows a local variable [-Werror,-Wshadow] int32_t imm = extract32(ctx->opcode, 1, 13) | ^ target/mips/tcg/nanomips_translate.c.inc:3577:9: note: previous declaration is here int imm; ^ target/mips/tcg/translate.c:15578:19: error: declaration shadows a local variable [-Werror,-Wshadow] for (unsigned i = 1; i < 32; i++) { ^ target/mips/tcg/translate.c:15567:9: note: previous declaration is here int i; ^ target/mips/tcg/msa_helper.c:7478:13: error: declaration shadows a local variable [-Werror,-Wshadow] MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pws->w[0], 32); ^ target/mips/tcg/msa_helper.c:7434:23: note: expanded from macro 'MSA_FLOAT_MAXOP' float_status *status = &env->active_tc.msa_fp_status; ^ Signed-off-by: Philippe Mathieu-Daudé Message-ID: <20230904161235.84651-5-philmd@linaro.org> Signed-off-by: Markus Armbruster --- target/mips/tcg/msa_helper.c | 8 ++++---- target/mips/tcg/nanomips_translate.c.inc | 6 +++--- target/mips/tcg/translate.c | 8 +++----- 3 files changed, 10 insertions(+), 12 deletions(-) diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c index c314a74397..7a8dbada5d 100644 --- a/target/mips/tcg/msa_helper.c +++ b/target/mips/tcg/msa_helper.c @@ -7432,15 +7432,15 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd, #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \ do { \ - float_status *status = &env->active_tc.msa_fp_status; \ + float_status *status_ = &env->active_tc.msa_fp_status; \ int c; \ \ - set_float_exception_flags(0, status); \ - DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \ + set_float_exception_flags(0, status_); \ + DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status_); \ c = update_msacsr(env, 0, 0); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status_) >> 6) << 6) | c; \ } \ } while (0) diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc index a98dde0d2e..d81a7c2d11 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -4407,8 +4407,8 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx) case NM_BPOSGE32C: check_dsp_r3(ctx); { - int32_t imm = extract32(ctx->opcode, 1, 13) | - extract32(ctx->opcode, 0, 1) << 13; + imm = extract32(ctx->opcode, 1, 13) + | extract32(ctx->opcode, 0, 1) << 13; gen_compute_branch_nm(ctx, OPC_BPOSGE32, 4, -1, -2, imm << 1); @@ -4635,7 +4635,7 @@ static int decode_isa_nanomips(CPUMIPSState *env, DisasContext *ctx) break; case NM_LI16: { - int imm = extract32(ctx->opcode, 0, 7); + imm = extract32(ctx->opcode, 0, 7); imm = (imm == 0x7f ? -1 : imm); if (rt != 0) { tcg_gen_movi_tl(cpu_gpr[rt], imm); diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 9bb40f1849..26d741d960 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -15564,10 +15564,8 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, void mips_tcg_init(void) { - int i; - cpu_gpr[0] = NULL; - for (i = 1; i < 32; i++) + for (unsigned i = 1; i < 32; i++) cpu_gpr[i] = tcg_global_mem_new(cpu_env, offsetof(CPUMIPSState, active_tc.gpr[i]), @@ -15584,7 +15582,7 @@ void mips_tcg_init(void) rname); } #endif /* !TARGET_MIPS64 */ - for (i = 0; i < 32; i++) { + for (unsigned i = 0; i < 32; i++) { int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]); @@ -15592,7 +15590,7 @@ void mips_tcg_init(void) msa_translate_init(); cpu_PC = tcg_global_mem_new(cpu_env, offsetof(CPUMIPSState, active_tc.PC), "PC"); - for (i = 0; i < MIPS_DSP_ACC; i++) { + for (unsigned i = 0; i < MIPS_DSP_ACC; i++) { cpu_HI[i] = tcg_global_mem_new(cpu_env, offsetof(CPUMIPSState, active_tc.HI[i]), regnames_HI[i]); -- 2.11.0