From 94b1031703b1b5759436fe215323727cffce5f86 Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Sat, 24 Oct 2015 15:29:03 -0700 Subject: [PATCH] i965: Remove fixed_hw_reg field from backend_reg. Since backend_reg now inherits brw_reg, we can use it in place of the fixed_hw_reg field. Reviewed-by: Emil Velikov Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs.cpp | 93 +++++++++-------- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 9 +- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 4 +- src/mesa/drivers/dri/i965/brw_ir_fs.h | 4 +- src/mesa/drivers/dri/i965/brw_ir_vec4.h | 4 +- .../drivers/dri/i965/brw_schedule_instructions.cpp | 50 +++++----- src/mesa/drivers/dri/i965/brw_shader.cpp | 8 +- src/mesa/drivers/dri/i965/brw_shader.h | 5 +- src/mesa/drivers/dri/i965/brw_vec4.cpp | 110 +++++++++------------ src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 12 +-- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 - 11 files changed, 139 insertions(+), 162 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 931a8fdbae2..c2d04d970e5 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -423,13 +423,15 @@ fs_reg::fs_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3) (vf3 << 24); } -/** Fixed brw_reg. */ -fs_reg::fs_reg(struct brw_reg fixed_hw_reg) +fs_reg::fs_reg(struct brw_reg reg) : + backend_reg(reg) { - init(); this->file = HW_REG; - this->fixed_hw_reg = fixed_hw_reg; - this->type = fixed_hw_reg.type; + this->reg = 0; + this->reg_offset = 0; + this->subreg_offset = 0; + this->reladdr = NULL; + this->stride = 1; } bool @@ -444,8 +446,7 @@ fs_reg::equals(const fs_reg &r) const abs == r.abs && !reladdr && !r.reladdr && (file != HW_REG || - memcmp(&fixed_hw_reg, &r.fixed_hw_reg, - sizeof(fixed_hw_reg)) == 0) && + memcmp((brw_reg *)this, (brw_reg *)&r, sizeof(brw_reg)) == 0) && (file != IMM || d == r.d) && stride == r.stride); } @@ -469,8 +470,8 @@ unsigned fs_reg::component_size(unsigned width) const { const unsigned stride = (file != HW_REG ? this->stride : - fixed_hw_reg.hstride == 0 ? 0 : - 1 << (fixed_hw_reg.hstride - 1)); + hstride == 0 ? 0 : + 1 << (hstride - 1)); return MAX2(width * stride, 1) * type_sz(type); } @@ -961,7 +962,6 @@ fs_visitor::vgrf(const glsl_type *const type) brw_type_for_base_type(type)); } -/** Fixed HW reg constructor. */ fs_reg::fs_reg(enum register_file file, int reg) { init(); @@ -971,7 +971,6 @@ fs_reg::fs_reg(enum register_file file, int reg) this->stride = (file == UNIFORM ? 0 : 1); } -/** Fixed HW reg constructor. */ fs_reg::fs_reg(enum register_file file, int reg, enum brw_reg_type type) { init(); @@ -1476,10 +1475,11 @@ fs_visitor::assign_curb_setup() struct brw_reg brw_reg = brw_vec1_grf(payload.num_regs + constant_nr / 8, constant_nr % 8); + brw_reg.abs = inst->src[i].abs; + brw_reg.negate = inst->src[i].negate; assert(inst->src[i].stride == 0); - inst->src[i].file = HW_REG; - inst->src[i].fixed_hw_reg = byte_offset( + inst->src[i] = byte_offset( retype(brw_reg, inst->src[i].type), inst->src[i].subreg_offset); } @@ -1595,12 +1595,12 @@ fs_visitor::assign_urb_setup() foreach_block_and_inst(block, fs_inst, inst, cfg) { if (inst->opcode == FS_OPCODE_LINTERP) { assert(inst->src[1].file == HW_REG); - inst->src[1].fixed_hw_reg.nr += urb_start; + inst->src[1].nr += urb_start; } if (inst->opcode == FS_OPCODE_CINTERP) { assert(inst->src[0].file == HW_REG); - inst->src[0].fixed_hw_reg.nr += urb_start; + inst->src[0].nr += urb_start; } } @@ -1618,12 +1618,15 @@ fs_visitor::convert_attr_sources_to_hw_regs(fs_inst *inst) inst->src[i].reg + inst->src[i].reg_offset; - inst->src[i].file = HW_REG; - inst->src[i].fixed_hw_reg = + struct brw_reg reg = stride(byte_offset(retype(brw_vec8_grf(grf, 0), inst->src[i].type), inst->src[i].subreg_offset), inst->exec_size * inst->src[i].stride, inst->exec_size, inst->src[i].stride); + reg.abs = inst->src[i].abs; + reg.negate = inst->src[i].negate; + + inst->src[i] = reg; } } } @@ -2793,7 +2796,7 @@ fs_visitor::emit_repclear_shader() /* Now that we have the uniform assigned, go ahead and force it to a vec4. */ assert(mov->src[0].file == HW_REG); - mov->src[0] = brw_vec4_grf(mov->src[0].fixed_hw_reg.nr, 0); + mov->src[0] = brw_vec4_grf(mov->src[0].nr, 0); } /** @@ -2874,8 +2877,8 @@ clear_deps_for_inst_src(fs_inst *inst, bool *deps, int first_grf, int grf_len) if (inst->src[i].file == GRF) { grf = inst->src[i].reg; } else if (inst->src[i].file == HW_REG && - inst->src[i].fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) { - grf = inst->src[i].fixed_hw_reg.nr; + inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE) { + grf = inst->src[i].nr; } else { continue; } @@ -4627,31 +4630,31 @@ fs_visitor::dump_instruction(backend_instruction *be_inst, FILE *file) fprintf(file, "***attr%d***", inst->dst.reg + inst->dst.reg_offset); break; case HW_REG: - if (inst->dst.fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE) { - switch (inst->dst.fixed_hw_reg.nr) { + if (inst->dst.brw_reg::file == BRW_ARCHITECTURE_REGISTER_FILE) { + switch (inst->dst.nr) { case BRW_ARF_NULL: fprintf(file, "null"); break; case BRW_ARF_ADDRESS: - fprintf(file, "a0.%d", inst->dst.fixed_hw_reg.subnr); + fprintf(file, "a0.%d", inst->dst.subnr); break; case BRW_ARF_ACCUMULATOR: - fprintf(file, "acc%d", inst->dst.fixed_hw_reg.subnr); + fprintf(file, "acc%d", inst->dst.subnr); break; case BRW_ARF_FLAG: - fprintf(file, "f%d.%d", inst->dst.fixed_hw_reg.nr & 0xf, - inst->dst.fixed_hw_reg.subnr); + fprintf(file, "f%d.%d", inst->dst.nr & 0xf, + inst->dst.subnr); break; default: - fprintf(file, "arf%d.%d", inst->dst.fixed_hw_reg.nr & 0xf, - inst->dst.fixed_hw_reg.subnr); + fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, + inst->dst.subnr); break; } } else { - fprintf(file, "hw_reg%d", inst->dst.fixed_hw_reg.nr); + fprintf(file, "hw_reg%d", inst->dst.nr); } - if (inst->dst.fixed_hw_reg.subnr) - fprintf(file, "+%d", inst->dst.fixed_hw_reg.subnr); + if (inst->dst.subnr) + fprintf(file, "+%d", inst->dst.subnr); break; case IMM: unreachable("not reached"); @@ -4715,37 +4718,31 @@ fs_visitor::dump_instruction(backend_instruction *be_inst, FILE *file) } break; case HW_REG: - if (inst->src[i].fixed_hw_reg.negate) - fprintf(file, "-"); - if (inst->src[i].fixed_hw_reg.abs) - fprintf(file, "|"); - if (inst->src[i].fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE) { - switch (inst->src[i].fixed_hw_reg.nr) { + if (inst->src[i].brw_reg::file == BRW_ARCHITECTURE_REGISTER_FILE) { + switch (inst->src[i].nr) { case BRW_ARF_NULL: fprintf(file, "null"); break; case BRW_ARF_ADDRESS: - fprintf(file, "a0.%d", inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "a0.%d", inst->src[i].subnr); break; case BRW_ARF_ACCUMULATOR: - fprintf(file, "acc%d", inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "acc%d", inst->src[i].subnr); break; case BRW_ARF_FLAG: - fprintf(file, "f%d.%d", inst->src[i].fixed_hw_reg.nr & 0xf, - inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "f%d.%d", inst->src[i].nr & 0xf, + inst->src[i].subnr); break; default: - fprintf(file, "arf%d.%d", inst->src[i].fixed_hw_reg.nr & 0xf, - inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "arf%d.%d", inst->src[i].nr & 0xf, + inst->src[i].subnr); break; } } else { - fprintf(file, "hw_reg%d", inst->src[i].fixed_hw_reg.nr); + fprintf(file, "hw_reg%d", inst->src[i].nr); } - if (inst->src[i].fixed_hw_reg.subnr) - fprintf(file, "+%d", inst->src[i].fixed_hw_reg.subnr); - if (inst->src[i].fixed_hw_reg.abs) - fprintf(file, "|"); + if (inst->src[i].subnr) + fprintf(file, "+%d", inst->src[i].subnr); break; } if (inst->src[i].abs) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 9dd574cd14f..6b6b5771298 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -84,6 +84,8 @@ brw_reg_from_fs_reg(fs_inst *inst, fs_reg *reg, unsigned gen) brw_reg = retype(brw_reg, reg->type); brw_reg = byte_offset(brw_reg, reg->subreg_offset); + brw_reg.abs = reg->abs; + brw_reg.negate = reg->negate; break; case IMM: assert(reg->stride == ((reg->type == BRW_REGISTER_TYPE_V || @@ -114,8 +116,7 @@ brw_reg_from_fs_reg(fs_inst *inst, fs_reg *reg, unsigned gen) } break; case HW_REG: - assert(reg->type == reg->fixed_hw_reg.type); - brw_reg = reg->fixed_hw_reg; + brw_reg = *static_cast(reg); break; case BAD_FILE: /* Probably unused. */ @@ -125,10 +126,6 @@ brw_reg_from_fs_reg(fs_inst *inst, fs_reg *reg, unsigned gen) case UNIFORM: unreachable("not reached"); } - if (reg->abs) - brw_reg = brw_abs(brw_reg); - if (reg->negate) - brw_reg = negate(brw_reg); return brw_reg; } diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp index 9251d9552a5..3e0e0e9586b 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp @@ -372,8 +372,8 @@ void fs_visitor::calculate_payload_ranges(int payload_node_count, */ for (int i = 0; i < inst->sources; i++) { if (inst->src[i].file == HW_REG && - inst->src[i].fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) { - int node_nr = inst->src[i].fixed_hw_reg.nr; + inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE) { + int node_nr = inst->src[i].nr; if (node_nr >= payload_node_count) continue; diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h index c0e486e5edc..1f2931af179 100644 --- a/src/mesa/drivers/dri/i965/brw_ir_fs.h +++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h @@ -41,7 +41,7 @@ public: explicit fs_reg(uint32_t u); explicit fs_reg(uint8_t vf[4]); explicit fs_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3); - fs_reg(struct brw_reg fixed_hw_reg); + fs_reg(struct brw_reg reg); fs_reg(enum register_file file, int reg); fs_reg(enum register_file file, int reg, enum brw_reg_type type); @@ -80,7 +80,7 @@ negate(fs_reg reg) static inline fs_reg retype(fs_reg reg, enum brw_reg_type type) { - reg.fixed_hw_reg.type = reg.type = type; + reg.type = type; return reg; } diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h b/src/mesa/drivers/dri/i965/brw_ir_vec4.h index 2fbb043f244..0b2a9258f25 100644 --- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h @@ -63,7 +63,7 @@ public: static inline src_reg retype(src_reg reg, enum brw_reg_type type) { - reg.fixed_hw_reg.type = reg.type = type; + reg.type = type; return reg; } @@ -130,7 +130,7 @@ public: static inline dst_reg retype(dst_reg reg, enum brw_reg_type type) { - reg.fixed_hw_reg.type = reg.type = type; + reg.type = type; return reg; } diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index d21bc677c82..521d04ec17e 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -586,12 +586,12 @@ fs_instruction_scheduler::count_reads_remaining(backend_instruction *be) if (inst->src[i].file == GRF) { reads_remaining[inst->src[i].reg]++; } else if (inst->src[i].file == HW_REG && - inst->src[i].fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) { - if (inst->src[i].fixed_hw_reg.nr >= hw_reg_count) + inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE) { + if (inst->src[i].nr >= hw_reg_count) continue; for (int j = 0; j < inst->regs_read(i); j++) - hw_reads_remaining[inst->src[i].fixed_hw_reg.nr + j]++; + hw_reads_remaining[inst->src[i].nr + j]++; } } } @@ -671,10 +671,10 @@ fs_instruction_scheduler::update_register_pressure(backend_instruction *be) if (inst->src[i].file == GRF) { reads_remaining[inst->src[i].reg]--; } else if (inst->src[i].file == HW_REG && - inst->src[i].fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE && - inst->src[i].fixed_hw_reg.nr < hw_reg_count) { + inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE && + inst->src[i].nr < hw_reg_count) { for (int off = 0; off < inst->regs_read(i); off++) - hw_reads_remaining[inst->src[i].fixed_hw_reg.nr + off]--; + hw_reads_remaining[inst->src[i].nr + off]--; } } } @@ -701,10 +701,10 @@ fs_instruction_scheduler::get_register_pressure_benefit(backend_instruction *be) benefit += v->alloc.sizes[inst->src[i].reg]; if (inst->src[i].file == HW_REG && - inst->src[i].fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE && - inst->src[i].fixed_hw_reg.nr < hw_reg_count) { + inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE && + inst->src[i].nr < hw_reg_count) { for (int off = 0; off < inst->regs_read(i); off++) { - int reg = inst->src[i].fixed_hw_reg.nr + off; + int reg = inst->src[i].nr + off; if (!BITSET_TEST(hw_liveout[block_idx], reg) && hw_reads_remaining[reg] == 1) { benefit++; @@ -960,11 +960,11 @@ fs_instruction_scheduler::calculate_deps() } } } else if (inst->src[i].file == HW_REG && - (inst->src[i].fixed_hw_reg.file == + (inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE)) { if (post_reg_alloc) { for (int r = 0; r < inst->regs_read(i); r++) - add_dep(last_grf_write[inst->src[i].fixed_hw_reg.nr + r], n); + add_dep(last_grf_write[inst->src[i].nr + r], n); } else { add_dep(last_fixed_grf_write, n); } @@ -974,7 +974,7 @@ fs_instruction_scheduler::calculate_deps() inst->src[i].file != IMM && inst->src[i].file != UNIFORM && (inst->src[i].file != HW_REG || - inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) { + inst->src[i].brw_reg::file != BRW_IMMEDIATE_VALUE)) { assert(inst->src[i].file != MRF); add_barrier_deps(n); } @@ -1025,10 +1025,10 @@ fs_instruction_scheduler::calculate_deps() last_mrf_write[reg] = n; } } else if (inst->dst.file == HW_REG && - inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) { + inst->dst.brw_reg::file == BRW_GENERAL_REGISTER_FILE) { if (post_reg_alloc) { for (int r = 0; r < inst->regs_written; r++) - last_grf_write[inst->dst.fixed_hw_reg.nr + r] = n; + last_grf_write[inst->dst.nr + r] = n; } else { last_fixed_grf_write = n; } @@ -1086,11 +1086,11 @@ fs_instruction_scheduler::calculate_deps() } } } else if (inst->src[i].file == HW_REG && - (inst->src[i].fixed_hw_reg.file == + (inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE)) { if (post_reg_alloc) { for (int r = 0; r < inst->regs_read(i); r++) - add_dep(n, last_grf_write[inst->src[i].fixed_hw_reg.nr + r], 0); + add_dep(n, last_grf_write[inst->src[i].nr + r], 0); } else { add_dep(n, last_fixed_grf_write, 0); } @@ -1100,7 +1100,7 @@ fs_instruction_scheduler::calculate_deps() inst->src[i].file != IMM && inst->src[i].file != UNIFORM && (inst->src[i].file != HW_REG || - inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) { + inst->src[i].brw_reg::file != BRW_IMMEDIATE_VALUE)) { assert(inst->src[i].file != MRF); add_barrier_deps(n); } @@ -1150,10 +1150,10 @@ fs_instruction_scheduler::calculate_deps() last_mrf_write[reg] = n; } } else if (inst->dst.file == HW_REG && - inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) { + inst->dst.brw_reg::file == BRW_GENERAL_REGISTER_FILE) { if (post_reg_alloc) { for (int r = 0; r < inst->regs_written; r++) - last_grf_write[inst->dst.fixed_hw_reg.nr + r] = n; + last_grf_write[inst->dst.nr + r] = n; } else { last_fixed_grf_write = n; } @@ -1219,7 +1219,7 @@ vec4_instruction_scheduler::calculate_deps() for (unsigned j = 0; j < inst->regs_read(i); ++j) add_dep(last_grf_write[inst->src[i].reg + j], n); } else if (inst->src[i].file == HW_REG && - (inst->src[i].fixed_hw_reg.file == + (inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE)) { add_dep(last_fixed_grf_write, n); } else if (inst->src[i].is_accumulator()) { @@ -1229,7 +1229,7 @@ vec4_instruction_scheduler::calculate_deps() inst->src[i].file != IMM && inst->src[i].file != UNIFORM && (inst->src[i].file != HW_REG || - inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) { + inst->src[i].brw_reg::file != BRW_IMMEDIATE_VALUE)) { /* No reads from MRF, and ATTR is already translated away */ assert(inst->src[i].file != MRF && inst->src[i].file != ATTR); @@ -1267,7 +1267,7 @@ vec4_instruction_scheduler::calculate_deps() add_dep(last_mrf_write[inst->dst.reg], n); last_mrf_write[inst->dst.reg] = n; } else if (inst->dst.file == HW_REG && - inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) { + inst->dst.brw_reg::file == BRW_GENERAL_REGISTER_FILE) { last_fixed_grf_write = n; } else if (inst->dst.is_accumulator()) { add_dep(last_accumulator_write, n); @@ -1317,7 +1317,7 @@ vec4_instruction_scheduler::calculate_deps() for (unsigned j = 0; j < inst->regs_read(i); ++j) add_dep(n, last_grf_write[inst->src[i].reg + j]); } else if (inst->src[i].file == HW_REG && - (inst->src[i].fixed_hw_reg.file == + (inst->src[i].brw_reg::file == BRW_GENERAL_REGISTER_FILE)) { add_dep(n, last_fixed_grf_write); } else if (inst->src[i].is_accumulator()) { @@ -1326,7 +1326,7 @@ vec4_instruction_scheduler::calculate_deps() inst->src[i].file != IMM && inst->src[i].file != UNIFORM && (inst->src[i].file != HW_REG || - inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) { + inst->src[i].brw_reg::file != BRW_IMMEDIATE_VALUE)) { assert(inst->src[i].file != MRF && inst->src[i].file != ATTR); add_barrier_deps(n); @@ -1360,7 +1360,7 @@ vec4_instruction_scheduler::calculate_deps() } else if (inst->dst.file == MRF) { last_mrf_write[inst->dst.reg] = n; } else if (inst->dst.file == HW_REG && - inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) { + inst->dst.brw_reg::file == BRW_GENERAL_REGISTER_FILE) { last_fixed_grf_write = n; } else if (inst->dst.is_accumulator()) { last_accumulator_write = n; diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index ce0019ff6f9..ca7db9a73ac 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -734,8 +734,8 @@ bool backend_reg::is_null() const { return file == HW_REG && - fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE && - fixed_hw_reg.nr == BRW_ARF_NULL; + brw_reg::file == BRW_ARCHITECTURE_REGISTER_FILE && + nr == BRW_ARF_NULL; } @@ -743,8 +743,8 @@ bool backend_reg::is_accumulator() const { return file == HW_REG && - fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE && - fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR; + brw_reg::file == BRW_ARCHITECTURE_REGISTER_FILE && + nr == BRW_ARF_ACCUMULATOR; } bool diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index 3f435e2b728..086ab607c52 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -51,6 +51,9 @@ enum PACKED register_file { #ifdef __cplusplus struct backend_reg : public brw_reg { + backend_reg() {} + backend_reg(struct brw_reg reg) : brw_reg(reg) {} + bool is_zero() const; bool is_one() const; bool is_negative_one() const; @@ -79,8 +82,6 @@ struct backend_reg : public brw_reg * For uniforms, this is in units of 1 float. */ uint16_t reg_offset; - - struct brw_reg fixed_hw_reg; }; #endif diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 1cb43c3c1f2..9155c2e811d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -119,25 +119,23 @@ src_reg::src_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3) (vf3 << 24); } -src_reg::src_reg(struct brw_reg reg) +src_reg::src_reg(struct brw_reg reg) : + backend_reg(reg) { - init(); - this->file = HW_REG; - this->fixed_hw_reg = reg; - this->type = reg.type; + this->reg = 0; + this->reg_offset = 0; + this->swizzle = BRW_SWIZZLE_XXXX; + this->reladdr = NULL; } -src_reg::src_reg(const dst_reg ®) +src_reg::src_reg(const dst_reg ®) : + backend_reg(static_cast(reg)) { - init(); - this->file = reg.file; this->reg = reg.reg; this->reg_offset = reg.reg_offset; - this->type = reg.type; this->reladdr = reg.reladdr; - this->fixed_hw_reg = reg.fixed_hw_reg; this->swizzle = brw_swizzle_for_mask(reg.writemask); } @@ -184,26 +182,24 @@ dst_reg::dst_reg(register_file file, int reg, brw_reg_type type, this->writemask = writemask; } -dst_reg::dst_reg(struct brw_reg reg) +dst_reg::dst_reg(struct brw_reg reg) : + backend_reg(reg) { - init(); - this->file = HW_REG; - this->fixed_hw_reg = reg; - this->type = reg.type; + this->reg = 0; + this->reg_offset = 0; + this->writemask = WRITEMASK_XYZW; + this->reladdr = NULL; } -dst_reg::dst_reg(const src_reg ®) +dst_reg::dst_reg(const src_reg ®) : + backend_reg(static_cast(reg)) { - init(); - this->file = reg.file; this->reg = reg.reg; this->reg_offset = reg.reg_offset; - this->type = reg.type; this->writemask = brw_mask_for_swizzle(reg.swizzle); this->reladdr = reg.reladdr; - this->fixed_hw_reg = reg.fixed_hw_reg; } bool @@ -219,8 +215,7 @@ dst_reg::equals(const dst_reg &r) const (reladdr == r.reladdr || (reladdr && r.reladdr && reladdr->equals(*r.reladdr))) && (file != HW_REG || - memcmp(&fixed_hw_reg, &r.fixed_hw_reg, - sizeof(fixed_hw_reg)) == 0)); + memcmp((brw_reg *)this, (brw_reg *)&r, sizeof(brw_reg)) == 0)); } bool @@ -364,8 +359,7 @@ src_reg::equals(const src_reg &r) const swizzle == r.swizzle && !reladdr && !r.reladdr && (file != HW_REG || - memcmp(&fixed_hw_reg, &r.fixed_hw_reg, - sizeof(fixed_hw_reg)) == 0) && + memcmp((brw_reg *)this, (brw_reg *)&r, sizeof(brw_reg)) == 0) && (file != IMM || d == r.d)); } @@ -969,9 +963,9 @@ vec4_visitor::opt_set_dependency_control() last_mrf_write[reg] = inst; mrf_channels_written[reg] |= inst->dst.writemask; } else if (inst->dst.reg == HW_REG) { - if (inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) + if (inst->dst.brw_reg::file == BRW_GENERAL_REGISTER_FILE) memset(last_grf_write, 0, sizeof(last_grf_write)); - if (inst->dst.fixed_hw_reg.file == BRW_MESSAGE_REGISTER_FILE) + if (inst->dst.brw_reg::file == BRW_MESSAGE_REGISTER_FILE) memset(last_mrf_write, 0, sizeof(last_mrf_write)); } } @@ -1400,31 +1394,31 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file) fprintf(file, "m%d", inst->dst.reg); break; case HW_REG: - if (inst->dst.fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE) { - switch (inst->dst.fixed_hw_reg.nr) { + if (inst->dst.brw_reg::file == BRW_ARCHITECTURE_REGISTER_FILE) { + switch (inst->dst.nr) { case BRW_ARF_NULL: fprintf(file, "null"); break; case BRW_ARF_ADDRESS: - fprintf(file, "a0.%d", inst->dst.fixed_hw_reg.subnr); + fprintf(file, "a0.%d", inst->dst.subnr); break; case BRW_ARF_ACCUMULATOR: - fprintf(file, "acc%d", inst->dst.fixed_hw_reg.subnr); + fprintf(file, "acc%d", inst->dst.subnr); break; case BRW_ARF_FLAG: - fprintf(file, "f%d.%d", inst->dst.fixed_hw_reg.nr & 0xf, - inst->dst.fixed_hw_reg.subnr); + fprintf(file, "f%d.%d", inst->dst.nr & 0xf, + inst->dst.subnr); break; default: - fprintf(file, "arf%d.%d", inst->dst.fixed_hw_reg.nr & 0xf, - inst->dst.fixed_hw_reg.subnr); + fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, + inst->dst.subnr); break; } } else { - fprintf(file, "hw_reg%d", inst->dst.fixed_hw_reg.nr); + fprintf(file, "hw_reg%d", inst->dst.nr); } - if (inst->dst.fixed_hw_reg.subnr) - fprintf(file, "+%d", inst->dst.fixed_hw_reg.subnr); + if (inst->dst.subnr) + fprintf(file, "+%d", inst->dst.subnr); break; case BAD_FILE: fprintf(file, "(null)"); @@ -1489,37 +1483,31 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file) } break; case HW_REG: - if (inst->src[i].fixed_hw_reg.negate) - fprintf(file, "-"); - if (inst->src[i].fixed_hw_reg.abs) - fprintf(file, "|"); - if (inst->src[i].fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE) { - switch (inst->src[i].fixed_hw_reg.nr) { + if (inst->src[i].brw_reg::file == BRW_ARCHITECTURE_REGISTER_FILE) { + switch (inst->src[i].nr) { case BRW_ARF_NULL: fprintf(file, "null"); break; case BRW_ARF_ADDRESS: - fprintf(file, "a0.%d", inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "a0.%d", inst->src[i].subnr); break; case BRW_ARF_ACCUMULATOR: - fprintf(file, "acc%d", inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "acc%d", inst->src[i].subnr); break; case BRW_ARF_FLAG: - fprintf(file, "f%d.%d", inst->src[i].fixed_hw_reg.nr & 0xf, - inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "f%d.%d", inst->src[i].nr & 0xf, + inst->src[i].subnr); break; default: - fprintf(file, "arf%d.%d", inst->src[i].fixed_hw_reg.nr & 0xf, - inst->src[i].fixed_hw_reg.subnr); + fprintf(file, "arf%d.%d", inst->src[i].nr & 0xf, + inst->src[i].subnr); break; } } else { - fprintf(file, "hw_reg%d", inst->src[i].fixed_hw_reg.nr); + fprintf(file, "hw_reg%d", inst->src[i].nr); } - if (inst->src[i].fixed_hw_reg.subnr) - fprintf(file, "+%d", inst->src[i].fixed_hw_reg.subnr); - if (inst->src[i].fixed_hw_reg.abs) - fprintf(file, "|"); + if (inst->src[i].subnr) + fprintf(file, "+%d", inst->src[i].subnr); break; case BAD_FILE: fprintf(file, "(null)"); @@ -1600,8 +1588,7 @@ vec4_visitor::lower_attributes_to_hw_regs(const int *attribute_map, reg.type = inst->dst.type; reg.writemask = inst->dst.writemask; - inst->dst.file = HW_REG; - inst->dst.fixed_hw_reg = reg; + inst->dst = reg; } for (int i = 0; i < 3; i++) { @@ -1623,8 +1610,7 @@ vec4_visitor::lower_attributes_to_hw_regs(const int *attribute_map, if (inst->src[i].negate) reg = negate(reg); - inst->src[i].file = HW_REG; - inst->src[i].fixed_hw_reg = reg; + inst->src[i] = reg; } } } @@ -1836,7 +1822,6 @@ vec4_visitor::convert_to_hw_regs() break; case HW_REG: - assert(src.type == src.fixed_hw_reg.type); continue; case BAD_FILE: @@ -1848,7 +1833,7 @@ vec4_visitor::convert_to_hw_regs() case ATTR: unreachable("not reached"); } - src.fixed_hw_reg = reg; + src = reg; } dst_reg &dst = inst->dst; @@ -1869,8 +1854,7 @@ vec4_visitor::convert_to_hw_regs() break; case HW_REG: - assert(dst.type == dst.fixed_hw_reg.type); - reg = dst.fixed_hw_reg; + reg = dst; break; case BAD_FILE: @@ -1883,7 +1867,7 @@ vec4_visitor::convert_to_hw_regs() unreachable("not reached"); } - dst.fixed_hw_reg = reg; + dst = reg; } } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index 74d67cb0820..20107ac2054 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -356,7 +356,7 @@ generate_gs_urb_write_allocate(struct brw_codegen *p, vec4_instruction *inst) /* We pass the temporary passed in src0 as the writeback register */ brw_urb_WRITE(p, - inst->src[0].fixed_hw_reg, /* dest */ + inst->src[0], /* dest */ inst->base_mrf, /* starting mrf reg nr */ src, BRW_URB_WRITE_ALLOCATE_COMPLETE, @@ -369,8 +369,8 @@ generate_gs_urb_write_allocate(struct brw_codegen *p, vec4_instruction *inst) brw_push_insn_state(p); brw_set_default_access_mode(p, BRW_ALIGN_1); brw_set_default_mask_control(p, BRW_MASK_DISABLE); - brw_MOV(p, get_element_ud(inst->dst.fixed_hw_reg, 0), - get_element_ud(inst->src[0].fixed_hw_reg, 0)); + brw_MOV(p, get_element_ud(inst->dst, 0), + get_element_ud(inst->src[0], 0)); brw_pop_insn_state(p); } @@ -1059,9 +1059,9 @@ generate_code(struct brw_codegen *p, annotate(p->devinfo, &annotation, cfg, inst, p->next_insn_offset); for (unsigned int i = 0; i < 3; i++) { - src[i] = inst->src[i].fixed_hw_reg; + src[i] = inst->src[i]; } - dst = inst->dst.fixed_hw_reg; + dst = inst->dst; brw_set_default_predicate_control(p, inst->predicate); brw_set_default_predicate_inverse(p, inst->predicate_inverse); @@ -1241,7 +1241,7 @@ generate_code(struct brw_codegen *p, break; case BRW_OPCODE_IF: - if (inst->src[0].file != BAD_FILE) { + if (!inst->src[0].is_null()) { /* The instruction has an embedded compare (only allowed on gen6) */ assert(devinfo->gen == 6); gen6_IF(p, inst->conditional_mod, src[0], src[1]); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index ecabedfe614..7b11ac1675d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -237,8 +237,6 @@ vec4_visitor::CMP(dst_reg dst, src_reg src0, src_reg src1, * type to match src0 so we can compact the instruction. */ dst.type = src0.type; - if (dst.file == HW_REG) - dst.fixed_hw_reg.type = dst.type; resolve_ud_negate(&src0); resolve_ud_negate(&src1); -- 2.11.0