From 971d51cd6fad1840609269911e8e036adb69f700 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 17 Oct 2017 04:17:55 +0000 Subject: [PATCH] [X86] Add AVX512BW to the vector-shuffle-masked test to prepare for an upcoming commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315970 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/vector-shuffle-masked.ll | 266 +++++++++++++++--------------- 1 file changed, 133 insertions(+), 133 deletions(-) diff --git a/test/CodeGen/X86/vector-shuffle-masked.ll b/test/CodeGen/X86/vector-shuffle-masked.ll index 8d535cec689..9eab8ee391b 100644 --- a/test/CodeGen/X86/vector-shuffle-masked.ll +++ b/test/CodeGen/X86/vector-shuffle-masked.ll @@ -1,10 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefix=CHECK define <4 x i32> @mask_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v4i32_1234: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} xmm2 {%k1} = xmm0[1,2,3],xmm1[0] ; CHECK-NEXT: vmovdqa %xmm2, %xmm0 ; CHECK-NEXT: retq @@ -18,7 +18,7 @@ define <4 x i32> @mask_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, <4 x i32> define <4 x i32> @maskz_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v4i32_1234: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} xmm0 {%k1} {z} = xmm0[1,2,3],xmm1[0] ; CHECK-NEXT: retq %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -31,7 +31,7 @@ define <4 x i32> @maskz_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, i8 %mask) define <4 x i32> @mask_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v4i32_2345: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} xmm2 {%k1} = xmm0[2,3],xmm1[0,1] ; CHECK-NEXT: vmovdqa %xmm2, %xmm0 ; CHECK-NEXT: retq @@ -45,7 +45,7 @@ define <4 x i32> @mask_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, <4 x i32> define <4 x i32> @maskz_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v4i32_2345: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} xmm0 {%k1} {z} = xmm0[2,3],xmm1[0,1] ; CHECK-NEXT: retq %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -58,7 +58,7 @@ define <4 x i32> @maskz_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, i8 %mask) define <2 x i64> @mask_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v2i64_12: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignq {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[0] ; CHECK-NEXT: vmovdqa %xmm2, %xmm0 ; CHECK-NEXT: retq @@ -72,7 +72,7 @@ define <2 x i64> @mask_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, <2 x i64> %p define <2 x i64> @maskz_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v2i64_12: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignq {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[0] ; CHECK-NEXT: retq %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> @@ -85,7 +85,7 @@ define <2 x i64> @maskz_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, i8 %mask) { define <4 x i64> @mask_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, <4 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v4i64_1234: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignq {{.*#+}} ymm2 {%k1} = ymm0[1,2,3],ymm1[0] ; CHECK-NEXT: vmovdqa %ymm2, %ymm0 ; CHECK-NEXT: retq @@ -99,7 +99,7 @@ define <4 x i64> @mask_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, <4 x i64> define <4 x i64> @maskz_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v4i64_1234: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3],ymm1[0] ; CHECK-NEXT: retq %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> @@ -112,7 +112,7 @@ define <4 x i64> @maskz_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, i8 %mask) define <4 x i64> @mask_shuffle_v4i64_1230(<4 x i64> %a, <4 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v4i64_1230: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpermq {{.*#+}} ymm1 {%k1} = ymm0[1,2,3,0] ; CHECK-NEXT: vmovdqa %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -126,7 +126,7 @@ define <4 x i64> @mask_shuffle_v4i64_1230(<4 x i64> %a, <4 x i64> %passthru, i8 define <4 x i64> @maskz_shuffle_v4i64_1230(<4 x i64> %a, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v4i64_1230: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,0] ; CHECK-NEXT: retq %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> @@ -139,7 +139,7 @@ define <4 x i64> @maskz_shuffle_v4i64_1230(<4 x i64> %a, i8 %mask) { define <8 x i32> @mask_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v8i32_12345678: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} ymm2 {%k1} = ymm0[1,2,3,4,5,6,7],ymm1[0] ; CHECK-NEXT: vmovdqa %ymm2, %ymm0 ; CHECK-NEXT: retq @@ -152,7 +152,7 @@ define <8 x i32> @mask_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, <8 x i define <8 x i32> @maskz_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v8i32_12345678: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,4,5,6,7],ymm1[0] ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> @@ -164,7 +164,7 @@ define <8 x i32> @maskz_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, i8 %m define <8 x i32> @mask_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v8i32_23456789: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} ymm2 {%k1} = ymm0[2,3,4,5,6,7],ymm1[0,1] ; CHECK-NEXT: vmovdqa %ymm2, %ymm0 ; CHECK-NEXT: retq @@ -177,7 +177,7 @@ define <8 x i32> @mask_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, <8 x i define <8 x i32> @maskz_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v8i32_23456789: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[2,3,4,5,6,7],ymm1[0,1] ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> @@ -189,7 +189,7 @@ define <8 x i32> @maskz_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, i8 %m define <8 x i32> @mask_shuffle_v8i32_12345670(<8 x i32> %a, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_shuffle_v8i32_12345670: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} ymm1 {%k1} = ymm0[1,2,3,4,5,6,7,0] ; CHECK-NEXT: vmovdqa %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -202,7 +202,7 @@ define <8 x i32> @mask_shuffle_v8i32_12345670(<8 x i32> %a, <8 x i32> %passthru, define <8 x i32> @maskz_shuffle_v8i32_12345670(<8 x i32> %a, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v8i32_12345670: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,4,5,6,7,0] ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> @@ -215,7 +215,7 @@ define <8 x i32> @mask_shuffle_v8i32_23456701(<8 x i32> %a, <8 x i32> %passthru, ; CHECK-LABEL: mask_shuffle_v8i32_23456701: ; CHECK: # BB#0: ; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,2,3,0] -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> @@ -228,7 +228,7 @@ define <8 x i32> @maskz_shuffle_v8i32_23456701(<8 x i32> %a, i8 %mask) { ; CHECK-LABEL: maskz_shuffle_v8i32_23456701: ; CHECK: # BB#0: ; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,2,3,0] -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> @@ -240,7 +240,7 @@ define <8 x i32> @maskz_shuffle_v8i32_23456701(<8 x i32> %a, i8 %mask) { define <4 x i32> @mask_extract_v8i32_v4i32_0(<8 x i32> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i32_v4i32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -254,7 +254,7 @@ define <4 x i32> @mask_extract_v8i32_v4i32_0(<8 x i32> %a, <4 x i32> %passthru, define <4 x i32> @mask_extract_v8i32_v4i32_0_z(<8 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i32_v4i32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -268,7 +268,7 @@ define <4 x i32> @mask_extract_v8i32_v4i32_0_z(<8 x i32> %a, i8 %mask) { define <4 x i32> @mask_extract_v8i32_v4i32_1(<8 x i32> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i32_v4i32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $1, %ymm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -283,7 +283,7 @@ define <4 x i32> @mask_extract_v8i32_v4i32_1(<8 x i32> %a, <4 x i32> %passthru, define <4 x i32> @mask_extract_v8i32_v4i32_1_z(<8 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i32_v4i32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $1, %ymm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -297,7 +297,7 @@ define <4 x i32> @mask_extract_v8i32_v4i32_1_z(<8 x i32> %a, i8 %mask) { define <4 x float> @mask_extract_v8f32_v4f32_0(<8 x float> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f32_v4f32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmps %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -311,7 +311,7 @@ define <4 x float> @mask_extract_v8f32_v4f32_0(<8 x float> %a, <4 x float> %pass define <4 x float> @mask_extract_v8f32_v4f32_0_z(<8 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f32_v4f32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovaps %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -325,7 +325,7 @@ define <4 x float> @mask_extract_v8f32_v4f32_0_z(<8 x float> %a, i8 %mask) { define <4 x float> @mask_extract_v8f32_v4f32_1(<8 x float> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f32_v4f32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $1, %ymm0, %xmm1 {%k1} ; CHECK-NEXT: vmovaps %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -340,7 +340,7 @@ define <4 x float> @mask_extract_v8f32_v4f32_1(<8 x float> %a, <4 x float> %pass define <4 x float> @mask_extract_v8f32_v4f32_1_z(<8 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f32_v4f32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $1, %ymm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -354,7 +354,7 @@ define <4 x float> @mask_extract_v8f32_v4f32_1_z(<8 x float> %a, i8 %mask) { define <2 x i64> @mask_extract_v4i64_v2i64_0(<4 x i64> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v4i64_v2i64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmq %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -368,7 +368,7 @@ define <2 x i64> @mask_extract_v4i64_v2i64_0(<4 x i64> %a, <2 x i64> %passthru, define <2 x i64> @mask_extract_v4i64_v2i64_0_z(<4 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v4i64_v2i64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa64 %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -382,7 +382,7 @@ define <2 x i64> @mask_extract_v4i64_v2i64_0_z(<4 x i64> %a, i8 %mask) { define <2 x i64> @mask_extract_v4i64_v2i64_1(<4 x i64> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v4i64_v2i64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $1, %ymm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -397,7 +397,7 @@ define <2 x i64> @mask_extract_v4i64_v2i64_1(<4 x i64> %a, <2 x i64> %passthru, define <2 x i64> @mask_extract_v4i64_v2i64_1_z(<4 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v4i64_v2i64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $1, %ymm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -411,7 +411,7 @@ define <2 x i64> @mask_extract_v4i64_v2i64_1_z(<4 x i64> %a, i8 %mask) { define <2 x double> @mask_extract_v4f64_v2f64_0(<4 x double> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v4f64_v2f64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmpd %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -425,7 +425,7 @@ define <2 x double> @mask_extract_v4f64_v2f64_0(<4 x double> %a, <2 x double> %p define <2 x double> @mask_extract_v4f64_v2f64_0_z(<4 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v4f64_v2f64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovapd %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -439,7 +439,7 @@ define <2 x double> @mask_extract_v4f64_v2f64_0_z(<4 x double> %a, i8 %mask) { define <2 x double> @mask_extract_v4f64_v2f64_1(<4 x double> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v4f64_v2f64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $1, %ymm0, %xmm1 {%k1} ; CHECK-NEXT: vmovapd %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -454,7 +454,7 @@ define <2 x double> @mask_extract_v4f64_v2f64_1(<4 x double> %a, <2 x double> %p define <2 x double> @mask_extract_v4f64_v2f64_1_z(<4 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v4f64_v2f64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $1, %ymm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -468,7 +468,7 @@ define <2 x double> @mask_extract_v4f64_v2f64_1_z(<4 x double> %a, i8 %mask) { define <4 x i32> @mask_extract_v16i32_v4i32_0(<16 x i32> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v4i32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -482,7 +482,7 @@ define <4 x i32> @mask_extract_v16i32_v4i32_0(<16 x i32> %a, <4 x i32> %passthru define <4 x i32> @mask_extract_v16i32_v4i32_0_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v4i32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -496,7 +496,7 @@ define <4 x i32> @mask_extract_v16i32_v4i32_0_z(<16 x i32> %a, i8 %mask) { define <4 x i32> @mask_extract_v16i32_v4i32_1(<16 x i32> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v4i32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -511,7 +511,7 @@ define <4 x i32> @mask_extract_v16i32_v4i32_1(<16 x i32> %a, <4 x i32> %passthru define <4 x i32> @mask_extract_v16i32_v4i32_1_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v4i32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -525,7 +525,7 @@ define <4 x i32> @mask_extract_v16i32_v4i32_1_z(<16 x i32> %a, i8 %mask) { define <4 x i32> @mask_extract_v16i32_v4i32_2(<16 x i32> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v4i32_2: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $2, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -540,7 +540,7 @@ define <4 x i32> @mask_extract_v16i32_v4i32_2(<16 x i32> %a, <4 x i32> %passthru define <4 x i32> @mask_extract_v16i32_v4i32_3(<16 x i32> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v4i32_3: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $3, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -555,7 +555,7 @@ define <4 x i32> @mask_extract_v16i32_v4i32_3(<16 x i32> %a, <4 x i32> %passthru define <4 x float> @mask_extract_v16f32_v4f32_0(<16 x float> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v4f32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmps %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -569,7 +569,7 @@ define <4 x float> @mask_extract_v16f32_v4f32_0(<16 x float> %a, <4 x float> %pa define <4 x float> @mask_extract_v16f32_v4f32_0_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v4f32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovaps %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -583,7 +583,7 @@ define <4 x float> @mask_extract_v16f32_v4f32_0_z(<16 x float> %a, i8 %mask) { define <4 x float> @mask_extract_v16f32_v4f32_1(<16 x float> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v4f32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovaps %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -598,7 +598,7 @@ define <4 x float> @mask_extract_v16f32_v4f32_1(<16 x float> %a, <4 x float> %pa define <4 x float> @mask_extract_v16f32_v4f32_1_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v4f32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -612,7 +612,7 @@ define <4 x float> @mask_extract_v16f32_v4f32_1_z(<16 x float> %a, i8 %mask) { define <4 x float> @mask_extract_v16f32_v4f32_2(<16 x float> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v4f32_2: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $2, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovaps %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -627,7 +627,7 @@ define <4 x float> @mask_extract_v16f32_v4f32_2(<16 x float> %a, <4 x float> %pa define <4 x float> @mask_extract_v16f32_v4f32_3(<16 x float> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v4f32_3: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $3, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovaps %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -642,7 +642,7 @@ define <4 x float> @mask_extract_v16f32_v4f32_3(<16 x float> %a, <4 x float> %pa define <8 x i32> @mask_extract_v16i32_v8i32_0(<16 x i32> %a, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v8i32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> @@ -654,7 +654,7 @@ define <8 x i32> @mask_extract_v16i32_v8i32_0(<16 x i32> %a, <8 x i32> %passthru define <8 x i32> @mask_extract_v16i32_v8i32_0_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v8i32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> @@ -666,7 +666,7 @@ define <8 x i32> @mask_extract_v16i32_v8i32_0_z(<16 x i32> %a, i8 %mask) { define <8 x i32> @mask_extract_v16i32_v8i32_1(<16 x i32> %a, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v8i32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x8 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovdqa %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -679,7 +679,7 @@ define <8 x i32> @mask_extract_v16i32_v8i32_1(<16 x i32> %a, <8 x i32> %passthru define <8 x i32> @mask_extract_v16i32_v8i32_1_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16i32_v8i32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x8 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> @@ -691,7 +691,7 @@ define <8 x i32> @mask_extract_v16i32_v8i32_1_z(<16 x i32> %a, i8 %mask) { define <8 x float> @mask_extract_v16f32_v8f32_0(<16 x float> %a, <8 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v8f32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmps %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> @@ -703,7 +703,7 @@ define <8 x float> @mask_extract_v16f32_v8f32_0(<16 x float> %a, <8 x float> %pa define <8 x float> @mask_extract_v16f32_v8f32_0_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v8f32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovaps %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> @@ -715,7 +715,7 @@ define <8 x float> @mask_extract_v16f32_v8f32_0_z(<16 x float> %a, i8 %mask) { define <8 x float> @mask_extract_v16f32_v8f32_1(<16 x float> %a, <8 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v8f32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x8 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovaps %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -728,7 +728,7 @@ define <8 x float> @mask_extract_v16f32_v8f32_1(<16 x float> %a, <8 x float> %pa define <8 x float> @mask_extract_v16f32_v8f32_1_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v16f32_v8f32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x8 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> @@ -740,7 +740,7 @@ define <8 x float> @mask_extract_v16f32_v8f32_1_z(<16 x float> %a, i8 %mask) { define <2 x i64> @mask_extract_v8i64_v2i64_0(<8 x i64> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v2i64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmq %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -754,7 +754,7 @@ define <2 x i64> @mask_extract_v8i64_v2i64_0(<8 x i64> %a, <2 x i64> %passthru, define <2 x i64> @mask_extract_v8i64_v2i64_0_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v2i64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa64 %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -768,7 +768,7 @@ define <2 x i64> @mask_extract_v8i64_v2i64_0_z(<8 x i64> %a, i8 %mask) { define <2 x i64> @mask_extract_v8i64_v2i64_1(<8 x i64> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v2i64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -783,7 +783,7 @@ define <2 x i64> @mask_extract_v8i64_v2i64_1(<8 x i64> %a, <2 x i64> %passthru, define <2 x i64> @mask_extract_v8i64_v2i64_1_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v2i64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -797,7 +797,7 @@ define <2 x i64> @mask_extract_v8i64_v2i64_1_z(<8 x i64> %a, i8 %mask) { define <2 x i64> @mask_extract_v8i64_v2i64_2(<8 x i64> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v2i64_2: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $2, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -812,7 +812,7 @@ define <2 x i64> @mask_extract_v8i64_v2i64_2(<8 x i64> %a, <2 x i64> %passthru, define <2 x i64> @mask_extract_v8i64_v2i64_3(<8 x i64> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v2i64_3: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $3, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -827,7 +827,7 @@ define <2 x i64> @mask_extract_v8i64_v2i64_3(<8 x i64> %a, <2 x i64> %passthru, define <2 x double> @mask_extract_v8f64_v2f64_0(<8 x double> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v2f64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmpd %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -841,7 +841,7 @@ define <2 x double> @mask_extract_v8f64_v2f64_0(<8 x double> %a, <2 x double> %p define <2 x double> @mask_extract_v8f64_v2f64_0_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v2f64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovapd %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -855,7 +855,7 @@ define <2 x double> @mask_extract_v8f64_v2f64_0_z(<8 x double> %a, i8 %mask) { define <2 x double> @mask_extract_v8f64_v2f64_1(<8 x double> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v2f64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovapd %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -870,7 +870,7 @@ define <2 x double> @mask_extract_v8f64_v2f64_1(<8 x double> %a, <2 x double> %p define <2 x double> @mask_extract_v8f64_v2f64_1_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v2f64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -884,7 +884,7 @@ define <2 x double> @mask_extract_v8f64_v2f64_1_z(<8 x double> %a, i8 %mask) { define <2 x double> @mask_extract_v8f64_v2f64_2(<8 x double> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v2f64_2: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $2, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovapd %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -899,7 +899,7 @@ define <2 x double> @mask_extract_v8f64_v2f64_2(<8 x double> %a, <2 x double> %p define <2 x double> @mask_extract_v8f64_v2f64_3(<8 x double> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v2f64_3: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $3, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovapd %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -914,7 +914,7 @@ define <2 x double> @mask_extract_v8f64_v2f64_3(<8 x double> %a, <2 x double> %p define <4 x i64> @mask_extract_v8i64_v4i64_0(<8 x i64> %a, <4 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v4i64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmq %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> @@ -927,7 +927,7 @@ define <4 x i64> @mask_extract_v8i64_v4i64_0(<8 x i64> %a, <4 x i64> %passthru, define <4 x i64> @mask_extract_v8i64_v4i64_0_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v4i64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa64 %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> @@ -940,7 +940,7 @@ define <4 x i64> @mask_extract_v8i64_v4i64_0_z(<8 x i64> %a, i8 %mask) { define <4 x i64> @mask_extract_v8i64_v4i64_1(<8 x i64> %a, <4 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v4i64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovdqa %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -954,7 +954,7 @@ define <4 x i64> @mask_extract_v8i64_v4i64_1(<8 x i64> %a, <4 x i64> %passthru, define <4 x i64> @mask_extract_v8i64_v4i64_1_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8i64_v4i64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> @@ -967,7 +967,7 @@ define <4 x i64> @mask_extract_v8i64_v4i64_1_z(<8 x i64> %a, i8 %mask) { define <4 x double> @mask_extract_v8f64_v4f64_0(<8 x double> %a, <4 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v4f64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmpd %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> @@ -980,7 +980,7 @@ define <4 x double> @mask_extract_v8f64_v4f64_0(<8 x double> %a, <4 x double> %p define <4 x double> @mask_extract_v8f64_v4f64_0_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v4f64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovapd %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> @@ -993,7 +993,7 @@ define <4 x double> @mask_extract_v8f64_v4f64_0_z(<8 x double> %a, i8 %mask) { define <4 x double> @mask_extract_v8f64_v4f64_1(<8 x double> %a, <4 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v4f64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x4 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovapd %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -1007,7 +1007,7 @@ define <4 x double> @mask_extract_v8f64_v4f64_1(<8 x double> %a, <4 x double> %p define <4 x double> @mask_extract_v8f64_v4f64_1_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_extract_v8f64_v4f64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x4 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> @@ -1020,7 +1020,7 @@ define <4 x double> @mask_extract_v8f64_v4f64_1_z(<8 x double> %a, i8 %mask) { define <8 x i32> @mask_cast_extract_v8i64_v8i32_0(<8 x i64> %a, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v8i32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> @@ -1033,7 +1033,7 @@ define <8 x i32> @mask_cast_extract_v8i64_v8i32_0(<8 x i64> %a, <8 x i32> %passt define <8 x i32> @mask_cast_extract_v8i64_v8i32_0_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v8i32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> @@ -1046,7 +1046,7 @@ define <8 x i32> @mask_cast_extract_v8i64_v8i32_0_z(<8 x i64> %a, i8 %mask) { define <8 x i32> @mask_cast_extract_v8i64_v8i32_1(<8 x i64> %a, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v8i32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x8 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovdqa %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -1060,7 +1060,7 @@ define <8 x i32> @mask_cast_extract_v8i64_v8i32_1(<8 x i64> %a, <8 x i32> %passt define <8 x i32> @mask_cast_extract_v8i64_v8i32_1_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v8i32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x8 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x i64> %a, <8 x i64> undef, <4 x i32> @@ -1073,7 +1073,7 @@ define <8 x i32> @mask_cast_extract_v8i64_v8i32_1_z(<8 x i64> %a, i8 %mask) { define <8 x float> @mask_cast_extract_v8f64_v8f32_0(<8 x double> %a, <8 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v8f32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmps %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> @@ -1086,7 +1086,7 @@ define <8 x float> @mask_cast_extract_v8f64_v8f32_0(<8 x double> %a, <8 x float> define <8 x float> @mask_cast_extract_v8f64_v8f32_0_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v8f32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovaps %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> @@ -1099,7 +1099,7 @@ define <8 x float> @mask_cast_extract_v8f64_v8f32_0_z(<8 x double> %a, i8 %mask) define <8 x float> @mask_cast_extract_v8f64_v8f32_1(<8 x double> %a, <8 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v8f32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x8 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovaps %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -1113,7 +1113,7 @@ define <8 x float> @mask_cast_extract_v8f64_v8f32_1(<8 x double> %a, <8 x float> define <8 x float> @mask_cast_extract_v8f64_v8f32_1_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v8f32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x8 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <8 x double> %a, <8 x double> undef, <4 x i32> @@ -1126,7 +1126,7 @@ define <8 x float> @mask_cast_extract_v8f64_v8f32_1_z(<8 x double> %a, i8 %mask) define <4 x i32> @mask_cast_extract_v8i64_v4i32_0(<8 x i64> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v4i32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1141,7 +1141,7 @@ define <4 x i32> @mask_cast_extract_v8i64_v4i32_0(<8 x i64> %a, <4 x i32> %passt define <4 x i32> @mask_cast_extract_v8i64_v4i32_0_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v4i32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1156,7 +1156,7 @@ define <4 x i32> @mask_cast_extract_v8i64_v4i32_0_z(<8 x i64> %a, i8 %mask) { define <4 x i32> @mask_cast_extract_v8i64_v4i32_1(<8 x i64> %a, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v4i32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -1172,7 +1172,7 @@ define <4 x i32> @mask_cast_extract_v8i64_v4i32_1(<8 x i64> %a, <4 x i32> %passt define <4 x i32> @mask_cast_extract_v8i64_v4i32_1_z(<8 x i64> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8i64_v4i32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti32x4 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1187,7 +1187,7 @@ define <4 x i32> @mask_cast_extract_v8i64_v4i32_1_z(<8 x i64> %a, i8 %mask) { define <4 x float> @mask_cast_extract_v8f64_v4f32_0(<8 x double> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v4f32_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmps %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1202,7 +1202,7 @@ define <4 x float> @mask_cast_extract_v8f64_v4f32_0(<8 x double> %a, <4 x float> define <4 x float> @mask_cast_extract_v8f64_v4f32_0_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v4f32_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovaps %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1217,7 +1217,7 @@ define <4 x float> @mask_cast_extract_v8f64_v4f32_0_z(<8 x double> %a, i8 %mask) define <4 x float> @mask_cast_extract_v8f64_v4f32_1(<8 x double> %a, <4 x float> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v4f32_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovaps %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -1233,7 +1233,7 @@ define <4 x float> @mask_cast_extract_v8f64_v4f32_1(<8 x double> %a, <4 x float> define <4 x float> @mask_cast_extract_v8f64_v4f32_1_z(<8 x double> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v8f64_v4f32_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf32x4 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1248,7 +1248,7 @@ define <4 x float> @mask_cast_extract_v8f64_v4f32_1_z(<8 x double> %a, i8 %mask) define <4 x i64> @mask_cast_extract_v16i32_v4i64_0(<16 x i32> %a, <4 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v4i64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmq %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> @@ -1262,7 +1262,7 @@ define <4 x i64> @mask_cast_extract_v16i32_v4i64_0(<16 x i32> %a, <4 x i64> %pas define <4 x i64> @mask_cast_extract_v16i32_v4i64_0_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v4i64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa64 %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> @@ -1276,7 +1276,7 @@ define <4 x i64> @mask_cast_extract_v16i32_v4i64_0_z(<16 x i32> %a, i8 %mask) { define <4 x i64> @mask_cast_extract_v16i32_v4i64_1(<16 x i32> %a, <4 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v4i64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovdqa %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -1291,7 +1291,7 @@ define <4 x i64> @mask_cast_extract_v16i32_v4i64_1(<16 x i32> %a, <4 x i64> %pas define <4 x i64> @mask_cast_extract_v16i32_v4i64_1_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v4i64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x i32> %a, <16 x i32> undef, <8 x i32> @@ -1305,7 +1305,7 @@ define <4 x i64> @mask_cast_extract_v16i32_v4i64_1_z(<16 x i32> %a, i8 %mask) { define <4 x double> @mask_cast_extract_v16f32_v4f64_0(<16 x float> %a, <4 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v4f64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmpd %ymm0, %ymm1, %ymm0 {%k1} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> @@ -1319,7 +1319,7 @@ define <4 x double> @mask_cast_extract_v16f32_v4f64_0(<16 x float> %a, <4 x doub define <4 x double> @mask_cast_extract_v16f32_v4f64_0_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v4f64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovapd %ymm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> @@ -1333,7 +1333,7 @@ define <4 x double> @mask_cast_extract_v16f32_v4f64_0_z(<16 x float> %a, i8 %mas define <4 x double> @mask_cast_extract_v16f32_v4f64_1(<16 x float> %a, <4 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v4f64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x4 $1, %zmm0, %ymm1 {%k1} ; CHECK-NEXT: vmovapd %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -1348,7 +1348,7 @@ define <4 x double> @mask_cast_extract_v16f32_v4f64_1(<16 x float> %a, <4 x doub define <4 x double> @mask_cast_extract_v16f32_v4f64_1_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v4f64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x4 $1, %zmm0, %ymm0 {%k1} {z} ; CHECK-NEXT: retq %shuffle = shufflevector <16 x float> %a, <16 x float> undef, <8 x i32> @@ -1362,7 +1362,7 @@ define <4 x double> @mask_cast_extract_v16f32_v4f64_1_z(<16 x float> %a, i8 %mas define <2 x i64> @mask_cast_extract_v16i32_v2i64_0(<16 x i32> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v2i64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vpblendmq %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1377,7 +1377,7 @@ define <2 x i64> @mask_cast_extract_v16i32_v2i64_0(<16 x i32> %a, <2 x i64> %pas define <2 x i64> @mask_cast_extract_v16i32_v2i64_0_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v2i64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovdqa64 %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1392,7 +1392,7 @@ define <2 x i64> @mask_cast_extract_v16i32_v2i64_0_z(<16 x i32> %a, i8 %mask) { define <2 x i64> @mask_cast_extract_v16i32_v2i64_1(<16 x i32> %a, <2 x i64> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v2i64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -1408,7 +1408,7 @@ define <2 x i64> @mask_cast_extract_v16i32_v2i64_1(<16 x i32> %a, <2 x i64> %pas define <2 x i64> @mask_cast_extract_v16i32_v2i64_1_z(<16 x i32> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16i32_v2i64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextracti64x2 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1423,7 +1423,7 @@ define <2 x i64> @mask_cast_extract_v16i32_v2i64_1_z(<16 x i32> %a, i8 %mask) { define <2 x double> @mask_cast_extract_v16f32_v2f64_0(<16 x float> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v2f64_0: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmpd %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1438,7 +1438,7 @@ define <2 x double> @mask_cast_extract_v16f32_v2f64_0(<16 x float> %a, <2 x doub define <2 x double> @mask_cast_extract_v16f32_v2f64_0_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v2f64_0_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovapd %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1453,7 +1453,7 @@ define <2 x double> @mask_cast_extract_v16f32_v2f64_0_z(<16 x float> %a, i8 %mas define <2 x double> @mask_cast_extract_v16f32_v2f64_1(<16 x float> %a, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v2f64_1: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $1, %zmm0, %xmm1 {%k1} ; CHECK-NEXT: vmovapd %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper @@ -1469,7 +1469,7 @@ define <2 x double> @mask_cast_extract_v16f32_v2f64_1(<16 x float> %a, <2 x doub define <2 x double> @mask_cast_extract_v16f32_v2f64_1_z(<16 x float> %a, i8 %mask) { ; CHECK-LABEL: mask_cast_extract_v16f32_v2f64_1_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vextractf64x2 $1, %zmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq @@ -1484,7 +1484,7 @@ define <2 x double> @mask_cast_extract_v16f32_v2f64_1_z(<16 x float> %a, i8 %mas define <2 x double> @broadcast_v4f32_0101_from_v2f32_mask(double* %x, <2 x double> %passthru, i8 %mask) { ; CHECK-LABEL: broadcast_v4f32_0101_from_v2f32_mask: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 {%k1} = mem[0,0] ; CHECK-NEXT: retq %q = load double, double* %x, align 1 @@ -1499,7 +1499,7 @@ define <2 x double> @broadcast_v4f32_0101_from_v2f32_mask(double* %x, <2 x doubl define <2 x double> @broadcast_v4f32_0101_from_v2f32_maskz(double* %x, i8 %mask) { ; CHECK-LABEL: broadcast_v4f32_0101_from_v2f32_maskz: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 {%k1} {z} = mem[0,0] ; CHECK-NEXT: retq %q = load double, double* %x, align 1 @@ -1514,7 +1514,7 @@ define <2 x double> @broadcast_v4f32_0101_from_v2f32_maskz(double* %x, i8 %mask) define <8 x float> @test_broadcast_2f64_8f32(<2 x double> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_2f64_8f32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcastf32x4 {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,3,0,1,2,3] ; CHECK-NEXT: retq %1 = load <2 x double>, <2 x double> *%p @@ -1528,7 +1528,7 @@ define <8 x float> @test_broadcast_2f64_8f32(<2 x double> *%p, i8 %mask) nounwin define <8 x i32> @test_broadcast_2i64_8i32(<2 x i64> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_2i64_8i32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcasti32x4 {{.*#+}} ymm0 {%k1} {z} = mem[0,1,2,3,0,1,2,3] ; CHECK-NEXT: retq %1 = load <2 x i64>, <2 x i64> *%p @@ -1542,7 +1542,7 @@ define <8 x i32> @test_broadcast_2i64_8i32(<2 x i64> *%p, i8 %mask) nounwind { define <16 x float> @test_broadcast_2f64_16f32(<2 x double> *%p, i16 %mask) nounwind { ; CHECK-LABEL: test_broadcast_2f64_16f32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcastf32x4 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; CHECK-NEXT: retq %1 = load <2 x double>, <2 x double> *%p @@ -1556,7 +1556,7 @@ define <16 x float> @test_broadcast_2f64_16f32(<2 x double> *%p, i16 %mask) noun define <16 x i32> @test_broadcast_2i64_16i32(<2 x i64> *%p, i16 %mask) nounwind { ; CHECK-LABEL: test_broadcast_2i64_16i32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; CHECK-NEXT: retq %1 = load <2 x i64>, <2 x i64> *%p @@ -1570,7 +1570,7 @@ define <16 x i32> @test_broadcast_2i64_16i32(<2 x i64> *%p, i16 %mask) nounwind define <16 x float> @test_broadcast_4f64_16f32(<4 x double> *%p, i16 %mask) nounwind { ; CHECK-LABEL: test_broadcast_4f64_16f32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcastf32x8 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7] ; CHECK-NEXT: retq %1 = load <4 x double>, <4 x double> *%p @@ -1584,7 +1584,7 @@ define <16 x float> @test_broadcast_4f64_16f32(<4 x double> *%p, i16 %mask) noun define <16 x i32> @test_broadcast_4i64_16i32(<4 x i64> *%p, i16 %mask) nounwind { ; CHECK-LABEL: test_broadcast_4i64_16i32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcasti32x8 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7] ; CHECK-NEXT: retq %1 = load <4 x i64>, <4 x i64> *%p @@ -1598,7 +1598,7 @@ define <16 x i32> @test_broadcast_4i64_16i32(<4 x i64> *%p, i16 %mask) nounwind define <4 x double> @test_broadcast_4f32_4f64(<4 x float> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_4f32_4f64: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcastf64x2 {{.*#+}} ymm0 {%k1} {z} = mem[0,1,0,1] ; CHECK-NEXT: retq %1 = load <4 x float>, <4 x float> *%p @@ -1613,7 +1613,7 @@ define <4 x double> @test_broadcast_4f32_4f64(<4 x float> *%p, i8 %mask) nounwin define <4 x i64> @test_broadcast_4i32_4i64(<4 x i32> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_4i32_4i64: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcasti64x2 {{.*#+}} ymm0 {%k1} {z} = mem[0,1,0,1] ; CHECK-NEXT: retq %1 = load <4 x i32>, <4 x i32> *%p @@ -1628,7 +1628,7 @@ define <4 x i64> @test_broadcast_4i32_4i64(<4 x i32> *%p, i8 %mask) nounwind { define <8 x double> @test_broadcast_4f32_8f64(<4 x float> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_4f32_8f64: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcastf64x2 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,0,1,0,1,0,1] ; CHECK-NEXT: retq %1 = load <4 x float>, <4 x float> *%p @@ -1642,7 +1642,7 @@ define <8 x double> @test_broadcast_4f32_8f64(<4 x float> *%p, i8 %mask) nounwin define <8 x i64> @test_broadcast_4i32_8i64(<4 x i32> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_4i32_8i64: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcasti64x2 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,0,1,0,1,0,1] ; CHECK-NEXT: retq %1 = load <4 x i32>, <4 x i32> *%p @@ -1656,7 +1656,7 @@ define <8 x i64> @test_broadcast_4i32_8i64(<4 x i32> *%p, i8 %mask) nounwind { define <8 x double> @test_broadcast_8f32_8f64(<8 x float> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_8f32_8f64: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcastf64x4 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,0,1,2,3] ; CHECK-NEXT: retq %1 = load <8 x float>, <8 x float> *%p @@ -1670,7 +1670,7 @@ define <8 x double> @test_broadcast_8f32_8f64(<8 x float> *%p, i8 %mask) nounwin define <8 x i64> @test_broadcast_8i32_8i64(<8 x i32> *%p, i8 %mask) nounwind { ; CHECK-LABEL: test_broadcast_8i32_8i64: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %esi, %k1 +; CHECK-NEXT: kmovd %esi, %k1 ; CHECK-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 {%k1} {z} = mem[0,1,2,3,0,1,2,3] ; CHECK-NEXT: retq %1 = load <8 x i32>, <8 x i32> *%p @@ -1685,7 +1685,7 @@ define <4 x float> @test_broadcastf32x2_v4f32(<4 x float> %vec, <4 x float> %pas ; CHECK-LABEL: test_broadcastf32x2_v4f32: ; CHECK: # BB#0: ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vblendmps %xmm0, %xmm1, %xmm0 {%k1} ; CHECK-NEXT: retq %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> @@ -1699,7 +1699,7 @@ define <4 x float> @test_broadcastf32x2_v4f32_z(<4 x float> %vec, i8 %mask) { ; CHECK-LABEL: test_broadcastf32x2_v4f32_z: ; CHECK: # BB#0: ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vmovaps %xmm0, %xmm0 {%k1} {z} ; CHECK-NEXT: retq %shuf = shufflevector <4 x float> %vec, <4 x float> undef, <4 x i32> @@ -1712,7 +1712,7 @@ define <4 x float> @test_broadcastf32x2_v4f32_z(<4 x float> %vec, i8 %mask) { define <4 x i32> @test_broadcasti32x2_v4i32(<4 x i32> %vec, <4 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: test_broadcasti32x2_v4i32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1] ; CHECK-NEXT: vmovdqa %xmm1, %xmm0 ; CHECK-NEXT: retq @@ -1726,7 +1726,7 @@ define <4 x i32> @test_broadcasti32x2_v4i32(<4 x i32> %vec, <4 x i32> %passthru, define <4 x i32> @test_broadcasti32x2_v4i32_z(<4 x i32> %vec, i8 %mask) { ; CHECK-LABEL: test_broadcasti32x2_v4i32_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1] ; CHECK-NEXT: retq %shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> @@ -1739,7 +1739,7 @@ define <4 x i32> @test_broadcasti32x2_v4i32_z(<4 x i32> %vec, i8 %mask) { define <8 x float> @test_broadcastf32x2_v8f32(<8 x float> %vec, <8 x float> %passthru, i8 %mask) { ; CHECK-LABEL: test_broadcastf32x2_v8f32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcastf32x2 {{.*#+}} ymm1 {%k1} = xmm0[0,1,0,1,0,1,0,1] ; CHECK-NEXT: vmovapd %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -1752,7 +1752,7 @@ define <8 x float> @test_broadcastf32x2_v8f32(<8 x float> %vec, <8 x float> %pas define <8 x float> @test_broadcastf32x2_v8f32_z(<8 x float> %vec, i8 %mask) { ; CHECK-LABEL: test_broadcastf32x2_v8f32_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcastf32x2 {{.*#+}} ymm0 {%k1} {z} = xmm0[0,1,0,1,0,1,0,1] ; CHECK-NEXT: retq %shuf = shufflevector <8 x float> %vec, <8 x float> undef, <8 x i32> @@ -1764,7 +1764,7 @@ define <8 x float> @test_broadcastf32x2_v8f32_z(<8 x float> %vec, i8 %mask) { define <8 x i32> @test_broadcasti32x2_v8i32(<8 x i32> %vec, <8 x i32> %passthru, i8 %mask) { ; CHECK-LABEL: test_broadcasti32x2_v8i32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} ymm1 {%k1} = xmm0[0,1,0,1,0,1,0,1] ; CHECK-NEXT: vmovdqa %ymm1, %ymm0 ; CHECK-NEXT: retq @@ -1777,7 +1777,7 @@ define <8 x i32> @test_broadcasti32x2_v8i32(<8 x i32> %vec, <8 x i32> %passthru, define <8 x i32> @test_broadcasti32x2_v8i32_z(<8 x i32> %vec, i8 %mask) { ; CHECK-LABEL: test_broadcasti32x2_v8i32_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} ymm0 {%k1} {z} = xmm0[0,1,0,1,0,1,0,1] ; CHECK-NEXT: retq %shuf = shufflevector <8 x i32> %vec, <8 x i32> undef, <8 x i32> @@ -1789,7 +1789,7 @@ define <8 x i32> @test_broadcasti32x2_v8i32_z(<8 x i32> %vec, i8 %mask) { define <16 x float> @test_broadcastf32x2_v16f32_z(<16 x float> %vec, i16 %mask) { ; CHECK-LABEL: test_broadcastf32x2_v16f32_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcastf32x2 {{.*#+}} zmm0 {%k1} {z} = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1] ; CHECK-NEXT: retq %shuf = shufflevector <16 x float> %vec, <16 x float> undef, <16 x i32> @@ -1801,7 +1801,7 @@ define <16 x float> @test_broadcastf32x2_v16f32_z(<16 x float> %vec, i16 %mask) define <16 x i32> @test_broadcasti32x2_v16i32(<16 x i32> %vec, <16 x i32> %passthru, i16 %mask) { ; CHECK-LABEL: test_broadcasti32x2_v16i32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} zmm1 {%k1} = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1] ; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0 ; CHECK-NEXT: retq @@ -1814,7 +1814,7 @@ define <16 x i32> @test_broadcasti32x2_v16i32(<16 x i32> %vec, <16 x i32> %passt define <16 x float> @test_broadcastf32x2_v16f32(<16 x float> %vec, <16 x float> %passthru, i16 %mask) { ; CHECK-LABEL: test_broadcastf32x2_v16f32: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcastf32x2 {{.*#+}} zmm1 {%k1} = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1] ; CHECK-NEXT: vmovapd %zmm1, %zmm0 ; CHECK-NEXT: retq @@ -1827,7 +1827,7 @@ define <16 x float> @test_broadcastf32x2_v16f32(<16 x float> %vec, <16 x float> define <16 x i32> @test_broadcasti32x2_v16i32_z(<16 x i32> %vec, i16 %mask) { ; CHECK-LABEL: test_broadcasti32x2_v16i32_z: ; CHECK: # BB#0: -; CHECK-NEXT: kmovw %edi, %k1 +; CHECK-NEXT: kmovd %edi, %k1 ; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} zmm0 {%k1} {z} = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1] ; CHECK-NEXT: retq %shuf = shufflevector <16 x i32> %vec, <16 x i32> undef, <16 x i32> -- 2.11.0