From 973fb5e174b0d4c27d479abe1c632730c91e80cf Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Tue, 29 Dec 2020 12:47:37 +0100 Subject: [PATCH] arm64: dts: ls1046a: use constants in the clockgen phandle Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 73 +++++++++++++++++--------- 1 file changed, 48 insertions(+), 25 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index d3f5e48c58dd..f581a6d1f881 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -8,6 +8,7 @@ * Mingkai Hu */ +#include #include #include @@ -39,7 +40,7 @@ device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x0>; - clocks = <&clockgen 1 0>; + clocks = <&clockgen QORIQ_CLK_CMUX 0>; next-level-cache = <&l2>; cpu-idle-states = <&CPU_PH20>; #cooling-cells = <2>; @@ -49,7 +50,7 @@ device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x1>; - clocks = <&clockgen 1 0>; + clocks = <&clockgen QORIQ_CLK_CMUX 0>; next-level-cache = <&l2>; cpu-idle-states = <&CPU_PH20>; #cooling-cells = <2>; @@ -59,7 +60,7 @@ device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x2>; - clocks = <&clockgen 1 0>; + clocks = <&clockgen QORIQ_CLK_CMUX 0>; next-level-cache = <&l2>; cpu-idle-states = <&CPU_PH20>; #cooling-cells = <2>; @@ -69,7 +70,7 @@ device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x3>; - clocks = <&clockgen 1 0>; + clocks = <&clockgen QORIQ_CLK_CMUX 0>; next-level-cache = <&l2>; cpu-idle-states = <&CPU_PH20>; #cooling-cells = <2>; @@ -295,7 +296,10 @@ reg-names = "QuadSPI", "QuadSPI-memory"; interrupts = ; clock-names = "qspi_en", "qspi"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -303,7 +307,7 @@ compatible = "fsl,ls1046a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 2 1>; + clocks = <&clockgen QORIQ_CLK_HWACCEL 1>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; big-endian; @@ -479,7 +483,8 @@ reg = <0x0 0x2100000 0x0 0x10000>; interrupts = ; clock-names = "dspi"; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; spi-num-chipselects = <5>; big-endian; status = "disabled"; @@ -491,7 +496,8 @@ #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; dmas = <&edma0 1 39>, <&edma0 1 38>; dma-names = "tx", "rx"; @@ -504,7 +510,8 @@ #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -514,7 +521,8 @@ #size-cells = <0>; reg = <0x0 0x21a0000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -524,7 +532,8 @@ #size-cells = <0>; reg = <0x0 0x21b0000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -532,7 +541,8 @@ compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0500 0x0 0x100>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -540,7 +550,8 @@ compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0600 0x0 0x100>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -548,7 +559,8 @@ compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21d0500 0x0 0x100>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -556,7 +568,8 @@ compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21d0600 0x0 0x100>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; status = "disabled"; }; @@ -604,7 +617,8 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2950000 0x0 0x1000>; interrupts = ; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; clock-names = "ipg"; status = "disabled"; }; @@ -613,7 +627,8 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2960000 0x0 0x1000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; clock-names = "ipg"; status = "disabled"; }; @@ -622,7 +637,8 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2970000 0x0 0x1000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; clock-names = "ipg"; status = "disabled"; }; @@ -631,7 +647,8 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2980000 0x0 0x1000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; clock-names = "ipg"; status = "disabled"; }; @@ -640,7 +657,8 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2990000 0x0 0x1000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; clock-names = "ipg"; status = "disabled"; }; @@ -649,7 +667,8 @@ compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x29a0000 0x0 0x1000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; clock-names = "ipg"; status = "disabled"; }; @@ -658,7 +677,8 @@ compatible = "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; big-endian; }; @@ -674,8 +694,10 @@ dma-channels = <32>; big-endian; clock-names = "dmamux0", "dmamux1"; - clocks = <&clockgen 4 1>, - <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; }; usb0: usb@2f00000 { @@ -714,7 +736,8 @@ <0x0 0x20140520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; interrupts = ; - clocks = <&clockgen 4 1>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; }; msi1: msi-controller@1580000 { -- 2.11.0