From 97cd3cf9b0e856e7a35bd8c8e6d302d18858577f Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Fri, 8 Jul 2011 22:49:34 +0000 Subject: [PATCH] Add an fma TableGen node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134762 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetSelectionDAG.td | 1 + 1 file changed, 1 insertion(+) diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td index 285b8b1abda..9d1ef2c1372 100644 --- a/include/llvm/Target/TargetSelectionDAG.td +++ b/include/llvm/Target/TargetSelectionDAG.td @@ -353,6 +353,7 @@ def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>; def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>; def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>; def frem : SDNode<"ISD::FREM" , SDTFPBinOp>; +def fma : SDNode<"ISD::FMA" , SDTFPTernaryOp>; def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>; def fgetsign : SDNode<"ISD::FGETSIGN" , SDTFPToIntOp>; def fneg : SDNode<"ISD::FNEG" , SDTFPUnaryOp>; -- 2.11.0