From 98fc0243ef7b0ce1e11061738756b0827c0d3c42 Mon Sep 17 00:00:00 2001 From: Lyude Date: Wed, 24 May 2017 15:42:41 -0400 Subject: [PATCH] nvc0: Add support for ARB_post_depth_coverage Reviewed-by: Samuel Pitoiset Reviewed-by: Ilia Mirkin --- docs/relnotes/17.2.0.html | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 3 +++ src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 2 ++ src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_program.h | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c | 5 +++++ 9 files changed, 16 insertions(+), 1 deletion(-) diff --git a/docs/relnotes/17.2.0.html b/docs/relnotes/17.2.0.html index 426bb72a51e..135d1e81ddc 100644 --- a/docs/relnotes/17.2.0.html +++ b/docs/relnotes/17.2.0.html @@ -44,6 +44,7 @@ Note: some of the new features are only available with certain drivers.

    +
  • GL_ARB_post_depth_coverage on nvc0 (GM200+)
  • GL_ARB_shader_viewport_layer_array on nvc0 (GM200+)
  • GL_AMD_vertex_shader_layer on nvc0 (GM200+)
  • GL_AMD_vertex_shader_viewport_index on nvc0 (GM200+)
    • diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h index 1962ead35a0..76f08b1c3dc 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h @@ -137,6 +137,7 @@ struct nv50_ir_prog_info unsigned numColourResults; bool writesDepth; bool earlyFragTests; + bool postDepthCoverage; bool separateFragData; bool usesDiscard; bool persampleInvocation; diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index b5830011317..1264dd4834e 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -1277,6 +1277,9 @@ void Source::scanProperty(const struct tgsi_full_property *prop) case TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL: info->prop.fp.earlyFragTests = prop->u[0].Data; break; + case TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE: + info->prop.fp.postDepthCoverage = prop->u[0].Data; + break; case TGSI_PROPERTY_MUL_ZERO_WINS: info->io.mul_zero_wins = prop->u[0].Data; break; diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h b/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h index accde94f641..d7245fbcae1 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h @@ -631,6 +631,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NVC0_3D_UNK0F00__ESIZE 0x00000004 #define NVC0_3D_UNK0F00__LEN 0x00000004 +#define NVC0_3D_POST_DEPTH_COVERAGE 0x00000f1c + #define NVE4_3D_UNK0F20(i0) (0x00000f20 + 0x4*(i0)) #define NVE4_3D_UNK0F20__ESIZE 0x00000004 #define NVE4_3D_UNK0F20__LEN 0x00000005 diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c index 27740bc87f2..e43a8de9f59 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c @@ -487,6 +487,7 @@ nvc0_fp_gen_header(struct nvc0_program *fp, struct nv50_ir_prog_info *info) fp->fp.early_z = info->prop.fp.earlyFragTests; fp->fp.sample_mask_in = info->prop.fp.usesSampleMaskIn; fp->fp.reads_framebuffer = info->prop.fp.readsFramebuffer; + fp->fp.post_depth_coverage = info->prop.fp.postDepthCoverage; /* Mark position xy and layer as read */ if (fp->fp.reads_framebuffer) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h index 421ca191d0a..b73822ea9f7 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h @@ -50,6 +50,7 @@ struct nvc0_program { bool force_persample_interp; bool flatshade; bool reads_framebuffer; + bool post_depth_coverage; } fp; struct { uint32_t tess_mode; /* ~0 if defined by the other stage */ diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index cf376a631a1..cf31b6c9ba3 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -267,6 +267,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT: + case PIPE_CAP_POST_DEPTH_COVERAGE: return class_3d >= GM200_3D_CLASS; case PIPE_CAP_TGSI_BALLOT: return class_3d >= NVE4_3D_CLASS; @@ -299,7 +300,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: case PIPE_CAP_INT64_DIVMOD: case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE: - case PIPE_CAP_POST_DEPTH_COVERAGE: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h index 9e0211b14b6..de0a02d9cb8 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h @@ -55,6 +55,7 @@ struct nvc0_graph_state { uint32_t uniform_buffer_bound[6]; struct nvc0_transform_feedback_state *tfb; bool seamless_cube_map; + bool post_depth_coverage; }; struct nvc0_screen { diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c index a8c814fb372..697bf491a01 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c @@ -146,6 +146,11 @@ nvc0_fragprog_validate(struct nvc0_context *nvc0) nvc0->state.early_z_forced = fp->fp.early_z; IMMED_NVC0(push, NVC0_3D(FORCE_EARLY_FRAGMENT_TESTS), fp->fp.early_z); } + if (fp->fp.post_depth_coverage != nvc0->state.post_depth_coverage) { + nvc0->state.post_depth_coverage = fp->fp.post_depth_coverage; + IMMED_NVC0(push, NVC0_3D(POST_DEPTH_COVERAGE), + fp->fp.post_depth_coverage); + } BEGIN_NVC0(push, NVC0_3D(SP_SELECT(5)), 2); PUSH_DATA (push, 0x51); -- 2.11.0