From 9a66e13290f16be59ac38e1955e15e8929076fc6 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 21 Jan 2015 00:56:00 +0200 Subject: [PATCH] usb: isp1760: Move PORT1 configuration to core code Configuring the mode of operation of port 1 doesn't belong to the HCD code, as it's related to the soon to come UDC support. Move the configuration to core code. Signed-off-by: Laurent Pinchart Signed-off-by: Felipe Balbi --- drivers/usb/host/isp1760-core.c | 8 ++++++++ drivers/usb/host/isp1760-hcd.c | 9 --------- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/usb/host/isp1760-core.c b/drivers/usb/host/isp1760-core.c index e840a1d3676b..1cba3e08898a 100644 --- a/drivers/usb/host/isp1760-core.c +++ b/drivers/usb/host/isp1760-core.c @@ -67,6 +67,14 @@ static void isp1760_init_core(struct isp1760_device *isp) isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode); isp1760_write32(isp->regs, HC_HW_MODE_CTRL, hwmode); + /* + * PORT 1 Control register of the ISP1760 is the OTG control register on + * ISP1761. Since there is no OTG or device controller support in this + * driver, we use port 1 as a "normal" USB host port on both chips. + */ + isp1760_write32(isp->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2); + usleep_range(10000, 11000); + dev_info(isp->dev, "bus width: %u, oc: %s\n", isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32, isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital"); diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c index 5309d7324485..568446c9ce8d 100644 --- a/drivers/usb/host/isp1760-hcd.c +++ b/drivers/usb/host/isp1760-hcd.c @@ -503,15 +503,6 @@ static int isp1760_hc_setup(struct usb_hcd *hcd) reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK); - /* - * PORT 1 Control register of the ISP1760 is the OTG control - * register on ISP1761. Since there is no OTG or device controller - * support in this driver, we use port 1 as a "normal" USB host port on - * both chips. - */ - reg_write32(hcd->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2); - mdelay(10); - priv->hcs_params = reg_read32(hcd->regs, HC_HCSPARAMS); return priv_init(hcd); -- 2.11.0