From 9aad54d5c7ae9c0b24ba28d367f5b3b00e751cc5 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 4 Dec 2020 12:51:53 +1000 Subject: [PATCH] drm/nouveau/tmr: switch to instanced constructor Signed-off-by: Ben Skeggs Reviewed-by: Lyude Paul --- drivers/gpu/drm/nouveau/include/nvkm/core/device.h | 2 - drivers/gpu/drm/nouveau/include/nvkm/core/layout.h | 1 + .../gpu/drm/nouveau/include/nvkm/subdev/timer.h | 8 +- drivers/gpu/drm/nouveau/nvkm/core/subdev.c | 1 - drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 175 ++++++++++----------- drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c | 4 +- drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.c | 5 +- drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.c | 5 +- drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.c | 5 +- drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.c | 5 +- drivers/gpu/drm/nouveau/nvkm/subdev/timer/priv.h | 4 +- 11 files changed, 108 insertions(+), 107 deletions(-) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h index 8141095c7d55..f0b9de0f289f 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h @@ -60,7 +60,6 @@ struct nvkm_device { struct notifier_block nb; } acpi; - struct nvkm_timer *timer; struct nvkm_top *top; struct nvkm_volt *volt; @@ -126,7 +125,6 @@ struct nvkm_device_chip { #include #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE - int (*timer )(struct nvkm_device *, int idx, struct nvkm_timer **); int (*top )(struct nvkm_device *, int idx, struct nvkm_top **); int (*volt )(struct nvkm_device *, int idx, struct nvkm_volt **); diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h index 9f72dd124796..248376cb552c 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h @@ -9,6 +9,7 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FUSE , struct nvkm_fuse , fuse) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_MXM , struct nvkm_subdev , mxm) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_MC , struct nvkm_mc , mc) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_BUS , struct nvkm_bus , bus) +NVKM_LAYOUT_ONCE(NVKM_SUBDEV_TIMER , struct nvkm_timer , timer) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_INSTMEM , struct nvkm_instmem , imem) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FB , struct nvkm_fb , fb) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_LTC , struct nvkm_ltc , ltc) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/timer.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/timer.h index d06dcbe1faa6..439a3f72b0d7 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/timer.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/timer.h @@ -76,8 +76,8 @@ s64 nvkm_timer_wait_test(struct nvkm_timer_wait *); #define nvkm_wait_msec(d,m,addr,mask,data) \ nvkm_wait_usec((d), (m) * 1000, (addr), (mask), (data)) -int nv04_timer_new(struct nvkm_device *, int, struct nvkm_timer **); -int nv40_timer_new(struct nvkm_device *, int, struct nvkm_timer **); -int nv41_timer_new(struct nvkm_device *, int, struct nvkm_timer **); -int gk20a_timer_new(struct nvkm_device *, int, struct nvkm_timer **); +int nv04_timer_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_timer **); +int nv40_timer_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_timer **); +int nv41_timer_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_timer **); +int gk20a_timer_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_timer **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c index bbc48a845ed4..723d1773108d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c +++ b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c @@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = { #include #undef NVKM_LAYOUT_ONCE #undef NVKM_LAYOUT_INST - [NVKM_SUBDEV_TIMER ] = "tmr", [NVKM_SUBDEV_TOP ] = "top", [NVKM_SUBDEV_VOLT ] = "volt", [NVKM_ENGINE_BSP ] = "bsp", diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index b87552dad1a6..1b112c424f4e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -87,7 +87,7 @@ nv4_chipset = { .mc = { 0x00000001, nv04_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv04_fifo_new, @@ -108,7 +108,7 @@ nv5_chipset = { .mc = { 0x00000001, nv04_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv04_fifo_new, @@ -130,7 +130,7 @@ nv10_chipset = { .mc = { 0x00000001, nv04_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .gr = nv10_gr_new, @@ -150,7 +150,7 @@ nv11_chipset = { .mc = { 0x00000001, nv11_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv10_fifo_new, @@ -172,7 +172,7 @@ nv15_chipset = { .mc = { 0x00000001, nv04_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv10_fifo_new, @@ -194,7 +194,7 @@ nv17_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -216,7 +216,7 @@ nv18_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -238,7 +238,7 @@ nv1a_chipset = { .mc = { 0x00000001, nv04_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv10_fifo_new, @@ -260,7 +260,7 @@ nv1f_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -282,7 +282,7 @@ nv20_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -304,7 +304,7 @@ nv25_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -326,7 +326,7 @@ nv28_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -348,7 +348,7 @@ nv2a_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -370,7 +370,7 @@ nv30_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -392,7 +392,7 @@ nv31_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -415,7 +415,7 @@ nv34_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -438,7 +438,7 @@ nv35_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -460,7 +460,7 @@ nv36_chipset = { .mc = { 0x00000001, nv17_mc_new }, .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, - .timer = nv04_timer_new, + .timer = { 0x00000001, nv04_timer_new }, .disp = nv04_disp_new, .dma = nv04_dma_new, .fifo = nv17_fifo_new, @@ -484,7 +484,7 @@ nv40_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv40_timer_new, + .timer = { 0x00000001, nv40_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -510,7 +510,7 @@ nv41_chipset = { .mmu = { 0x00000001, nv41_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -536,7 +536,7 @@ nv42_chipset = { .mmu = { 0x00000001, nv41_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -562,7 +562,7 @@ nv43_chipset = { .mmu = { 0x00000001, nv41_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -588,7 +588,7 @@ nv44_chipset = { .mmu = { 0x00000001, nv44_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -614,7 +614,7 @@ nv45_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -640,7 +640,7 @@ nv46_chipset = { .mmu = { 0x00000001, nv44_mmu_new }, .pci = { 0x00000001, nv46_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -666,7 +666,7 @@ nv47_chipset = { .mmu = { 0x00000001, nv41_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -692,7 +692,7 @@ nv49_chipset = { .mmu = { 0x00000001, nv41_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -718,7 +718,7 @@ nv4a_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -744,7 +744,7 @@ nv4b_chipset = { .mmu = { 0x00000001, nv41_mmu_new }, .pci = { 0x00000001, nv40_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -770,7 +770,7 @@ nv4c_chipset = { .mmu = { 0x00000001, nv44_mmu_new }, .pci = { 0x00000001, nv4c_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -796,7 +796,7 @@ nv4e_chipset = { .mmu = { 0x00000001, nv44_mmu_new }, .pci = { 0x00000001, nv4c_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -825,7 +825,7 @@ nv50_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, nv46_pci_new }, .therm = { 0x00000001, nv50_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv50_disp_new, .dma = nv50_dma_new, @@ -851,7 +851,7 @@ nv63_chipset = { .mmu = { 0x00000001, nv44_mmu_new }, .pci = { 0x00000001, nv4c_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -877,7 +877,7 @@ nv67_chipset = { .mmu = { 0x00000001, nv44_mmu_new }, .pci = { 0x00000001, nv4c_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -903,7 +903,7 @@ nv68_chipset = { .mmu = { 0x00000001, nv44_mmu_new }, .pci = { 0x00000001, nv4c_pci_new }, .therm = { 0x00000001, nv40_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = nv04_disp_new, .dma = nv04_dma_new, @@ -932,7 +932,7 @@ nv84_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g84_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, @@ -964,7 +964,7 @@ nv86_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g84_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, @@ -996,7 +996,7 @@ nv92_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g92_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, @@ -1028,7 +1028,7 @@ nv94_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g94_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, @@ -1060,7 +1060,7 @@ nv96_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g94_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, @@ -1092,7 +1092,7 @@ nv98_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g94_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = g94_disp_new, .dma = nv50_dma_new, @@ -1124,7 +1124,7 @@ nva0_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g94_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .bsp = g84_bsp_new, .cipher = g84_cipher_new, @@ -1157,7 +1157,7 @@ nva3_chipset = { .pci = { 0x00000001, g94_pci_new }, .pmu = { 0x00000001, gt215_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .ce[0] = gt215_ce_new, .disp = gt215_disp_new, @@ -1191,7 +1191,7 @@ nva5_chipset = { .pci = { 0x00000001, g94_pci_new }, .pmu = { 0x00000001, gt215_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .ce[0] = gt215_ce_new, .disp = gt215_disp_new, @@ -1224,7 +1224,7 @@ nva8_chipset = { .pci = { 0x00000001, g94_pci_new }, .pmu = { 0x00000001, gt215_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .ce[0] = gt215_ce_new, .disp = gt215_disp_new, @@ -1256,7 +1256,7 @@ nvaa_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g94_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = mcp77_disp_new, .dma = nv50_dma_new, @@ -1288,7 +1288,7 @@ nvac_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, g94_pci_new }, .therm = { 0x00000001, g84_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .disp = mcp77_disp_new, .dma = nv50_dma_new, @@ -1321,7 +1321,7 @@ nvaf_chipset = { .pci = { 0x00000001, g94_pci_new }, .pmu = { 0x00000001, gt215_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = nv40_volt_new, .ce[0] = gt215_ce_new, .disp = mcp89_disp_new, @@ -1357,7 +1357,7 @@ nvc0_chipset = { .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .ce[1] = gf100_ce_new, @@ -1394,7 +1394,7 @@ nvc1_chipset = { .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .disp = gt215_disp_new, @@ -1430,7 +1430,7 @@ nvc3_chipset = { .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .disp = gt215_disp_new, @@ -1466,7 +1466,7 @@ nvc4_chipset = { .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .ce[1] = gf100_ce_new, @@ -1503,7 +1503,7 @@ nvc8_chipset = { .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .ce[1] = gf100_ce_new, @@ -1540,7 +1540,7 @@ nvce_chipset = { .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .ce[1] = gf100_ce_new, @@ -1577,7 +1577,7 @@ nvcf_chipset = { .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, .therm = { 0x00000001, gt215_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .disp = gt215_disp_new, @@ -1612,7 +1612,7 @@ nvd7_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf106_pci_new }, .therm = { 0x00000001, gf119_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf117_volt_new, .ce[0] = gf100_ce_new, .disp = gf119_disp_new, @@ -1648,7 +1648,7 @@ nvd9_chipset = { .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf119_pmu_new }, .therm = { 0x00000001, gf119_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, .disp = gf119_disp_new, @@ -1684,7 +1684,7 @@ nve4_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk104_pmu_new }, .therm = { 0x00000001, gk104_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gk104_ce_new, @@ -1723,7 +1723,7 @@ nve6_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk104_pmu_new }, .therm = { 0x00000001, gk104_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gk104_ce_new, @@ -1762,7 +1762,7 @@ nve7_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk104_pmu_new }, .therm = { 0x00000001, gk104_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gk104_ce_new, @@ -1793,7 +1793,7 @@ nvea_chipset = { .mc = { 0x00000001, gk20a_mc_new }, .mmu = { 0x00000001, gk20a_mmu_new }, .pmu = { 0x00000001, gk20a_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .volt = gk20a_volt_new, .ce[2] = gk104_ce_new, @@ -1826,7 +1826,7 @@ nvf0_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk110_pmu_new }, .therm = { 0x00000001, gk104_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gk104_ce_new, @@ -1864,7 +1864,7 @@ nvf1_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk110_pmu_new }, .therm = { 0x00000001, gk104_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gk104_ce_new, @@ -1902,7 +1902,7 @@ nv106_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk208_pmu_new }, .therm = { 0x00000001, gk104_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gk104_ce_new, @@ -1940,7 +1940,7 @@ nv108_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk208_pmu_new }, .therm = { 0x00000001, gk104_therm_new }, - .timer = nv41_timer_new, + .timer = { 0x00000001, nv41_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gk104_ce_new, @@ -1978,7 +1978,7 @@ nv117_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm107_pmu_new }, .therm = { 0x00000001, gm107_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gm107_ce_new, @@ -2014,7 +2014,7 @@ nv118_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm107_pmu_new }, .therm = { 0x00000001, gm107_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gm107_ce_new, @@ -2048,7 +2048,7 @@ nv120_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, .therm = { 0x00000001, gm200_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gm200_ce_new, @@ -2086,7 +2086,7 @@ nv124_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, .therm = { 0x00000001, gm200_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gm200_ce_new, @@ -2124,7 +2124,7 @@ nv126_chipset = { .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, .therm = { 0x00000001, gm200_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .volt = gk104_volt_new, .ce[0] = gm200_ce_new, @@ -2154,7 +2154,7 @@ nv12b_chipset = { .mc = { 0x00000001, gk20a_mc_new }, .mmu = { 0x00000001, gm20b_mmu_new }, .pmu = { 0x00000001, gm20b_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[2] = gm200_ce_new, .volt = gm20b_volt_new, @@ -2185,7 +2185,7 @@ nv130_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = gp100_ce_new, .ce[1] = gp100_ce_new, @@ -2225,7 +2225,7 @@ nv132_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = gp102_ce_new, .ce[1] = gp102_ce_new, @@ -2263,7 +2263,7 @@ nv134_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = gp102_ce_new, .ce[1] = gp102_ce_new, @@ -2301,7 +2301,7 @@ nv136_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = gp102_ce_new, .ce[1] = gp102_ce_new, @@ -2338,7 +2338,7 @@ nv137_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = gp102_ce_new, .ce[1] = gp102_ce_new, @@ -2376,7 +2376,7 @@ nv138_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = gp102_ce_new, .ce[1] = gp102_ce_new, @@ -2406,7 +2406,7 @@ nv13b_chipset = { .mc = { 0x00000001, gp10b_mc_new }, .mmu = { 0x00000001, gp10b_mmu_new }, .pmu = { 0x00000001, gp10b_pmu_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = gp100_ce_new, .dma = gf119_dma_new, @@ -2437,7 +2437,7 @@ nv140_chipset = { .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, .therm = { 0x00000001, gp100_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .disp = gv100_disp_new, .ce[0] = gv100_ce_new, @@ -2481,7 +2481,7 @@ nv162_chipset = { .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, .therm = { 0x00000001, gp100_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = tu102_ce_new, .ce[1] = tu102_ce_new, @@ -2519,7 +2519,7 @@ nv164_chipset = { .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, .therm = { 0x00000001, gp100_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = tu102_ce_new, .ce[1] = tu102_ce_new, @@ -2558,7 +2558,7 @@ nv166_chipset = { .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, .therm = { 0x00000001, gp100_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = tu102_ce_new, .ce[1] = tu102_ce_new, @@ -2598,7 +2598,7 @@ nv167_chipset = { .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, .therm = { 0x00000001, gp100_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = tu102_ce_new, .ce[1] = tu102_ce_new, @@ -2636,7 +2636,7 @@ nv168_chipset = { .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, .therm = { 0x00000001, gp100_therm_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .top = gk104_top_new, .ce[0] = tu102_ce_new, .ce[1] = tu102_ce_new, @@ -2666,7 +2666,7 @@ nv170_chipset = { .mc = { 0x00000001, ga100_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, }; static const struct nvkm_device_chip @@ -2683,7 +2683,7 @@ nv172_chipset = { .mc = { 0x00000001, ga100_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .disp = ga102_disp_new, .dma = gv100_dma_new, }; @@ -2702,7 +2702,7 @@ nv174_chipset = { .mc = { 0x00000001, ga100_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, - .timer = gk20a_timer_new, + .timer = { 0x00000001, gk20a_timer_new }, .disp = ga102_disp_new, .dma = gv100_dma_new, }; @@ -3248,7 +3248,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func, #include #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE - _(NVKM_SUBDEV_TIMER , timer); _(NVKM_SUBDEV_TOP , top); _(NVKM_SUBDEV_VOLT , volt); _(NVKM_ENGINE_BSP , bsp); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c index dd922033628c..8b0da0c06268 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c @@ -183,14 +183,14 @@ nvkm_timer = { int nvkm_timer_new_(const struct nvkm_timer_func *func, struct nvkm_device *device, - int index, struct nvkm_timer **ptmr) + enum nvkm_subdev_type type, int inst, struct nvkm_timer **ptmr) { struct nvkm_timer *tmr; if (!(tmr = *ptmr = kzalloc(sizeof(*tmr), GFP_KERNEL))) return -ENOMEM; - nvkm_subdev_ctor(&nvkm_timer, device, index, &tmr->subdev); + nvkm_subdev_ctor(&nvkm_timer, device, type, inst, &tmr->subdev); tmr->func = func; INIT_LIST_HEAD(&tmr->alarms); spin_lock_init(&tmr->lock); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.c index 9ed5f64912d0..73c3776b6b83 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.c @@ -33,7 +33,8 @@ gk20a_timer = { }; int -gk20a_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr) +gk20a_timer_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_timer **ptmr) { - return nvkm_timer_new_(&gk20a_timer, device, index, ptmr); + return nvkm_timer_new_(&gk20a_timer, device, type, inst, ptmr); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.c b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.c index 7f48249f41de..0058e856b378 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.c @@ -145,7 +145,8 @@ nv04_timer = { }; int -nv04_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr) +nv04_timer_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_timer **ptmr) { - return nvkm_timer_new_(&nv04_timer, device, index, ptmr); + return nvkm_timer_new_(&nv04_timer, device, type, inst, ptmr); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.c b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.c index bb99a152f26e..7e1f8c22f2a8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.c @@ -82,7 +82,8 @@ nv40_timer = { }; int -nv40_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr) +nv40_timer_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_timer **ptmr) { - return nvkm_timer_new_(&nv40_timer, device, index, ptmr); + return nvkm_timer_new_(&nv40_timer, device, type, inst, ptmr); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.c b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.c index 3cf9ec1b1b57..c2b263721f10 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.c @@ -79,7 +79,8 @@ nv41_timer = { }; int -nv41_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr) +nv41_timer_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_timer **ptmr) { - return nvkm_timer_new_(&nv41_timer, device, index, ptmr); + return nvkm_timer_new_(&nv41_timer, device, type, inst, ptmr); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/priv.h index 89e97294b182..e6debe7e2fa9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/timer/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/timer/priv.h @@ -4,8 +4,8 @@ #define nvkm_timer(p) container_of((p), struct nvkm_timer, subdev) #include -int nvkm_timer_new_(const struct nvkm_timer_func *, struct nvkm_device *, - int index, struct nvkm_timer **); +int nvkm_timer_new_(const struct nvkm_timer_func *, struct nvkm_device *, enum nvkm_subdev_type, + int, struct nvkm_timer **); struct nvkm_timer_func { void (*init)(struct nvkm_timer *); -- 2.11.0