From 9e5f1ea427c3fedf40664bff3448959df8d89c94 Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Wed, 18 Jul 2018 08:49:51 +0000 Subject: [PATCH] [NFC][InstCombine] i65 tests for 'check for [no] signed truncation' pattern Those initially broke chromium build: https://bugs.llvm.org/show_bug.cgi?id=38204 and https://crbug.com/864832 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337364 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../canonicalize-lack-of-signed-truncation-check.ll | 14 ++++++++++++++ .../InstCombine/canonicalize-signed-truncation-check.ll | 14 ++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll b/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll index 5ed22292aab..2e75ae60571 100644 --- a/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll +++ b/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll @@ -26,6 +26,20 @@ define i1 @p0(i8 %x) { ret i1 %tmp2 } +; Big unusual bit width, https://bugs.llvm.org/show_bug.cgi?id=38204 +define i1 @pb(i65 %x) { +; CHECK-LABEL: @pb( +; CHECK-NEXT: [[TMP0:%.*]] = shl i65 [[X:%.*]], 1 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i65 [[TMP0]], 1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i65 [[TMP1]], [[X]] +; CHECK-NEXT: ret i1 [[TMP2]] +; + %tmp0 = shl i65 %x, 1 + %tmp1 = ashr exact i65 %tmp0, 1 + %tmp2 = icmp eq i65 %x, %tmp1 + ret i1 %tmp2 +} + ; ============================================================================ ; ; Vector tests ; ============================================================================ ; diff --git a/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll b/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll index ca08a33ae99..6cd32db8224 100644 --- a/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll +++ b/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll @@ -26,6 +26,20 @@ define i1 @p0(i8 %x) { ret i1 %tmp2 } +; Big unusual bit width, https://bugs.llvm.org/show_bug.cgi?id=38204 +define i1 @pb(i65 %x) { +; CHECK-LABEL: @pb( +; CHECK-NEXT: [[TMP0:%.*]] = shl i65 [[X:%.*]], 1 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i65 [[TMP0]], 1 +; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i65 [[TMP1]], [[X]] +; CHECK-NEXT: ret i1 [[TMP2]] +; + %tmp0 = shl i65 %x, 1 + %tmp1 = ashr exact i65 %tmp0, 1 + %tmp2 = icmp ne i65 %x, %tmp1 + ret i1 %tmp2 +} + ; ============================================================================ ; ; Vector tests ; ============================================================================ ; -- 2.11.0