From a72848e8a4d761dccddf6af93e8248384986928f Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Sat, 9 Jan 2021 17:29:59 +0100 Subject: [PATCH] arm64: dts: qcom: msm8998: Disable some components by default Some components (like PCIe) are not used on all devices and with a certain firmware configuration they might end up triggering a force reboot or a Synchronous Abort. This commit brings no functional difference as the nodes are enabled on devices which didn't disable them previously. Signed-off-by: Konrad Dybcio Tested-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20210109163001.146867-6-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 10 ++++++++++ arch/arm64/boot/dts/qcom/msm8998.dtsi | 6 +++++- 3 files changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi b/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi index 00d84fb21798..b500f24d47bc 100644 --- a/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi @@ -74,6 +74,14 @@ cpu-idle-states = <&BIG_CPU_SLEEP_1>; }; +&pcie0 { + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + &pm8005_lsid1 { pm8005-regulators { compatible = "qcom,pm8005-regulators"; @@ -295,6 +303,14 @@ pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; }; +&ufshc { + status = "okay"; +}; + +&ufsphy { + status = "okay"; +}; + &usb3 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi index cec42437b302..c1ef0c71d5f5 100644 --- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi @@ -106,6 +106,14 @@ // status = "okay"; }; +&pcie0 { + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + &pm8005_lsid1 { pm8005-regulators { compatible = "qcom,pm8005-regulators"; @@ -345,6 +353,7 @@ }; &ufshc { + status = "okay"; vcc-supply = <&vreg_l20a_2p95>; vccq-supply = <&vreg_l26a_1p2>; vccq2-supply = <&vreg_s4a_1p8>; @@ -354,6 +363,7 @@ }; &ufsphy { + status = "okay"; vdda-phy-supply = <&vreg_l1a_0p875>; vdda-pll-supply = <&vreg_l2a_1p2>; vddp-ref-clk-supply = <&vreg_l26a_1p2>; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index b2481043205a..65c87a8be5a2 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -945,6 +945,7 @@ num-lanes = <1>; phys = <&pciephy>; phy-names = "pciephy"; + status = "disabled"; ranges = <0x01000000 0x0 0x1b200000 0x1b200000 0x0 0x100000>, <0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000>; @@ -970,11 +971,12 @@ perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; }; - phy@1c06000 { + pcie_phy: phy@1c06000 { compatible = "qcom,msm8998-qmp-pcie-phy"; reg = <0x01c06000 0x18c>; #address-cells = <1>; #size-cells = <1>; + status = "disabled"; ranges; clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, @@ -1007,6 +1009,7 @@ phy-names = "ufsphy"; lanes-per-direction = <2>; power-domains = <&gcc UFS_GDSC>; + status = "disabled"; #reset-cells = <1>; clock-names = @@ -1046,6 +1049,7 @@ reg = <0x01da7000 0x18c>; #address-cells = <1>; #size-cells = <1>; + status = "disabled"; ranges; clock-names = -- 2.11.0