From a86eb582e3863daa00f6f60355d7fb91252d0e43 Mon Sep 17 00:00:00 2001 From: Damien Lespiau Date: Wed, 11 Feb 2015 18:21:44 +0000 Subject: [PATCH] drm/i915/skl: Use a LRI for WaDisableDgMirrorFixInHalfSliceChicken5 I have no idea how that crept in, but we need to do the write from the ring and this is a masked register. Two fixes in 1! Cc: Nick Hoath Signed-off-by: Damien Lespiau Reviewed-by: Nick Hoath Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index ab8ce4ceed2e..e758c0592675 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -959,13 +959,9 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) if (INTEL_REVID(dev) == SKL_REVID_A0 || INTEL_REVID(dev) == SKL_REVID_B0) { - /* - * WaDisableDgMirrorFixInHalfSliceChicken5:skl - * This is a pre-production w/a. - */ - I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, - I915_READ(GEN9_HALF_SLICE_CHICKEN5) & - ~GEN9_DG_MIRROR_FIX_ENABLE); + /* WaDisableDgMirrorFixInHalfSliceChicken5:skl */ + WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5, + GEN9_DG_MIRROR_FIX_ENABLE); } if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) { -- 2.11.0