From aabfb341dec07896d86c6800341f778bb9a5687d Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 7 Dec 2017 13:46:47 +0000 Subject: [PATCH] [X86][RDRAND] Add rdrand scheduling tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320039 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/rdrand-schedule.ll | 148 ++++++++++++++++++++++++++++++++++++ 1 file changed, 148 insertions(+) create mode 100644 test/CodeGen/X86/rdrand-schedule.ll diff --git a/test/CodeGen/X86/rdrand-schedule.ll b/test/CodeGen/X86/rdrand-schedule.ll new file mode 100644 index 00000000000..0eda6329ecf --- /dev/null +++ b/test/CodeGen/X86/rdrand-schedule.ll @@ -0,0 +1,148 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+rdrnd | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=goldmont | FileCheck %s --check-prefix=CHECK --check-prefix=GOLDMONT +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge | FileCheck %s --check-prefix=CHECK --check-prefix=IVY +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 + +declare {i16, i32} @llvm.x86.rdrand.16() +declare {i32, i32} @llvm.x86.rdrand.32() +declare {i64, i32} @llvm.x86.rdrand.64() + +define i16 @test_rdrand_16(i16* %random_val) { +; GENERIC-LABEL: test_rdrand_16: +; GENERIC: # %bb.0: +; GENERIC-NEXT: rdrandw %ax +; GENERIC-NEXT: retq # sched: [1:1.00] +; +; GOLDMONT-LABEL: test_rdrand_16: +; GOLDMONT: # %bb.0: +; GOLDMONT-NEXT: rdrandw %ax +; GOLDMONT-NEXT: retq # sched: [4:1.00] +; +; IVY-LABEL: test_rdrand_16: +; IVY: # %bb.0: +; IVY-NEXT: rdrandw %ax +; IVY-NEXT: retq # sched: [1:1.00] +; +; HASWELL-LABEL: test_rdrand_16: +; HASWELL: # %bb.0: +; HASWELL-NEXT: rdrandw %ax # sched: [1:5.33] +; HASWELL-NEXT: retq # sched: [2:1.00] +; +; BROADWELL-LABEL: test_rdrand_16: +; BROADWELL: # %bb.0: +; BROADWELL-NEXT: rdrandw %ax # sched: [9:1.00] +; BROADWELL-NEXT: retq # sched: [7:1.00] +; +; SKYLAKE-LABEL: test_rdrand_16: +; SKYLAKE: # %bb.0: +; SKYLAKE-NEXT: rdrandw %ax +; SKYLAKE-NEXT: retq # sched: [7:1.00] +; +; SKX-LABEL: test_rdrand_16: +; SKX: # %bb.0: +; SKX-NEXT: rdrandw %ax +; SKX-NEXT: retq # sched: [7:1.00] +; +; ZNVER1-LABEL: test_rdrand_16: +; ZNVER1: # %bb.0: +; ZNVER1-NEXT: rdrandw %ax # sched: [100:?] +; ZNVER1-NEXT: retq # sched: [1:0.50] + %call = call {i16, i32} @llvm.x86.rdrand.16() + %randval = extractvalue {i16, i32} %call, 0 + ret i16 %randval +} + +define i32 @test_rdrand_32(i32* %random_val) { +; GENERIC-LABEL: test_rdrand_32: +; GENERIC: # %bb.0: +; GENERIC-NEXT: rdrandl %eax +; GENERIC-NEXT: retq # sched: [1:1.00] +; +; GOLDMONT-LABEL: test_rdrand_32: +; GOLDMONT: # %bb.0: +; GOLDMONT-NEXT: rdrandl %eax +; GOLDMONT-NEXT: retq # sched: [4:1.00] +; +; IVY-LABEL: test_rdrand_32: +; IVY: # %bb.0: +; IVY-NEXT: rdrandl %eax +; IVY-NEXT: retq # sched: [1:1.00] +; +; HASWELL-LABEL: test_rdrand_32: +; HASWELL: # %bb.0: +; HASWELL-NEXT: rdrandl %eax # sched: [1:5.33] +; HASWELL-NEXT: retq # sched: [2:1.00] +; +; BROADWELL-LABEL: test_rdrand_32: +; BROADWELL: # %bb.0: +; BROADWELL-NEXT: rdrandl %eax # sched: [9:1.00] +; BROADWELL-NEXT: retq # sched: [7:1.00] +; +; SKYLAKE-LABEL: test_rdrand_32: +; SKYLAKE: # %bb.0: +; SKYLAKE-NEXT: rdrandl %eax +; SKYLAKE-NEXT: retq # sched: [7:1.00] +; +; SKX-LABEL: test_rdrand_32: +; SKX: # %bb.0: +; SKX-NEXT: rdrandl %eax +; SKX-NEXT: retq # sched: [7:1.00] +; +; ZNVER1-LABEL: test_rdrand_32: +; ZNVER1: # %bb.0: +; ZNVER1-NEXT: rdrandl %eax # sched: [100:?] +; ZNVER1-NEXT: retq # sched: [1:0.50] + %call = call {i32, i32} @llvm.x86.rdrand.32() + %randval = extractvalue {i32, i32} %call, 0 + ret i32 %randval +} + +define i64 @test_rdrand_64(i64* %random_val) { +; GENERIC-LABEL: test_rdrand_64: +; GENERIC: # %bb.0: +; GENERIC-NEXT: rdrandq %rax +; GENERIC-NEXT: retq # sched: [1:1.00] +; +; GOLDMONT-LABEL: test_rdrand_64: +; GOLDMONT: # %bb.0: +; GOLDMONT-NEXT: rdrandq %rax +; GOLDMONT-NEXT: retq # sched: [4:1.00] +; +; IVY-LABEL: test_rdrand_64: +; IVY: # %bb.0: +; IVY-NEXT: rdrandq %rax +; IVY-NEXT: retq # sched: [1:1.00] +; +; HASWELL-LABEL: test_rdrand_64: +; HASWELL: # %bb.0: +; HASWELL-NEXT: rdrandq %rax # sched: [1:5.33] +; HASWELL-NEXT: retq # sched: [2:1.00] +; +; BROADWELL-LABEL: test_rdrand_64: +; BROADWELL: # %bb.0: +; BROADWELL-NEXT: rdrandq %rax # sched: [9:1.00] +; BROADWELL-NEXT: retq # sched: [7:1.00] +; +; SKYLAKE-LABEL: test_rdrand_64: +; SKYLAKE: # %bb.0: +; SKYLAKE-NEXT: rdrandq %rax +; SKYLAKE-NEXT: retq # sched: [7:1.00] +; +; SKX-LABEL: test_rdrand_64: +; SKX: # %bb.0: +; SKX-NEXT: rdrandq %rax +; SKX-NEXT: retq # sched: [7:1.00] +; +; ZNVER1-LABEL: test_rdrand_64: +; ZNVER1: # %bb.0: +; ZNVER1-NEXT: rdrandq %rax # sched: [100:?] +; ZNVER1-NEXT: retq # sched: [1:0.50] + %call = call {i64, i32} @llvm.x86.rdrand.64() + %randval = extractvalue {i64, i32} %call, 0 + ret i64 %randval +} -- 2.11.0