From acf23ffb58322179841cb68ff0fd595fede59618 Mon Sep 17 00:00:00 2001 From: Lara Lazier Date: Mon, 5 Jul 2021 10:18:00 +0200 Subject: [PATCH] target/i386: Added DR6 and DR7 consistency checks DR6[63:32] and DR7[63:32] are reserved and need to be zero. (AMD64 Architecture Programmer's Manual, V2, 15.5) Signed-off-by: Lara Lazier Message-Id: <20210705081802.18960-3-laramglazier@gmail.com> [Ignore for 32-bit builds. - Paolo] Signed-off-by: Paolo Bonzini --- target/i386/svm.h | 2 ++ target/i386/tcg/sysemu/svm_helper.c | 9 ++++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/target/i386/svm.h b/target/i386/svm.h index adc058dc76..4bde9f3475 100644 --- a/target/i386/svm.h +++ b/target/i386/svm.h @@ -140,6 +140,8 @@ #define SVM_MSRPM_SIZE (1ULL << 13) #define SVM_IOPM_SIZE ((1ULL << 13) + 1) +#define SVM_DR_RESERVED_MASK 0xffffffff00000000ULL + struct QEMU_PACKED vmcb_control_area { uint16_t intercept_cr_read; uint16_t intercept_cr_write; diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/svm_helper.c index fa701829e5..047f31628e 100644 --- a/target/i386/tcg/sysemu/svm_helper.c +++ b/target/i386/tcg/sysemu/svm_helper.c @@ -269,7 +269,14 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) env->dr[6] = x86_ldq_phys(cs, env->vm_vmcb + offsetof(struct vmcb, save.dr6)); - /* FIXME: guest state consistency checks */ +#ifdef TARGET_X86_64 + if (env->dr[6] & SVM_DR_RESERVED_MASK) { + cpu_vmexit(env, SVM_EXIT_ERR, 0, GETPC()); + } + if (env->dr[7] & SVM_DR_RESERVED_MASK) { + cpu_vmexit(env, SVM_EXIT_ERR, 0, GETPC()); + } +#endif switch (x86_ldub_phys(cs, env->vm_vmcb + offsetof(struct vmcb, control.tlb_ctl))) { -- 2.11.0