From ad2f92c9f0e4c66e28ac5f3bc9df3bf77f871c51 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Thu, 6 May 2021 19:19:25 +0300 Subject: [PATCH] drm/i915/xelpd: Fallback to plane stride limitations when using DPT MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit GTT remapping allow us to have planes with strides larger than HW supports but DPT + GTT remapping is still not properly handled so falling back to plane HW limitations for now. This patch can be dropped when DPT + GTT remapping is correctly handled but until then we need this limitation for all display13 platforms to avoid pipe faults. Cc: Ville Syrjälä Cc: Clint Taylor Cc: Matt Roper Suggested-by: Ville Syrjälä Signed-off-by: José Roberto de Souza Reviewed-by: Matt Roper Signed-off-by: Imre Deak Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-6-imre.deak@intel.com --- drivers/gpu/drm/i915/display/intel_display.c | 15 +++++++-------- drivers/gpu/drm/i915/display/intel_display_types.h | 8 ++++++-- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c978d5d41472..53dbf3d0f3b2 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1607,14 +1607,13 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv, * * The new CCS hash mode makes remapping impossible */ - if (!is_ccs_modifier(modifier)) { - if (DISPLAY_VER(dev_priv) >= 7) - return 256*1024; - else if (DISPLAY_VER(dev_priv) >= 4) - return 128*1024; - } - - return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier); + if (DISPLAY_VER(dev_priv) < 4 || is_ccs_modifier(modifier) || + intel_modifier_uses_dpt(dev_priv, modifier)) + return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier); + else if (DISPLAY_VER(dev_priv) >= 7) + return 256 * 1024; + else + return 128 * 1024; } static u32 diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 7fe96777dc67..5f4c3e5beb2f 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1975,10 +1975,14 @@ intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pip intel_wait_for_vblank(dev_priv, pipe); } +static inline bool intel_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier) +{ + return DISPLAY_VER(i915) >= 13 && modifier != DRM_FORMAT_MOD_LINEAR; +} + static inline bool intel_fb_uses_dpt(const struct drm_framebuffer *fb) { - return fb && DISPLAY_VER(to_i915(fb->dev)) >= 13 && - fb->modifier != DRM_FORMAT_MOD_LINEAR; + return fb && intel_modifier_uses_dpt(to_i915(fb->dev), fb->modifier); } static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *plane_state) -- 2.11.0