From ae5557cf0a7758451c0be46cbfdd2d1e3146d56d Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Mon, 29 Aug 2016 15:27:17 +0000 Subject: [PATCH] [Constant] remove fdiv and frem from canTrap() Assuming the default FP env, we should not treat fdiv and frem any differently in terms of trapping behavior than any other FP op. Ie, FP ops do not trap with the default FP env. This matches how we treat the fdiv/frem in IR with isSafeToSpeculativelyExecute() and in the backend after: https://reviews.llvm.org/rL279970 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279973 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/IR/Constants.cpp | 2 -- test/Transforms/SimplifyCFG/ConditionalTrappingConstantExpr.ll | 9 +++------ 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/lib/IR/Constants.cpp b/lib/IR/Constants.cpp index d8d55b472f3..6951b0c8c04 100644 --- a/lib/IR/Constants.cpp +++ b/lib/IR/Constants.cpp @@ -347,10 +347,8 @@ static bool canTrapImpl(const Constant *C, return false; case Instruction::UDiv: case Instruction::SDiv: - case Instruction::FDiv: case Instruction::URem: case Instruction::SRem: - case Instruction::FRem: // Div and rem can trap if the RHS is not known to be non-zero. if (!isa(CE->getOperand(1)) ||CE->getOperand(1)->isNullValue()) return true; diff --git a/test/Transforms/SimplifyCFG/ConditionalTrappingConstantExpr.ll b/test/Transforms/SimplifyCFG/ConditionalTrappingConstantExpr.ll index 029cda3bbc6..13cd8e5ad63 100644 --- a/test/Transforms/SimplifyCFG/ConditionalTrappingConstantExpr.ll +++ b/test/Transforms/SimplifyCFG/ConditionalTrappingConstantExpr.ll @@ -48,16 +48,13 @@ bb7: ret i32 927 } -; FIXME: FP ops don't trap by default, so this is safe to hoist. +; FP ops don't trap by default, so this is safe to hoist. define i32 @tarp(i1 %c) { ; CHECK-LABEL: @tarp( -; CHECK-NEXT: br i1 %c, label %bb8, label %bb9 -; CHECK: bb8: +; CHECK-NEXT: bb9: ; CHECK-NEXT: [[DOT:%.*]] = select i1 fcmp oeq (float fdiv (float 3.000000e+00, float sitofp (i32 ptrtoint (i32* @G to i32) to float)), float 1.000000e+00), i32 42, i32 927 -; CHECK-NEXT: br label %bb9 -; CHECK: bb9: -; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 42, %0 ], [ [[DOT]], %bb8 ] +; CHECK-NEXT: [[MERGE:%.*]] = select i1 %c, i32 [[DOT]], i32 42 ; CHECK-NEXT: ret i32 [[MERGE]] ; br i1 %c, label %bb8, label %bb9 -- 2.11.0