From b0947d968f2cf493f5b21b7e115f787d337a8899 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Wed, 28 Jun 2017 15:16:03 +0000 Subject: [PATCH] [globalisel][tablegen] Post-commit review nits for r306388. NFC One early exit and a missing assert string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306552 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/GlobalISelEmitter.cpp | 68 ++++++++++++++++-------------------- 1 file changed, 31 insertions(+), 37 deletions(-) diff --git a/utils/TableGen/GlobalISelEmitter.cpp b/utils/TableGen/GlobalISelEmitter.cpp index 79fb350ca34..924ed8f65c2 100644 --- a/utils/TableGen/GlobalISelEmitter.cpp +++ b/utils/TableGen/GlobalISelEmitter.cpp @@ -1891,45 +1891,39 @@ Expected GlobalISelEmitter::runOnPattern(const PatternToMatch &P) { if (!Dst->getChild(0)->isLeaf()) return failedImport("EXTRACT_SUBREG child #1 is not a leaf"); - if (DefInit *SubRegInit = - dyn_cast(Dst->getChild(1)->getLeafValue())) { - // Constrain the result to the same register bank as the operand. - Record *DstIOpRec = - getInitValueAsRegClass(Dst->getChild(0)->getLeafValue()); - - if (DstIOpRec == nullptr) - return failedImport("EXTRACT_SUBREG operand #1 isn't a register class"); - - CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef()); - CodeGenRegisterClass *SrcRC = CGRegs.getRegClass( - getInitValueAsRegClass(Dst->getChild(0)->getLeafValue())); - - // It would be nice to leave this constraint implicit but we're required - // to pick a register class so constrain the result to a register class - // that can hold the correct MVT. - // - // FIXME: This may introduce an extra copy if the chosen class doesn't - // actually contain the subregisters. - assert(Src->getExtTypes().size() == 1); - - const auto &SrcRCDstRCPair = - SrcRC->getMatchingSubClassWithSubRegs(CGRegs, SubIdx); - assert(SrcRCDstRCPair->second && "Couldn't find a matching subclass"); - M.addAction("NewI", 0, - *SrcRCDstRCPair->second); - M.addAction("NewI", 1, - *SrcRCDstRCPair->first); - - // We're done with this pattern! It's eligible for GISel emission; return - // it. - ++NumPatternImported; - return std::move(M); - } + DefInit *SubRegInit = dyn_cast(Dst->getChild(1)->getLeafValue()); + if (!SubRegInit) + return failedImport("EXTRACT_SUBREG child #1 is not a subreg index"); - return failedImport("EXTRACT_SUBREG child #1 is not a subreg index"); - } + // Constrain the result to the same register bank as the operand. + Record *DstIOpRec = + getInitValueAsRegClass(Dst->getChild(0)->getLeafValue()); - M.addAction("NewI"); + if (DstIOpRec == nullptr) + return failedImport("EXTRACT_SUBREG operand #1 isn't a register class"); + + CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef()); + CodeGenRegisterClass *SrcRC = CGRegs.getRegClass( + getInitValueAsRegClass(Dst->getChild(0)->getLeafValue())); + + // It would be nice to leave this constraint implicit but we're required + // to pick a register class so constrain the result to a register class + // that can hold the correct MVT. + // + // FIXME: This may introduce an extra copy if the chosen class doesn't + // actually contain the subregisters. + assert(Src->getExtTypes().size() == 1 && + "Expected Src of EXTRACT_SUBREG to have one result type"); + + const auto &SrcRCDstRCPair = + SrcRC->getMatchingSubClassWithSubRegs(CGRegs, SubIdx); + assert(SrcRCDstRCPair->second && "Couldn't find a matching subclass"); + M.addAction("NewI", 0, + *SrcRCDstRCPair->second); + M.addAction("NewI", 1, + *SrcRCDstRCPair->first); + } else + M.addAction("NewI"); // We're done with this pattern! It's eligible for GISel emission; return it. ++NumPatternImported; -- 2.11.0