From b1f92ef00bc5038e18ca7c0c017e05d59651509c Mon Sep 17 00:00:00 2001
From: suikan <suikan@users.sourceforge.jp>
Date: Wed, 25 Feb 2015 16:14:11 +0900
Subject: [PATCH] =?utf8?q?=E3=82=A2=E3=83=97=E3=83=AA=E3=82=B1=E3=83=BC?=
 =?utf8?q?=E3=82=B7=E3=83=A7=E3=83=B3=E5=90=8D=E3=82=92test=E3=81=8B?=
 =?utf8?q?=E3=82=89rx=5Fif=E3=81=AB=E5=A4=89=E6=9B=B4?=
MIME-Version: 1.0
Content-Type: text/plain; charset=utf8
Content-Transfer-Encoding: 8bit

---
 trx305/{test.c => rx_if.c}     | 80 ++++++++++++++++++++++++++++++++----------
 trx305/{test.cfg => rx_if.cfg} |  0
 trx305/{test.h => rx_if.h}     |  0
 3 files changed, 62 insertions(+), 18 deletions(-)
 rename trx305/{test.c => rx_if.c} (55%)
 rename trx305/{test.cfg => rx_if.cfg} (100%)
 rename trx305/{test.h => rx_if.h} (100%)

diff --git a/trx305/test.c b/trx305/rx_if.c
similarity index 55%
rename from trx305/test.c
rename to trx305/rx_if.c
index bfe07d0..4ff6717 100644
--- a/trx305/test.c
+++ b/trx305/rx_if.c
@@ -14,12 +14,24 @@
 #define SLEEPDURATION 10
 #endif
 
+struct dma_descripter{
+    struct dma_descripter * next_descripter;
+    unsigned int * start_address;
+    unsigned short config;
+    unsigned short x_count;
+    unsigned short x_modify;
+};
+
+struct dma_descripter rx_dma_dsc0, rx_dma_dsc1;
+
+#define BUFSIZE 64
+unsigned int dummy_buffer0[BUFSIZE], dummy_buffer1[BUFSIZE];
+
 /*
  *  メインタスク
  */
 void main_task(VP_INT exinf)
 {
-    unsigned short dummy;
 
     vmsk_log(LOG_UPTO(LOG_INFO), LOG_UPTO(LOG_EMERG));
     syslog(LOG_NOTICE, "Sample program starts (exinf = %d).", (INT) exinf);
@@ -72,30 +84,68 @@ void main_task(VP_INT exinf)
     ssync();
 
 
+
+        // 受信DMAデスクリプタを作る
+    rx_dma_dsc0.next_descripter = &rx_dma_dsc1;
+    rx_dma_dsc0.start_address = dummy_buffer0;
+    rx_dma_dsc0.x_count = BUFSIZE;
+    rx_dma_dsc0.x_modify = sizeof(dummy_buffer0[0]);
+    rx_dma_dsc0.config =
+            7 <<12 |        // FLOW,    0:Stop, 1:Auto buffer, 4:Desc array, 6:Desc List small, 7:Desc, List, Large
+            7 << 8 |        // NDSIZE,  the # of element of the next descripter to fetch
+            0 << 7 |        // DI_EN,   0:No interrupt at the end, 1:Interrupt at the end
+            1 << 6 |        // DI_SEL,  0:Interrupt at the end of outer loop, 1:Interrupt at the end of inter loop
+            1 << 5 |        // RESTART, 0:Keep DMA FIFO before start, 1:Purge DMA FIFO before start
+            0 << 4 |        // DMA2D,   0:Linear DMA, 1:2D DMA
+            2 << 2 |        // WDSIZE,  0:8bit, 1:16bit, 2:32bit,3:reserved
+            1 << 1 |        // WNR,     0:Read from memory, 1:Write to Memory
+            1 << 0 ;        // DMA_EN,  0:Disable DMA, 1:Enable DMA
+
+    rx_dma_dsc1.next_descripter = &rx_dma_dsc0;
+    rx_dma_dsc1.start_address = dummy_buffer1;
+    rx_dma_dsc1.x_count = BUFSIZE;
+    rx_dma_dsc1.x_modify = sizeof(dummy_buffer1[0]);
+    rx_dma_dsc1.config =
+            7 <<12 |        // FLOW,    0:Stop, 1:Auto buffer, 4:Desc array, 6:Desc List small, 7:Desc, List, Large
+            7 << 8 |        // NDSIZE,  the # of element of the next descripter to fetch
+            0 << 7 |        // DI_EN,   0:No interrupt at the end, 1:Interrupt at the end
+            1 << 6 |        // DI_SEL,  0:Interrupt at the end of outer loop, 1:Interrupt at the end of inter loop
+            1 << 5 |        // RESTART, 0:Keep DMA FIFO before start, 1:Purge DMA FIFO before start
+            0 << 4 |        // DMA2D,   0:Linear DMA, 1:2D DMA
+            2 << 2 |        // WDSIZE,  0:8bit, 1:16bit, 2:32bit,3:reserved
+            1 << 1 |        // WNR,     0:Read from memory, 1:Write to Memory
+            1 << 0 ;        // DMA_EN,  0:Disable DMA, 1:Enable DMA
+
+
+
+#ifndef PEEPINGTEST
     int count = 0, event = 0;
+#endif
+
+
+        // RX受信を開始する
+    *pDMA1_NEXT_DESC_PTR = & rx_dma_dsc0;
+    *pDMA1_CONFIG = rx_dma_dsc1.config;
+
+    *pSPORT0_RCR1 |= RSPEN;     // RX SPORT Enable
+    ssync();
 
 
-        // RX FIFOが空になるまで読み捨てる
-    while( *pSPORT0_STAT & RXNE)
-        dummy = *pSPORT0_RX32;
     /*
      *  メインループ
      */
     do {
         long int rx[4];
 
-            // RX受信を開始する
-        *pSPORT0_RCR1 |= RSPEN;     // RX SPORT Enable
-        ssync();
             // 3mS スリープ
         tslp_tsk(3);
 
             // FIFOにデータがたまったはずである。
             // FIFOデータを読みだして下位2bitのみ表示する
-        rx[0] = *pSPORT0_RX32 & 0x3;    // 下位2bitのみ抽出
-        rx[1] = *pSPORT0_RX32 & 0x3;    // 下位2bitのみ抽出
-        rx[2] = *pSPORT0_RX32 & 0x3;    // 下位2bitのみ抽出
-        rx[3] = *pSPORT0_RX32 & 0x3;    // 下位2bitのみ抽出
+        rx[0] = dummy_buffer0[0];    // 下位2bitのみ抽出
+        rx[1] = dummy_buffer0[1];    // 下位2bitのみ抽出
+        rx[2] = dummy_buffer0[2];    // 下位2bitのみ抽出
+        rx[3] = dummy_buffer0[3];    // 下位2bitのみ抽出
 
 #ifndef PEEPINGTEST
         *pSPORT0_RCR1 &= ~RSPEN;     // RX SPORT disable
@@ -103,22 +153,16 @@ void main_task(VP_INT exinf)
         {
             event ++;
 #endif
-            syslog( LOG_NOTICE, "RX word : %d,%d,%d,%d", rx[0], rx[1], rx[2], rx[3] );
+            syslog( LOG_NOTICE, "RX word : %08x,%08x,%08x,%08x", rx[0], rx[1], rx[2], rx[3] );
 #ifndef PEEPINGTEST
         }
         count++;
         if (!( count % 1000 ))
             syslog( LOG_NOTICE, "trial : %d, event : %d", count, event);
 #endif
-            // RX受信を終了する。FIFOにはデータがたまっているはずである。
-        *pSPORT0_RCR1 &= ~RSPEN;     // RX SPORT disable
-        ssync();
             // スリープ
         tslp_tsk(SLEEPDURATION);
 
-            // RX FIFOが空になるまで読み捨てる
-        while( *pSPORT0_STAT & RXNE)
-            dummy = *pSPORT0_RX32;
 
 
     } while (1);
diff --git a/trx305/test.cfg b/trx305/rx_if.cfg
similarity index 100%
rename from trx305/test.cfg
rename to trx305/rx_if.cfg
diff --git a/trx305/test.h b/trx305/rx_if.h
similarity index 100%
rename from trx305/test.h
rename to trx305/rx_if.h
-- 
2.11.0