From b2713e018e1c99bb9a65d2d2e63dc7e3e2222c57 Mon Sep 17 00:00:00 2001
From: Ulrich Weigand <ulrich.weigand@de.ibm.com>
Date: Tue, 9 Jul 2013 10:00:34 +0000
Subject: [PATCH] [PowerPC] Support ".machine any"

The PowerPC assembler is supposed to provide a directive .machine
that allows switching the supported CPU instruction set on the fly.
Since we do not yet check CPU feature sets at all and always accept
any available instruction, this is not really useful at this point.

However, it makes sense to accept (and ignore) ".machine any" to
avoid spuriously rejecting existing assembler files that use this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185924 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 27 +++++++++++++++++++++++++++
 test/MC/PowerPC/ppc-machine.s                 | 14 ++++++++++++++
 2 files changed, 41 insertions(+)
 create mode 100644 test/MC/PowerPC/ppc-machine.s

diff --git a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index 32cf373dba8..ab29ee77963 100644
--- a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -196,6 +196,7 @@ class PPCAsmParser : public MCTargetAsmParser {
 
   bool ParseDirectiveWord(unsigned Size, SMLoc L);
   bool ParseDirectiveTC(unsigned Size, SMLoc L);
+  bool ParseDirectiveMachine(SMLoc L);
 
   bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                SmallVectorImpl<MCParsedAsmOperand*> &Operands,
@@ -1182,6 +1183,8 @@ bool PPCAsmParser::ParseDirective(AsmToken DirectiveID) {
     return ParseDirectiveWord(8, DirectiveID.getLoc());
   if (IDVal == ".tc")
     return ParseDirectiveTC(isPPC64()? 8 : 4, DirectiveID.getLoc());
+  if (IDVal == ".machine")
+    return ParseDirectiveMachine(DirectiveID.getLoc());
   return true;
 }
 
@@ -1227,6 +1230,30 @@ bool PPCAsmParser::ParseDirectiveTC(unsigned Size, SMLoc L) {
   return ParseDirectiveWord(Size, L);
 }
 
+/// ParseDirectiveMachine
+///  ::= .machine [ cpu | "push" | "pop" ]
+bool PPCAsmParser::ParseDirectiveMachine(SMLoc L) {
+  if (getLexer().isNot(AsmToken::Identifier) &&
+      getLexer().isNot(AsmToken::String))
+    return Error(L, "unexpected token in directive");
+
+  StringRef CPU = Parser.getTok().getIdentifier();
+  Parser.Lex();
+
+  // FIXME: Right now, the parser always allows any available
+  // instruction, so the .machine directive is not useful.
+  // Implement ".machine any" (by doing nothing) for the benefit
+  // of existing assembler code.  Likewise, we can then implement
+  // ".machine push" and ".machine pop" as no-op.
+  if (CPU != "any" && CPU != "push" && CPU != "pop")
+    return Error(L, "unrecognized machine type");
+
+  if (getLexer().isNot(AsmToken::EndOfStatement))
+    return Error(L, "unexpected token in directive");
+
+  return false;
+}
+
 /// Force static initialization.
 extern "C" void LLVMInitializePowerPCAsmParser() {
   RegisterMCAsmParser<PPCAsmParser> A(ThePPC32Target);
diff --git a/test/MC/PowerPC/ppc-machine.s b/test/MC/PowerPC/ppc-machine.s
new file mode 100644
index 00000000000..b8a7e3f8801
--- /dev/null
+++ b/test/MC/PowerPC/ppc-machine.s
@@ -0,0 +1,14 @@
+# RUN: llvm-mc -triple powerpc-unknown-unknown %s
+# RUN: llvm-mc -triple powerpc64-unknown-unknown %s
+
+# For now, the only thing we check is that the .machine directive
+# is accepted without syntax error.
+
+	.machine push
+	.machine any
+	.machine pop
+
+	.machine "push"
+	.machine "any"
+	.machine "pop"
+
-- 
2.11.0