From b4da272a6ea58a7c81c71477d65d82651555709a Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 12 Jul 2012 13:14:42 -0700 Subject: [PATCH] i965: Add performance debug for fast clear fallbacks. Reviewed-by: Jordan Justen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_clear.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 05dd68b650e..e56a26ae1ec 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -107,14 +107,22 @@ brw_fast_clear_depth(struct gl_context *ctx) * a previous clear had happened at a different clear value and resolve it * first. */ - if (ctx->Scissor.Enabled) + if (ctx->Scissor.Enabled) { + perf_debug("Failed to fast clear depth due to scissor being enabled. " + "Possible 5%% performance win if avoided.\n"); return false; + } /* The rendered area has to be 8x4 samples, not resolved pixels, so we look * at the miptree slice dimensions instead of renderbuffer size. */ if (mt->level[depth_irb->mt_level].width % 8 != 0 || mt->level[depth_irb->mt_level].height % 4 != 0) { + perf_debug("Failed to fast clear depth due to width/height %d,%d not " + "being aligned to 8,4. Possible 5%% performance win if " + "avoided\n", + mt->level[depth_irb->mt_level].width, + mt->level[depth_irb->mt_level].height); return false; } -- 2.11.0