From bc473edd7bf31c57d272fc225667ce66ec8c7d71 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Sat, 21 Mar 2015 03:36:02 +0000 Subject: [PATCH] Remove the bare getSubtargetImpl call from the PPC port. As part of this add a test that shows we can generate code with for functions that differ by subtarget feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232882 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCTargetMachine.cpp | 3 +-- lib/Target/PowerPC/PPCTargetMachine.h | 3 --- test/CodeGen/PowerPC/ppc-crbits-onoff.ll | 43 ++++++++++++++++++++++++++++++++ 3 files changed, 44 insertions(+), 5 deletions(-) create mode 100644 test/CodeGen/PowerPC/ppc-crbits-onoff.ll diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 286f83271bc..5d1f2387e82 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -163,8 +163,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, : LLVMTargetMachine(T, getDataLayoutString(Triple(TT)), TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM, CM, OL), TLOF(createTLOF(Triple(getTargetTriple()))), - TargetABI(computeTargetABI(Triple(TT), Options)), - Subtarget(TT, CPU, TargetFS, *this) { + TargetABI(computeTargetABI(Triple(TT), Options)) { initAsmInfo(); } diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h index 754a0d9212d..7a490588989 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.h +++ b/lib/Target/PowerPC/PPCTargetMachine.h @@ -29,8 +29,6 @@ public: private: std::unique_ptr TLOF; PPCABI TargetABI; - PPCSubtarget Subtarget; - mutable StringMap> SubtargetMap; public: @@ -40,7 +38,6 @@ public: ~PPCTargetMachine() override; - const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; } const PPCSubtarget *getSubtargetImpl(const Function &F) const override; // Pass Pipeline Configuration diff --git a/test/CodeGen/PowerPC/ppc-crbits-onoff.ll b/test/CodeGen/PowerPC/ppc-crbits-onoff.ll new file mode 100644 index 00000000000..88648df5fa3 --- /dev/null +++ b/test/CodeGen/PowerPC/ppc-crbits-onoff.ll @@ -0,0 +1,43 @@ +; RUN: llc -mcpu=pwr7 < %s | FileCheck %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; Function Attrs: nounwind readnone +define signext i32 @crbitsoff(i32 signext %v1, i32 signext %v2) #0 { +entry: + %tobool = icmp ne i32 %v1, 0 + %lnot = icmp eq i32 %v2, 0 + %and3 = and i1 %tobool, %lnot + %and = zext i1 %and3 to i32 + ret i32 %and + +; CHECK-LABEL: @crbitsoff +; CHECK-DAG: cmplwi {{[0-9]+}}, 3, 0 +; CHECK-DAG: li [[REG2:[0-9]+]], 1 +; CHECK-DAG: cntlzw [[REG3:[0-9]+]], +; CHECK: isel 3, 0, [[REG2]] +; CHECK: and 3, 3, [[REG3]] +; CHECK: blr +} + +define signext i32 @crbitson(i32 signext %v1, i32 signext %v2) #1 { +entry: + %tobool = icmp ne i32 %v1, 0 + %lnot = icmp eq i32 %v2, 0 + %and3 = and i1 %tobool, %lnot + %and = zext i1 %and3 to i32 + ret i32 %and + +; CHECK-LABEL: @crbitson +; CHECK-DAG: cmpwi {{[0-9]+}}, 3, 0 +; CHECK-DAG: cmpwi {{[0-9]+}}, 4, 0 +; CHECK-DAG: li [[REG2:[0-9]+]], 1 +; CHECK-DAG: crorc [[REG3:[0-9]+]], +; CHECK: isel 3, 0, [[REG2]], [[REG3]] +; CHECK: blr +} + + +attributes #0 = { nounwind readnone "target-features"="-crbits" } +attributes #1 = { nounwind readnone } + -- 2.11.0