From c1da6b4b844a97a79b0ef4e93a2d8b77a6f77782 Mon Sep 17 00:00:00 2001 From: Hiromitsu Yamasaki Date: Thu, 20 Apr 2017 02:46:28 +0900 Subject: [PATCH] clk: renesas: r8a7796: Add Audio-DMAC clocks This patch adds A-DMAC{0,1} clocks for R8A7796 SoC. Signed-off-by: Hiromitsu Yamasaki Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Kaneko [geert: Correct parent clocks, preserve sort order] Signed-off-by: Geert Uytterhoeven --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index c6c50266d85e..694701f58c32 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -138,6 +138,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), DEF_MOD("rwdt", 402, R8A7796_CLK_R), DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1), + DEF_MOD("audmac1", 501, R8A7796_CLK_S0D3), + DEF_MOD("audmac0", 502, R8A7796_CLK_S0D3), DEF_MOD("drif7", 508, R8A7796_CLK_S3D2), DEF_MOD("drif6", 509, R8A7796_CLK_S3D2), DEF_MOD("drif5", 510, R8A7796_CLK_S3D2), -- 2.11.0