From c2f2a95a8abc8aa8b467b0d198c9490da09a1b59 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 6 May 2019 22:04:26 +0000 Subject: [PATCH] [X86] Add more test cases for fast-isel handling of fneg. The fneg double case is falling back to a subsd in 32-bit mode if you write a test that doesn't trigger a fast-isel abort on the return value. The subsd lowering has different behavior with respect to nans than using an xor. This is inconsisent with what we would do in SelectionDAG and can lead to differences between -O0 and -O2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360088 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/fast-isel-fneg.ll | 55 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 2 deletions(-) diff --git a/test/CodeGen/X86/fast-isel-fneg.ll b/test/CodeGen/X86/fast-isel-fneg.ll index 0c2ce6df0a4..09ef3433d4a 100644 --- a/test/CodeGen/X86/fast-isel-fneg.ll +++ b/test/CodeGen/X86/fast-isel-fneg.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s -; RUN: llc < %s -fast-isel -mtriple=i686-- -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s +; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-apple-darwin10 | FileCheck %s +; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-- -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s define double @doo(double %x) nounwind { ; CHECK-LABEL: doo: @@ -48,3 +48,54 @@ define float @foo(float %x) nounwind { %y = fsub float -0.0, %x ret float %y } + +define void @goo(double* %x, double* %y) nounwind { +; CHECK-LABEL: goo: +; CHECK: ## %bb.0: +; CHECK-NEXT: movq {{.*#+}} xmm0 = mem[0],zero +; CHECK-NEXT: movq %xmm0, %rax +; CHECK-NEXT: movabsq $-9223372036854775808, %rcx ## imm = 0x8000000000000000 +; CHECK-NEXT: xorq %rax, %rcx +; CHECK-NEXT: movq %rcx, %xmm0 +; CHECK-NEXT: movq %xmm0, (%rsi) +; CHECK-NEXT: retq +; +; SSE2-LABEL: goo: +; SSE2: # %bb.0: +; SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; SSE2-NEXT: subsd (%ecx), %xmm0 +; SSE2-NEXT: movsd %xmm0, (%eax) +; SSE2-NEXT: retl + %a = load double, double* %x + %b = fsub double -0.0, %a + store double %b, double* %y + ret void +} + +define void @loo(float* %x, float* %y) nounwind { +; CHECK-LABEL: loo: +; CHECK: ## %bb.0: +; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; CHECK-NEXT: movd %xmm0, %eax +; CHECK-NEXT: xorl $2147483648, %eax ## imm = 0x80000000 +; CHECK-NEXT: movd %eax, %xmm0 +; CHECK-NEXT: movd %xmm0, (%rsi) +; CHECK-NEXT: retq +; +; SSE2-LABEL: loo: +; SSE2: # %bb.0: +; SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; SSE2-NEXT: movd %xmm0, %ecx +; SSE2-NEXT: xorl $2147483648, %ecx # imm = 0x80000000 +; SSE2-NEXT: movd %ecx, %xmm0 +; SSE2-NEXT: movd %xmm0, (%eax) +; SSE2-NEXT: retl + %a = load float, float* %x + %b = fsub float -0.0, %a + store float %b, float* %y + ret void +} -- 2.11.0