From c318028f1fec8488e0af05eb9f7f40b92dd057ed Mon Sep 17 00:00:00 2001 From: rsandifo Date: Wed, 14 Apr 2004 07:48:48 +0000 Subject: [PATCH] * doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed from -{no-}mfix-vr4122-bugs. * config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs. (append_insn, mips_emit_delays): Update accordingly. (OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122. (md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120. (md_parse_option): Update after above changes. (md_show_usage): Add -mfix-vr4120. --- gas/ChangeLog | 11 +++++++++++ gas/config/tc-mips.c | 25 +++++++++++++------------ gas/doc/c-mips.texi | 10 +++++----- gas/testsuite/ChangeLog | 4 ++++ gas/testsuite/gas/mips/vr4122.d | 4 ++-- gas/testsuite/gas/mips/vr4122.s | 2 +- 6 files changed, 36 insertions(+), 20 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 5cae9c0210..66949b01bd 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,14 @@ +2004-04-14 Richard Sandiford + + * doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed from + -{no-}mfix-vr4122-bugs. + * config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs. + (append_insn, mips_emit_delays): Update accordingly. + (OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122. + (md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120. + (md_parse_option): Update after above changes. + (md_show_usage): Add -mfix-vr4120. + 2004-04-13 Bob Wilson * doc/as.texinfo (Sub-Sections): Conditionalize COFF-specific use diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index beaa11a5aa..e47266b552 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -622,7 +622,7 @@ static const unsigned int mips16_to_32_reg_map[] = 16, 17, 2, 3, 4, 5, 6, 7 }; -static int mips_fix_4122_bugs; +static int mips_fix_vr4120; /* We don't relax branches by default, since this causes us to expand `la .l2 - .l1' if there's a branch between .l1 and .l2, because we @@ -1863,11 +1863,11 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr, if (prev_prev_nop && nops == 0) ++nops; - if (mips_fix_4122_bugs && prev_insn.insn_mo->name) + if (mips_fix_vr4120 && prev_insn.insn_mo->name) { /* We're out of bits in pinfo, so we must resort to string ops here. Shortcuts are selected based on opcodes being - limited to the VR4122 instruction set. */ + limited to the VR4120 instruction set. */ int min_nops = 0; const char *pn = prev_insn.insn_mo->name; const char *tn = ip->insn_mo->name; @@ -2841,7 +2841,7 @@ mips_emit_delays (bfd_boolean insns) ++nops; } - if (mips_fix_4122_bugs && prev_insn.insn_mo->name) + if (mips_fix_vr4120 && prev_insn.insn_mo->name) { int min_nops = 0; const char *pn = prev_insn.insn_mo->name; @@ -10254,10 +10254,10 @@ struct option md_longopts[] = #define OPTION_MNO_7000_HILO_FIX (OPTION_FIX_BASE + 1) {"no-fix-7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX}, {"mno-fix7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX}, -#define OPTION_FIX_VR4122 (OPTION_FIX_BASE + 2) -#define OPTION_NO_FIX_VR4122 (OPTION_FIX_BASE + 3) - {"mfix-vr4122-bugs", no_argument, NULL, OPTION_FIX_VR4122}, - {"no-mfix-vr4122-bugs", no_argument, NULL, OPTION_NO_FIX_VR4122}, +#define OPTION_FIX_VR4120 (OPTION_FIX_BASE + 2) +#define OPTION_NO_FIX_VR4120 (OPTION_FIX_BASE + 3) + {"mfix-vr4120", no_argument, NULL, OPTION_FIX_VR4120}, + {"mno-fix-vr4120", no_argument, NULL, OPTION_NO_FIX_VR4120}, /* Miscellaneous options. */ #define OPTION_MISC_BASE (OPTION_FIX_BASE + 4) @@ -10499,12 +10499,12 @@ md_parse_option (int c, char *arg) g_switch_value = 0x7fffffff; break; - case OPTION_FIX_VR4122: - mips_fix_4122_bugs = 1; + case OPTION_FIX_VR4120: + mips_fix_vr4120 = 1; break; - case OPTION_NO_FIX_VR4122: - mips_fix_4122_bugs = 0; + case OPTION_NO_FIX_VR4120: + mips_fix_vr4120 = 0; break; case OPTION_RELAX_BRANCH: @@ -14373,6 +14373,7 @@ MIPS options:\n\ -mips16 generate mips16 instructions\n\ -no-mips16 do not generate mips16 instructions\n")); fprintf (stream, _("\ +-mfix-vr4120 work around certain VR4120 errata\n\ -mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\ -mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\ -O0 remove unneeded NOPs, do not swap branches\n\ diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index dbea72300b..1375230a67 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -122,11 +122,11 @@ This tells the assembler to accept MDMX instructions. Cause nops to be inserted if the read of the destination register of an mfhi or mflo instruction occurs in the following two instructions. -@item -mfix-vr4122-bugs -@itemx -no-mfix-vr4122-bugs -Insert @samp{nop} instructions to avoid errors in certain versions of -the vr4122 core. This option is intended to be used on GCC-generated -code: it is not designed to catch errors in hand-written assembler code. +@item -mfix-vr4120 +@itemx -no-mfix-vr4120 +Insert nops to work around certain VR4120 errata. This option is +intended to be used on GCC-generated code: it is not designed to catch +all problems in hand-written assembler code. @item -m4010 @itemx -no-m4010 diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 05712ef355..1e262f1f7e 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2004-04-14 Richard Sandiford + * gas/mips/vr4122.[sd]: Change option to -mfix-vr4120. + +2004-04-14 Richard Sandiford + * gas/elf/section2.e-mips: Allow named section symbols. * gas/mips/{,el}empic.d, gas/mips/mips{,el}16-[ef].d: Likewise. diff --git a/gas/testsuite/gas/mips/vr4122.d b/gas/testsuite/gas/mips/vr4122.d index 9ff3b6d377..99e0043dd2 100644 --- a/gas/testsuite/gas/mips/vr4122.d +++ b/gas/testsuite/gas/mips/vr4122.d @@ -1,6 +1,6 @@ #objdump: -dz --prefix-addresses -m mips:4120 -#as: -32 -march=vr4120 -mtune=vr4120 -mfix-vr4122-bugs -#name: MIPS vr4122 workarounds +#as: -32 -march=vr4120 -mfix-vr4120 +#name: MIPS vr4120 workarounds .*: +file format .*mips.* diff --git a/gas/testsuite/gas/mips/vr4122.s b/gas/testsuite/gas/mips/vr4122.s index 6c38c885da..4661e1a0eb 100644 --- a/gas/testsuite/gas/mips/vr4122.s +++ b/gas/testsuite/gas/mips/vr4122.s @@ -1,4 +1,4 @@ -# Test that certain vr4122 hardware bugs are worked around. +# Test workarounds selected by -mfix-vr4120. # Note that we only work around bugs gcc may generate. r21: -- 2.11.0