From c3be7acdeb5ce5bc857ee47664b0be36241e2402 Mon Sep 17 00:00:00 2001 From: J Keerthy Date: Tue, 23 Jul 2013 12:05:39 +0530 Subject: [PATCH] ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by: J Keerthy Signed-off-by: Tero Kristo Tested-by: Nishanth Menon Acked-by: Tony Lindgren Signed-off-by: Mike Turquette --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index d4e7410dc0cd..d616359baed1 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1183,13 +1183,10 @@ apll_pcie_m2_ck: apll_pcie_m2_ck { #clock-cells = <0>; - compatible = "ti,divider-clock"; + compatible = "fixed-factor-clock"; clocks = <&apll_pcie_ck>; - ti,max-div = <127>; - ti,autoidle-shift = <8>; - reg = <0x0224>; - ti,index-starts-at-one; - ti,invert-autoidle-bit; + clock-mult = <1>; + clock-div = <1>; }; dpll_per_ck: dpll_per_ck { -- 2.11.0