From c4f2079087260a41d1c1ce9d037c95a988d43124 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 29 Apr 2018 00:53:10 +0000 Subject: [PATCH] [X86] Use getX86SubSuperRegister in addGR32orGR64Operands in the AsmParser instead of duplicating its functionality. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331128 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmParser/X86Operand.h | 25 +------------------------ 1 file changed, 1 insertion(+), 24 deletions(-) diff --git a/lib/Target/X86/AsmParser/X86Operand.h b/lib/Target/X86/AsmParser/X86Operand.h index b3bcf4034ed..2493e8321c3 100644 --- a/lib/Target/X86/AsmParser/X86Operand.h +++ b/lib/Target/X86/AsmParser/X86Operand.h @@ -461,34 +461,11 @@ struct X86Operand : public MCParsedAsmOperand { Inst.addOperand(MCOperand::createReg(getReg())); } - static unsigned getGR32FromGR64(unsigned RegNo) { - switch (RegNo) { - default: llvm_unreachable("Unexpected register"); - case X86::RAX: return X86::EAX; - case X86::RCX: return X86::ECX; - case X86::RDX: return X86::EDX; - case X86::RBX: return X86::EBX; - case X86::RBP: return X86::EBP; - case X86::RSP: return X86::ESP; - case X86::RSI: return X86::ESI; - case X86::RDI: return X86::EDI; - case X86::R8: return X86::R8D; - case X86::R9: return X86::R9D; - case X86::R10: return X86::R10D; - case X86::R11: return X86::R11D; - case X86::R12: return X86::R12D; - case X86::R13: return X86::R13D; - case X86::R14: return X86::R14D; - case X86::R15: return X86::R15D; - case X86::RIP: return X86::EIP; - } - } - void addGR32orGR64Operands(MCInst &Inst, unsigned N) const { assert(N == 1 && "Invalid number of operands!"); unsigned RegNo = getReg(); if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo)) - RegNo = getGR32FromGR64(RegNo); + RegNo = getX86SubSuperRegister(RegNo, 32); Inst.addOperand(MCOperand::createReg(RegNo)); } -- 2.11.0