From c4fea3594f983e3328b22e57e31a38c106cd079e Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 13 Feb 2014 23:34:07 +0000 Subject: [PATCH] R600/SI: Add ShaderType attribute to some tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201367 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/R600/llvm.SI.sample-masked.ll | 16 +++++++++------- test/CodeGen/R600/llvm.SI.sample.ll | 6 ++++-- test/CodeGen/R600/llvm.SI.sampled.ll | 4 +++- test/CodeGen/R600/llvm.SI.tbuffer.store.ll | 10 ++++++---- 4 files changed, 22 insertions(+), 14 deletions(-) diff --git a/test/CodeGen/R600/llvm.SI.sample-masked.ll b/test/CodeGen/R600/llvm.SI.sample-masked.ll index e5e4ec4f067..445359a4ced 100644 --- a/test/CodeGen/R600/llvm.SI.sample-masked.ll +++ b/test/CodeGen/R600/llvm.SI.sample-masked.ll @@ -2,7 +2,7 @@ ; CHECK-LABEL: @v1 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 13 -define void @v1(i32 %a1) { +define void @v1(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -15,7 +15,7 @@ entry: ; CHECK-LABEL: @v2 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 11 -define void @v2(i32 %a1) { +define void @v2(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -28,7 +28,7 @@ entry: ; CHECK-LABEL: @v3 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 14 -define void @v3(i32 %a1) { +define void @v3(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -41,7 +41,7 @@ entry: ; CHECK-LABEL: @v4 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 7 -define void @v4(i32 %a1) { +define void @v4(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -54,7 +54,7 @@ entry: ; CHECK-LABEL: @v5 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 10 -define void @v5(i32 %a1) { +define void @v5(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -66,7 +66,7 @@ entry: ; CHECK-LABEL: @v6 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 6 -define void @v6(i32 %a1) { +define void @v6(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -78,7 +78,7 @@ entry: ; CHECK-LABEL: @v7 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 9 -define void @v7(i32 %a1) { +define void @v7(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -91,3 +91,5 @@ entry: declare <4 x float> @llvm.SI.sample.v1i32(<1 x i32>, <32 x i8>, <16 x i8>, i32) readnone declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) + +attributes #0 = { "ShaderType"="0" } diff --git a/test/CodeGen/R600/llvm.SI.sample.ll b/test/CodeGen/R600/llvm.SI.sample.ll index d41737c6592..24e8f640d90 100644 --- a/test/CodeGen/R600/llvm.SI.sample.ll +++ b/test/CodeGen/R600/llvm.SI.sample.ll @@ -17,7 +17,7 @@ ;CHECK-DAG: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 14 ;CHECK-DAG: IMAGE_SAMPLE {{v[0-9]+}}, 8 -define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { +define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) #0 { %v1 = insertelement <4 x i32> undef, i32 %a1, i32 0 %v2 = insertelement <4 x i32> undef, i32 %a1, i32 1 %v3 = insertelement <4 x i32> undef, i32 %a1, i32 2 @@ -137,7 +137,7 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { ; CHECK: @v1 ; CHECK: IMAGE_SAMPLE {{v\[[0-9]+:[0-9]+\]}}, 15 -define void @v1(i32 %a1) { +define void @v1(i32 %a1) #0 { entry: %0 = insertelement <1 x i32> undef, i32 %a1, i32 0 %1 = call <4 x float> @llvm.SI.sample.v1i32(<1 x i32> %0, <32 x i8> undef, <16 x i8> undef, i32 0) @@ -155,3 +155,5 @@ declare <4 x float> @llvm.SI.sample.v1i32(<1 x i32>, <32 x i8>, <16 x i8>, i32) declare <4 x float> @llvm.SI.sample.(<4 x i32>, <32 x i8>, <16 x i8>, i32) readnone declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) + +attributes #0 = { "ShaderType"="0" } diff --git a/test/CodeGen/R600/llvm.SI.sampled.ll b/test/CodeGen/R600/llvm.SI.sampled.ll index 21ac725ae03..366456f44e6 100644 --- a/test/CodeGen/R600/llvm.SI.sampled.ll +++ b/test/CodeGen/R600/llvm.SI.sampled.ll @@ -17,7 +17,7 @@ ;CHECK-DAG: IMAGE_SAMPLE_D {{v\[[0-9]+:[0-9]+\]}}, 14 ;CHECK-DAG: IMAGE_SAMPLE_D {{v[0-9]+}}, 8 -define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { +define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) #0 { %v1 = insertelement <4 x i32> undef, i32 %a1, i32 0 %v2 = insertelement <4 x i32> undef, i32 %a1, i32 1 %v3 = insertelement <4 x i32> undef, i32 %a1, i32 2 @@ -138,3 +138,5 @@ define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { declare <4 x float> @llvm.SI.sampled.(<4 x i32>, <32 x i8>, <16 x i8>, i32) readnone declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) + +attributes #0 = { "ShaderType"="0" } diff --git a/test/CodeGen/R600/llvm.SI.tbuffer.store.ll b/test/CodeGen/R600/llvm.SI.tbuffer.store.ll index 33f663b3a6d..569efb654aa 100644 --- a/test/CodeGen/R600/llvm.SI.tbuffer.store.ll +++ b/test/CodeGen/R600/llvm.SI.tbuffer.store.ll @@ -2,7 +2,7 @@ ;CHECK-LABEL: @test1 ;CHECK: TBUFFER_STORE_FORMAT_XYZW {{v\[[0-9]+:[0-9]+\]}}, 32, -1, 0, -1, 0, 14, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0 -define void @test1(i32 %a1, i32 %vaddr) { +define void @test1(i32 %a1, i32 %vaddr) #0 { %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata, i32 4, i32 %vaddr, i32 0, i32 32, i32 14, i32 4, i32 1, i32 0, i32 1, @@ -12,7 +12,7 @@ define void @test1(i32 %a1, i32 %vaddr) { ;CHECK-LABEL: @test2 ;CHECK: TBUFFER_STORE_FORMAT_XYZ {{v\[[0-9]+:[0-9]+\]}}, 24, -1, 0, -1, 0, 13, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0 -define void @test2(i32 %a1, i32 %vaddr) { +define void @test2(i32 %a1, i32 %vaddr) #0 { %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata, i32 3, i32 %vaddr, i32 0, i32 24, i32 13, i32 4, i32 1, i32 0, i32 1, @@ -22,7 +22,7 @@ define void @test2(i32 %a1, i32 %vaddr) { ;CHECK-LABEL: @test3 ;CHECK: TBUFFER_STORE_FORMAT_XY {{v\[[0-9]+:[0-9]+\]}}, 16, -1, 0, -1, 0, 11, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0 -define void @test3(i32 %a1, i32 %vaddr) { +define void @test3(i32 %a1, i32 %vaddr) #0 { %vdata = insertelement <2 x i32> undef, i32 %a1, i32 0 call void @llvm.SI.tbuffer.store.v2i32(<16 x i8> undef, <2 x i32> %vdata, i32 2, i32 %vaddr, i32 0, i32 16, i32 11, i32 4, i32 1, i32 0, i32 1, @@ -32,7 +32,7 @@ define void @test3(i32 %a1, i32 %vaddr) { ;CHECK-LABEL: @test4 ;CHECK: TBUFFER_STORE_FORMAT_X {{v[0-9]+}}, 8, -1, 0, -1, 0, 4, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0 -define void @test4(i32 %vdata, i32 %vaddr) { +define void @test4(i32 %vdata, i32 %vaddr) #0 { call void @llvm.SI.tbuffer.store.i32(<16 x i8> undef, i32 %vdata, i32 1, i32 %vaddr, i32 0, i32 8, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0) @@ -42,3 +42,5 @@ define void @test4(i32 %vdata, i32 %vaddr) { declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) declare void @llvm.SI.tbuffer.store.v2i32(<16 x i8>, <2 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) + +attributes #0 = { "ShaderType"="1" } -- 2.11.0