From c5b6c914d2f3755426b9c68ed6ddd8f917d9be9e Mon Sep 17 00:00:00 2001 From: Jiansong Chen Date: Wed, 24 Jun 2020 12:47:54 +0800 Subject: [PATCH] drm/amdgpu: enable cp_fw_write_wait for navy_flounder It's the same with sienna_cichlid, cp fw for navy_flounder can support WAIT_REG_MEM packet. Signed-off-by: Jiansong Chen Reviewed-by: Tao Zhou Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index 3799185430df..61e89247faf3 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -3538,6 +3538,7 @@ static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev) adev->gfx.cp_fw_write_wait = true; break; case CHIP_SIENNA_CICHLID: + case CHIP_NAVY_FLOUNDER: adev->gfx.cp_fw_write_wait = true; break; default: -- 2.11.0