From c6242335b3ff504a552ceba18c8b8ab9dc684a77 Mon Sep 17 00:00:00 2001 From: Leandro Lupori Date: Mon, 14 Mar 2022 15:57:17 +0100 Subject: [PATCH] target/ppc: fix ISI fault cause for Radix MMU MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Fix Instruction Storage Interrupt (ISI) fault cause for Radix MMU, when caused by missing PAGE_EXEC permission, to be SRR1_NOEXEC_GUARD instead of DSISR_PROTFAULT. This matches POWER9 hardware behavior. Fixes: d5fee0bbe68 ("target/ppc: Implement ISA V3.00 radix page fault handler") Signed-off-by: Leandro Lupori Message-Id: <20220309192756.145283-1-leandro.lupori@eldorado.org.br> Signed-off-by: Cédric Le Goater --- target/ppc/mmu-radix64.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 67c38f065b..5414fd63c1 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -204,7 +204,8 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, MMUAccessType access_type, /* Check if requested access type is allowed */ need_prot = prot_for_access_type(access_type); if (need_prot & ~*prot) { /* Page Protected for that Access */ - *fault_cause |= DSISR_PROTFAULT; + *fault_cause |= access_type == MMU_INST_FETCH ? SRR1_NOEXEC_GUARD : + DSISR_PROTFAULT; return true; } -- 2.11.0