From c88a7aafeda250690d519000e0e346e767712a61 Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Thu, 30 May 2019 19:27:51 +0000 Subject: [PATCH] [DAGCombine] ((c1-A)-c2) -> ((c1-c2)-A) constant-fold Summary: https://rise4fun.com/Alive/B0A Reviewers: t.p.northover, RKSimon, spatel, craig.topper Reviewed By: RKSimon Subscribers: javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62691 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362135 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 10 +++++++ test/CodeGen/AArch64/addsub-constant-folding.ll | 13 +++------ test/CodeGen/X86/addsub-constant-folding.ll | 37 ++++++++++++------------- 3 files changed, 31 insertions(+), 29 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 8bbd5cd2012..b6164ac4ded 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2895,6 +2895,16 @@ SDValue DAGCombiner::visitSUB(SDNode *N) { return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), NewC); } + // fold (c1-A)-c2 -> (c1-c2)-A + if (N0.getOpcode() == ISD::SUB && + isConstantOrConstantVector(N1, /* NoOpaques */ true) && + isConstantOrConstantVector(N0.getOperand(0), /* NoOpaques */ true)) { + SDValue NewC = DAG.FoldConstantArithmetic( + ISD::SUB, DL, VT, N0.getOperand(0).getNode(), N1.getNode()); + assert(NewC && "Constant folding failed"); + return DAG.getNode(ISD::SUB, DL, VT, NewC, N0.getOperand(1)); + } + // fold ((A+(B+or-C))-B) -> A+or-C if (N0.getOpcode() == ISD::ADD && (N0.getOperand(1).getOpcode() == ISD::SUB || diff --git a/test/CodeGen/AArch64/addsub-constant-folding.ll b/test/CodeGen/AArch64/addsub-constant-folding.ll index de87aa4348a..47a236e373b 100644 --- a/test/CodeGen/AArch64/addsub-constant-folding.ll +++ b/test/CodeGen/AArch64/addsub-constant-folding.ll @@ -344,10 +344,8 @@ define <4 x i32> @const_sub_add_const_nonsplat(<4 x i32> %arg) { define <4 x i32> @const_sub_sub_const(<4 x i32> %arg) { ; CHECK-LABEL: const_sub_sub_const: ; CHECK: // %bb.0: -; CHECK-NEXT: movi v1.4s, #8 +; CHECK-NEXT: movi v1.4s, #6 ; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s -; CHECK-NEXT: movi v1.4s, #2 -; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s ; CHECK-NEXT: ret %t0 = sub <4 x i32> , %arg %t1 = sub <4 x i32> %t0, @@ -362,13 +360,13 @@ define <4 x i32> @const_sub_sub_const_extrause(<4 x i32> %arg) { ; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_offset w30, -16 ; CHECK-NEXT: movi v1.4s, #8 -; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s ; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s ; CHECK-NEXT: bl use ; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload -; CHECK-NEXT: movi v0.4s, #2 -; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s +; CHECK-NEXT: movi v0.4s, #6 +; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s ; CHECK-NEXT: add sp, sp, #32 // =32 ; CHECK-NEXT: ret %t0 = sub <4 x i32> , %arg @@ -382,10 +380,7 @@ define <4 x i32> @const_sub_sub_const_nonsplat(<4 x i32> %arg) { ; CHECK: // %bb.0: ; CHECK-NEXT: adrp x8, .LCPI23_0 ; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI23_0] -; CHECK-NEXT: adrp x8, .LCPI23_1 -; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI23_1] ; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s -; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s ; CHECK-NEXT: ret %t0 = sub <4 x i32> , %arg %t1 = sub <4 x i32> %t0, diff --git a/test/CodeGen/X86/addsub-constant-folding.ll b/test/CodeGen/X86/addsub-constant-folding.ll index e24f35382fd..3c48494ae39 100644 --- a/test/CodeGen/X86/addsub-constant-folding.ll +++ b/test/CodeGen/X86/addsub-constant-folding.ll @@ -500,17 +500,15 @@ define <4 x i32> @const_sub_add_const_nonsplat(<4 x i32> %arg) { define <4 x i32> @const_sub_sub_const(<4 x i32> %arg) { ; X86-LABEL: const_sub_sub_const: ; X86: # %bb.0: -; X86-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8] +; X86-NEXT: movdqa {{.*#+}} xmm1 = [6,6,6,6] ; X86-NEXT: psubd %xmm0, %xmm1 -; X86-NEXT: psubd {{\.LCPI.*}}, %xmm1 ; X86-NEXT: movdqa %xmm1, %xmm0 ; X86-NEXT: retl ; ; X64-LABEL: const_sub_sub_const: ; X64: # %bb.0: -; X64-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8] +; X64-NEXT: movdqa {{.*#+}} xmm1 = [6,6,6,6] ; X64-NEXT: psubd %xmm0, %xmm1 -; X64-NEXT: psubd {{.*}}(%rip), %xmm1 ; X64-NEXT: movdqa %xmm1, %xmm0 ; X64-NEXT: retq %t0 = sub <4 x i32> , %arg @@ -523,13 +521,14 @@ define <4 x i32> @const_sub_sub_const_extrause(<4 x i32> %arg) { ; X86: # %bb.0: ; X86-NEXT: subl $28, %esp ; X86-NEXT: .cfi_def_cfa_offset 32 -; X86-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8] -; X86-NEXT: psubd %xmm0, %xmm1 -; X86-NEXT: movdqu %xmm1, (%esp) # 16-byte Spill -; X86-NEXT: movdqa %xmm1, %xmm0 +; X86-NEXT: movdqa %xmm0, %xmm1 +; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill +; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8] +; X86-NEXT: psubd %xmm1, %xmm0 ; X86-NEXT: calll use -; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload -; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0 +; X86-NEXT: movdqa {{.*#+}} xmm0 = [6,6,6,6] +; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload +; X86-NEXT: psubd %xmm1, %xmm0 ; X86-NEXT: addl $28, %esp ; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: retl @@ -538,13 +537,13 @@ define <4 x i32> @const_sub_sub_const_extrause(<4 x i32> %arg) { ; X64: # %bb.0: ; X64-NEXT: subq $24, %rsp ; X64-NEXT: .cfi_def_cfa_offset 32 -; X64-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8] -; X64-NEXT: psubd %xmm0, %xmm1 -; X64-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill -; X64-NEXT: movdqa %xmm1, %xmm0 +; X64-NEXT: movdqa %xmm0, %xmm1 +; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill +; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8] +; X64-NEXT: psubd %xmm1, %xmm0 ; X64-NEXT: callq use -; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload -; X64-NEXT: psubd {{.*}}(%rip), %xmm0 +; X64-NEXT: movdqa {{.*#+}} xmm0 = [6,6,6,6] +; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload ; X64-NEXT: addq $24, %rsp ; X64-NEXT: .cfi_def_cfa_offset 8 ; X64-NEXT: retq @@ -557,17 +556,15 @@ define <4 x i32> @const_sub_sub_const_extrause(<4 x i32> %arg) { define <4 x i32> @const_sub_sub_const_nonsplat(<4 x i32> %arg) { ; X86-LABEL: const_sub_sub_const_nonsplat: ; X86: # %bb.0: -; X86-NEXT: movdqa {{.*#+}} xmm1 = <21,u,8,8> +; X86-NEXT: movdqa {{.*#+}} xmm1 = <19,u,u,6> ; X86-NEXT: psubd %xmm0, %xmm1 -; X86-NEXT: psubd {{\.LCPI.*}}, %xmm1 ; X86-NEXT: movdqa %xmm1, %xmm0 ; X86-NEXT: retl ; ; X64-LABEL: const_sub_sub_const_nonsplat: ; X64: # %bb.0: -; X64-NEXT: movdqa {{.*#+}} xmm1 = <21,u,8,8> +; X64-NEXT: movdqa {{.*#+}} xmm1 = <19,u,u,6> ; X64-NEXT: psubd %xmm0, %xmm1 -; X64-NEXT: psubd {{.*}}(%rip), %xmm1 ; X64-NEXT: movdqa %xmm1, %xmm0 ; X64-NEXT: retq %t0 = sub <4 x i32> , %arg -- 2.11.0