From cd2049a20b2a13d0c2d52e5d290d71a6656205ec Mon Sep 17 00:00:00 2001 From: nickc Date: Fri, 19 Dec 2003 11:43:36 +0000 Subject: [PATCH] Add support for m32r-linux target, including a RELA ABI and PIC. --- bfd/ChangeLog | 39 + bfd/bfd-in2.h | 16 + bfd/config.bfd | 15 + bfd/configure | 31 +- bfd/configure.in | 3 + bfd/elf32-m32r.c | 2880 +++++++++++++++++++++++++++++++++-- bfd/reloc.c | 31 + bfd/targets.c | 6 + binutils/ChangeLog | 4 + binutils/readelf.c | 2 +- gas/ChangeLog | 15 + gas/NEWS | 2 + gas/config/tc-m32r.c | 154 +- gas/config/tc-m32r.h | 23 +- gas/configure | 5 +- gas/configure.in | 5 +- gas/doc/c-m32r.texi | 6 + gas/testsuite/ChangeLog | 13 + gas/testsuite/gas/m32r/allinsn.d | 2 +- gas/testsuite/gas/m32r/high-1.d | 6 +- gas/testsuite/gas/m32r/m32rx.d | 36 +- gas/testsuite/gas/m32r/m32rx.s | 2 +- gas/testsuite/gas/m32r/pic.d | 47 + gas/testsuite/gas/m32r/pic.exp | 5 + gas/testsuite/gas/m32r/pic.s | 43 + gas/testsuite/gas/m32r/relax-1.d | 2 +- gas/testsuite/gas/m32r/uppercase.d | 10 +- gas/testsuite/gas/vtable/vtable.exp | 1 - include/elf/ChangeLog | 17 + include/elf/m32r.h | 54 +- ld/ChangeLog | 12 + ld/Makefile.am | 12 + ld/Makefile.in | 18 +- ld/NEWS | 2 + ld/configure.tgt | 5 +- ld/emulparams/m32relf_linux.sh | 13 + ld/emulparams/m32rlelf.sh | 2 + ld/emulparams/m32rlelf_linux.sh | 2 + sim/common/ChangeLog | 4 + sim/common/sim-core.c | 19 + sim/m32r/ChangeLog | 12 + sim/m32r/Makefile.in | 7 +- sim/m32r/configure | 16 + sim/m32r/configure.in | 14 + sim/m32r/sim-if.c | 7 + sim/m32r/sim-main.h | 4 + sim/m32r/syscall.h | 195 +++ sim/m32r/traps-linux.c | 1392 +++++++++++++++++ 48 files changed, 5041 insertions(+), 170 deletions(-) create mode 100644 gas/testsuite/gas/m32r/pic.d create mode 100644 gas/testsuite/gas/m32r/pic.exp create mode 100644 gas/testsuite/gas/m32r/pic.s create mode 100644 ld/emulparams/m32relf_linux.sh create mode 100644 ld/emulparams/m32rlelf.sh create mode 100644 ld/emulparams/m32rlelf_linux.sh create mode 100644 sim/m32r/syscall.h create mode 100644 sim/m32r/traps-linux.c diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 0401565ab9..9665466689 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,42 @@ +2003-12-19 Kazuhiro Inaoka + + Adfd m32r-linux and PIC support. Add new ABI that uses RELA. + * config.bfd (m32r*-*-linux*, m32r*le-*-linux*, m32r*le-*-*): Added. + * configure.in (bfd_elf32_m32rlin_vec, bfd_elf32_m32rlelin_vec, + bfd_elf32_m32rle_vec): Added + * configure: Regenerated. + * elf32-m32r.c (m32r_info_to_howto, m32r_elf_adjust_dynamic_symbol, + m32r_elf_size_dynamic_sections, m32r_elf_create_dynamic_sections, + m32r_elf_finish_dynamic_sections, m32r_elf_finish_dynamic_symbol, + allocate_dynrelocs, readonly_dynrelocs, m32r_elf_reloc_type_class, + m32r_elf_fake_sections): Added. + (m32r_elf_howto_table): Added + R_M32R_16_RELA, R_M32R_32_RELA, R_M32R_24_RELA, + R_M32R_10_PCREL_RELA, R_M32R_18_PCREL_RELA, + R_M32R_26_PCREL_RELA, R_M32R_HI16_ULO_RELA, + R_M32R_HI16_SLO_RELA, R_M32R_LO16_RELA, + R_M32R_SDA16_RELA, R_M32R_RELA_GNU_VTINHERIT, + R_M32R_RELA_GNU_VTENTRY, R_M32R_GOT24, + R_M32R_26_PLTREL, R_M32R_COPY, R_M32R_GLOB_DAT, + R_M32R_JMP_SLOT, R_M32R_RELATIVE, R_M32R_GOTOFF, + R_M32R_GOTPC24, R_M32R_GOT16_HI_ULO, + R_M32R_GOT16_HI_SLO, R_M32R_GOT16_LO, + R_M32R_GOTPC_HI_ULO, R_M32R_GOTPC_HI_SLO, + R_M32R_GOTPC_LO. + (m32r_elf_relocate_section, m32r_elf_check_relocs): Changed for + New ABI. + * reloc.c: Add BFD_RELOC_M32R_GOT24, BFD_RELOC_M32R_26_PLTREL, + BFD_RELOC_M32R_COPY, BFD_RELOC_M32R_GLOB_DAT, + BFD_RELOC_M32R_JMP_SLOT, BFD_RELOC_M32R_RELATIVE, + BFD_RELOC_M32R_GOTOFF, BFD_RELOC_M32R_GOTPC24, + BFD_RELOC_M32R_GOT16_HI_ULO, BFD_RELOC_M32R_GOT16_HI_SLO, + BFD_RELOC_M32R_GOT16_LO, BFD_RELOC_M32R_GOTPC_HI_ULO, + BFD_RELOC_M32R_GOTPC_HI_SLO, BFD_RELOC_M32R_GOTPC_LO. + * targets.c (bfd_elf32_m32rlin_vec, bfd_elf32_m32rlelin_vec, + bfd_elf32_m32rle_vec): Added. + * bfd-in2.h: Regenerated. + * libbfd.h: Regenerated. + 2003-12-19 Danny Smith * coffcode.h (styp_to_sec_flags): Don't treat .reloc section diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 2afcf7f48a..cfce4cefb0 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -2807,6 +2807,22 @@ used when the lower 16 bits are treated as signed. */ add3, load, and store instructions. */ BFD_RELOC_M32R_SDA16, +/* For PIC. */ + BFD_RELOC_M32R_GOT24, + BFD_RELOC_M32R_26_PLTREL, + BFD_RELOC_M32R_COPY, + BFD_RELOC_M32R_GLOB_DAT, + BFD_RELOC_M32R_JMP_SLOT, + BFD_RELOC_M32R_RELATIVE, + BFD_RELOC_M32R_GOTOFF, + BFD_RELOC_M32R_GOTPC24, + BFD_RELOC_M32R_GOT16_HI_ULO, + BFD_RELOC_M32R_GOT16_HI_SLO, + BFD_RELOC_M32R_GOT16_LO, + BFD_RELOC_M32R_GOTPC_HI_ULO, + BFD_RELOC_M32R_GOTPC_HI_SLO, + BFD_RELOC_M32R_GOTPC_LO, + /* This is a 9-bit reloc */ BFD_RELOC_V850_9_PCREL, diff --git a/bfd/config.bfd b/bfd/config.bfd index c1ca87e853..4987bce2a9 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -597,6 +597,21 @@ case "${targ}" in targ_defvec=bfd_elf32_iq2000_vec ;; + m32r*le-*-linux*) + targ_defvec=bfd_elf32_m32rlelin_vec + targ_selvecs="bfd_elf32_m32rlin_vec bfd_elf32_m32rlelin_vec" + ;; + + m32r*-*-linux*) + targ_defvec=bfd_elf32_m32rlin_vec + targ_selvecs="bfd_elf32_m32rlin_vec bfd_elf32_m32rlelin_vec" + ;; + + m32r*le-*-*) + targ_defvec=bfd_elf32_m32rle_vec + targ_selvecs="bfd_elf32_m32r_vec bfd_elf32_m32rle_vec" + ;; + m32r-*-*) targ_defvec=bfd_elf32_m32r_vec ;; diff --git a/bfd/configure b/bfd/configure index 42345bb24b..5704aef6ea 100755 --- a/bfd/configure +++ b/bfd/configure @@ -6320,6 +6320,9 @@ do bfd_elf32_littlearm_vec) tb="$tb elfarm-nabi.lo elf32.lo $elf" ;; bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;; bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + bfd_elf32_m32rle_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + bfd_elf32_m32rlin_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + bfd_elf32_m32rlelin_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; bfd_elf32_m68hc11_vec) tb="$tb elf32-m68hc11.lo elf32-m68hc1x.lo elf32.lo $elf" ;; bfd_elf32_m68hc12_vec) tb="$tb elf32-m68hc12.lo elf32-m68hc1x.lo elf32.lo $elf" ;; bfd_elf32_m68k_vec) tb="$tb elf32-m68k.lo elf32.lo $elf" ;; @@ -6579,10 +6582,10 @@ case ${host64}-${target64}-${want64} in if test -n "$GCC" ; then bad_64bit_gcc=no; echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6 -echo "configure:6583: checking for gcc version with buggy 64-bit support" >&5 +echo "configure:6586: checking for gcc version with buggy 64-bit support" >&5 # Add more tests for gcc versions with non-working 64-bit support here. cat > conftest.$ac_ext <&6 -echo "configure:6632: checking for $ac_hdr" >&5 +echo "configure:6635: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:6642: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:6645: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -6667,12 +6670,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:6671: checking for $ac_func" >&5 +echo "configure:6674: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6702: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -6720,7 +6723,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:6724: checking for working mmap" >&5 +echo "configure:6727: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -6728,7 +6731,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:6875: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -6893,12 +6896,12 @@ fi for ac_func in madvise mprotect do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:6897: checking for $ac_func" >&5 +echo "configure:6900: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6928: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else diff --git a/bfd/configure.in b/bfd/configure.in index 72c32bd695..760bfe3afe 100644 --- a/bfd/configure.in +++ b/bfd/configure.in @@ -631,6 +631,9 @@ do bfd_elf32_littlearm_vec) tb="$tb elfarm-nabi.lo elf32.lo $elf" ;; bfd_elf32_littlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;; bfd_elf32_m32r_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + bfd_elf32_m32rle_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + bfd_elf32_m32rlin_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + bfd_elf32_m32rlelin_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; bfd_elf32_m68hc11_vec) tb="$tb elf32-m68hc11.lo elf32-m68hc1x.lo elf32.lo $elf" ;; bfd_elf32_m68hc12_vec) tb="$tb elf32-m68hc12.lo elf32-m68hc1x.lo elf32.lo $elf" ;; bfd_elf32_m68k_vec) tb="$tb elf32-m68k.lo elf32.lo $elf" ;; diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c index 2794ffb413..3edf4a9738 100644 --- a/bfd/elf32-m32r.c +++ b/bfd/elf32-m32r.c @@ -44,6 +44,8 @@ static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); static void m32r_info_to_howto_rel PARAMS ((bfd *, arelent *, Elf_Internal_Rela *)); +static void m32r_info_to_howto + PARAMS ((bfd *, arelent *, Elf_Internal_Rela *)); bfd_boolean _bfd_m32r_elf_section_from_bfd_section PARAMS ((bfd *, asection *, int *)); void _bfd_m32r_elf_symbol_processing @@ -77,10 +79,34 @@ static bfd_boolean m32r_elf_check_relocs PARAMS ((bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *)); +static bfd_boolean m32r_elf_adjust_dynamic_symbol + PARAMS ((struct bfd_link_info *, struct elf_link_hash_entry *)); +static bfd_boolean m32r_elf_size_dynamic_sections + PARAMS ((bfd *, struct bfd_link_info *)); + asection * m32r_elf_gc_mark_hook PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *, struct elf_link_hash_entry *, Elf_Internal_Sym *)); +static bfd_boolean m32r_elf_create_dynamic_sections + PARAMS ((bfd *, struct bfd_link_info *)); + +static bfd_boolean m32r_elf_finish_dynamic_sections + PARAMS ((bfd *, struct bfd_link_info *)); + +static bfd_boolean m32r_elf_finish_dynamic_symbol + PARAMS ((bfd *, struct bfd_link_info *, struct elf_link_hash_entry *, + Elf_Internal_Sym *)); + +static bfd_boolean allocate_dynrelocs + PARAMS ((struct elf_link_hash_entry *, PTR)); +static bfd_boolean readonly_dynrelocs + PARAMS ((struct elf_link_hash_entry *, PTR)); +static enum elf_reloc_type_class m32r_elf_reloc_type_class + PARAMS ((const Elf_Internal_Rela *)); +static bfd_boolean m32r_elf_fake_sections + PARAMS ((bfd *, Elf_Internal_Shdr *, asection *)); + #define NOP_INSN 0x7000 #define MAKE_PARALLEL(insn) ((insn) | 0x8000) @@ -88,11 +114,55 @@ asection * m32r_elf_gc_mark_hook This only saves space in libraries and object files, but perhaps relocs will be put in ROM? All in all though, REL relocs are a pain to work with. */ -#define USE_REL 1 +/* #define USE_REL 1 #ifndef USE_REL #define USE_REL 0 -#endif +#endif */ +/* Use RELA. But use REL to link old objects for backwords compatibility. */ + +/* Functions for the M32R ELF linker. */ + +/* The name of the dynamic interpreter. This is put in the .interp + section. */ + +#define ELF_DYNAMIC_INTERPRETER "/usr/lib/libc.so.1" + +/* The nop opcode we use. */ + +#define M32R_NOP 0x7000f000 + +#define PLT_EMPTY 0x10101010 /* RIE -> RIE */ + +/* The size in bytes of an entry in the procedure linkage table. */ + +#define PLT_ENTRY_SIZE 20 +#define PLT_HEADER_SIZE 20 + +/* The first one entries in a procedure linkage table are reserved, + and the initial contents are unimportant (we zero them out). + Subsequent entries look like this. */ + +#define PLT0_ENTRY_WORD0 0xd6c00000 /* seth r6, #high(.got+4) */ +#define PLT0_ENTRY_WORD1 0x86e60000 /* or3 r6, r6, #low(.got)+4) */ +#define PLT0_ENTRY_WORD2 0x24e626c6 /* ld r4, @r6+ -> ld r6, @r6 */ +#define PLT0_ENTRY_WORD3 0x1fc6f000 /* jmp r6 || pnop */ +#define PLT0_ENTRY_WORD4 PLT_EMPTY /* RIE -> RIE */ + +#define PLT0_PIC_ENTRY_WORD0 0xa4cc0004 /* ld r4, @(4,r12) */ +#define PLT0_PIC_ENTRY_WORD1 0xa6cc0008 /* ld r6, @(8,r12) */ +#define PLT0_PIC_ENTRY_WORD2 0x1fc6f000 /* jmp r6 || nop */ +#define PLT0_PIC_ENTRY_WORD3 PLT_EMPTY /* RIE -> RIE */ +#define PLT0_PIC_ENTRY_WORD4 PLT_EMPTY /* RIE -> RIE */ + +#define PLT_ENTRY_WORD0 0xe6000000 /* ld24 r6, .name_in_GOT */ +#define PLT_ENTRY_WORD1 0x06acf000 /* add r6, r12 || nop */ +#define PLT_ENTRY_WORD0b 0xd6c00000 /* seth r6, #high(.name_in_GOT) */ +#define PLT_ENTRY_WORD1b 0x86e60000 /* or3 r6, r6, #low(.name_in_GOT) */ +#define PLT_ENTRY_WORD2 0x26c61fc6 /* ld r6, @r6 -> jmp r6 */ +#define PLT_ENTRY_WORD3 0xe5000000 /* ld24 r5, $offset */ +#define PLT_ENTRY_WORD4 0xff000000 /* bra .plt0. */ + static reloc_howto_type m32r_elf_howto_table[] = { @@ -302,6 +372,437 @@ static reloc_howto_type m32r_elf_howto_table[] = 0, /* dst_mask */ FALSE), /* pcrel_offset */ + EMPTY_HOWTO (13), + EMPTY_HOWTO (14), + EMPTY_HOWTO (15), + EMPTY_HOWTO (16), + EMPTY_HOWTO (17), + EMPTY_HOWTO (18), + EMPTY_HOWTO (19), + EMPTY_HOWTO (20), + EMPTY_HOWTO (21), + EMPTY_HOWTO (22), + EMPTY_HOWTO (23), + EMPTY_HOWTO (24), + EMPTY_HOWTO (25), + EMPTY_HOWTO (26), + EMPTY_HOWTO (27), + EMPTY_HOWTO (28), + EMPTY_HOWTO (29), + EMPTY_HOWTO (30), + EMPTY_HOWTO (31), + EMPTY_HOWTO (32), + + /* A 16 bit absolute relocation. */ + HOWTO (R_M32R_16_RELA, /* type */ + 0, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_16_RELA", /* name */ + FALSE, /* partial_inplace */ + 0xffff, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 32 bit absolute relocation. */ + HOWTO (R_M32R_32_RELA, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc,/* special_function */ + "R_M32R_32_RELA", /* name */ + FALSE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* A 24 bit address. */ + HOWTO (R_M32R_24_RELA, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 24, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc,/* special_function */ + "R_M32R_24_RELA", /* name */ + FALSE, /* partial_inplace */ + 0xffffff, /* src_mask */ + 0xffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + HOWTO (R_M32R_10_PCREL_RELA, /* type */ + 2, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 10, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + m32r_elf_10_pcrel_reloc, /* special_function */ + "R_M32R_10_PCREL_RELA",/* name */ + FALSE, /* partial_inplace */ + 0xff, /* src_mask */ + 0xff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* A relative 18 bit relocation, right shifted by 2. */ + HOWTO (R_M32R_18_PCREL_RELA, /* type */ + 2, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_18_PCREL_RELA",/* name */ + FALSE, /* partial_inplace */ + 0xffff, /* src_mask */ + 0xffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* A relative 26 bit relocation, right shifted by 2. */ + HOWTO (R_M32R_26_PCREL_RELA, /* type */ + 2, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 26, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_26_PCREL_RELA",/* name */ + FALSE, /* partial_inplace */ + 0xffffff, /* src_mask */ + 0xffffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* High 16 bits of address when lower 16 is or'd in. */ + HOWTO (R_M32R_HI16_ULO_RELA, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_HI16_ULO_RELA",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* High 16 bits of address when lower 16 is added in. */ + HOWTO (R_M32R_HI16_SLO_RELA, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_HI16_SLO_RELA",/* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Lower 16 bits of address. */ + HOWTO (R_M32R_LO16_RELA, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_LO16_RELA", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Small data area 16 bits offset. */ + HOWTO (R_M32R_SDA16_RELA, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_SDA16_RELA", /* name */ + TRUE, /* partial_inplace */ /* FIXME: correct? */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GNU extension to record C++ vtable hierarchy */ + HOWTO (R_M32R_RELA_GNU_VTINHERIT, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + NULL, /* special_function */ + "R_M32R_RELA_GNU_VTINHERIT", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* GNU extension to record C++ vtable member usage */ + HOWTO (R_M32R_RELA_GNU_VTENTRY, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 0, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + _bfd_elf_rel_vtable_reloc_fn, /* special_function */ + "R_M32R_RELA_GNU_VTENTRY", /* name */ + FALSE, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + FALSE), /* pcrel_offset */ + + EMPTY_HOWTO (45), + EMPTY_HOWTO (46), + EMPTY_HOWTO (47), + + /* Like R_M32R_24, but referring to the GOT table entry for + the symbol. */ + HOWTO (R_M32R_GOT24, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 24, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOT24", /* name */ + FALSE, /* partial_inplace */ + 0xffffff, /* src_mask */ + 0xffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Like R_M32R_PCREL, but referring to the procedure linkage table + entry for the symbol. */ + HOWTO (R_M32R_26_PLTREL, /* type */ + 2, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 24, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_26_PLTREL", /* name */ + FALSE, /* partial_inplace */ + 0xffffff, /* src_mask */ + 0xffffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* This is used only by the dynamic linker. The symbol should exist + both in the object being run and in some shared library. The + dynamic linker copies the data addressed by the symbol from the + shared library into the object, because the object being + run has to have the data at some particular address. */ + HOWTO (R_M32R_COPY, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_COPY", /* name */ + FALSE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Like R_M32R_24, but used when setting global offset table + entries. */ + HOWTO (R_M32R_GLOB_DAT, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GLOB_DAT", /* name */ + FALSE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Marks a procedure linkage table entry for a symbol. */ + HOWTO (R_M32R_JMP_SLOT, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_JMP_SLOT", /* name */ + FALSE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Used only by the dynamic linker. When the object is run, this + longword is set to the load address of the object, plus the + addend. */ + HOWTO (R_M32R_RELATIVE, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_RELATIVE", /* name */ + FALSE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + HOWTO (R_M32R_GOTOFF, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 32, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOTOFF", /* name */ + FALSE, /* partial_inplace */ + 0xffffffff, /* src_mask */ + 0xffffffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* An PC Relative 24-bit relocation used when setting PIC offset + table register. */ + HOWTO (R_M32R_GOTPC24, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 24, /* bitsize */ + TRUE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOTPC24", /* name */ + FALSE, /* partial_inplace */ + 0xffffff, /* src_mask */ + 0xffffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* Like R_M32R_HI16_ULO, but referring to the GOT table entry for + the symbol. */ + HOWTO (R_M32R_GOT16_HI_ULO, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOT16_HI_ULO", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Like R_M32R_HI16_SLO, but referring to the GOT table entry for + the symbol. */ + HOWTO (R_M32R_GOT16_HI_SLO, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOT16_HI_SLO", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* Like R_M32R_LO16, but referring to the GOT table entry for + the symbol. */ + HOWTO (R_M32R_GOT16_LO, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOT16_LO", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + + /* An PC Relative relocation used when setting PIC offset table register. + Like R_M32R_HI16_ULO, but referring to the GOT table entry for + the symbol. */ + HOWTO (R_M32R_GOTPC_HI_ULO, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOTPC_HI_ULO", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* An PC Relative relocation used when setting PIC offset table register. + Like R_M32R_HI16_SLO, but referring to the GOT table entry for + the symbol. */ + HOWTO (R_M32R_GOTPC_HI_SLO, /* type */ + 16, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOTPC_HI_SLO", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ + + /* An PC Relative relocation used when setting PIC offset table register. + Like R_M32R_LO16, but referring to the GOT table entry for + the symbol. */ + HOWTO (R_M32R_GOTPC_LO, /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 16, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_M32R_GOTPC_LO", /* name */ + FALSE, /* partial_inplace */ + 0x0000ffff, /* src_mask */ + 0x0000ffff, /* dst_mask */ + TRUE), /* pcrel_offset */ }; /* Handle the R_M32R_10_PCREL reloc. */ @@ -715,7 +1216,7 @@ struct m32r_reloc_map unsigned char elf_reloc_val; }; -static const struct m32r_reloc_map m32r_reloc_map[] = +static const struct m32r_reloc_map m32r_reloc_map_old[] = { { BFD_RELOC_NONE, R_M32R_NONE }, { BFD_RELOC_16, R_M32R_16 }, @@ -732,6 +1233,38 @@ static const struct m32r_reloc_map m32r_reloc_map[] = { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY }, }; +static const struct m32r_reloc_map m32r_reloc_map[] = +{ + { BFD_RELOC_NONE, R_M32R_NONE }, + { BFD_RELOC_16, R_M32R_16_RELA }, + { BFD_RELOC_32, R_M32R_32_RELA }, + { BFD_RELOC_M32R_24, R_M32R_24_RELA }, + { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL_RELA }, + { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL_RELA }, + { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL_RELA }, + { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO_RELA }, + { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO_RELA }, + { BFD_RELOC_M32R_LO16, R_M32R_LO16_RELA }, + { BFD_RELOC_M32R_SDA16, R_M32R_SDA16_RELA }, + { BFD_RELOC_VTABLE_INHERIT, R_M32R_RELA_GNU_VTINHERIT }, + { BFD_RELOC_VTABLE_ENTRY, R_M32R_RELA_GNU_VTENTRY }, + + { BFD_RELOC_M32R_GOT24, R_M32R_GOT24 }, + { BFD_RELOC_M32R_26_PLTREL, R_M32R_26_PLTREL }, + { BFD_RELOC_M32R_COPY, R_M32R_COPY }, + { BFD_RELOC_M32R_GLOB_DAT, R_M32R_GLOB_DAT }, + { BFD_RELOC_M32R_JMP_SLOT, R_M32R_JMP_SLOT }, + { BFD_RELOC_M32R_RELATIVE, R_M32R_RELATIVE }, + { BFD_RELOC_M32R_GOTOFF, R_M32R_GOTOFF }, + { BFD_RELOC_M32R_GOTPC24, R_M32R_GOTPC24 }, + { BFD_RELOC_M32R_GOT16_HI_ULO, R_M32R_GOT16_HI_ULO }, + { BFD_RELOC_M32R_GOT16_HI_SLO, R_M32R_GOT16_HI_SLO }, + { BFD_RELOC_M32R_GOT16_LO, R_M32R_GOT16_LO }, + { BFD_RELOC_M32R_GOTPC_HI_ULO, R_M32R_GOTPC_HI_ULO }, + { BFD_RELOC_M32R_GOTPC_HI_SLO, R_M32R_GOTPC_HI_SLO }, + { BFD_RELOC_M32R_GOTPC_LO, R_M32R_GOTPC_LO }, +}; + static reloc_howto_type * bfd_elf32_bfd_reloc_type_lookup (abfd, code) bfd *abfd ATTRIBUTE_UNUSED; @@ -739,6 +1272,16 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code) { unsigned int i; +#ifdef USE_M32R_OLD_RELOC + for (i = 0; + i < sizeof (m32r_reloc_map_old) / sizeof (struct m32r_reloc_map); + i++) + { + if (m32r_reloc_map_old[i].bfd_reloc_val == code) + return &m32r_elf_howto_table[m32r_reloc_map_old[i].elf_reloc_val]; + } +#else /* ! USE_M32R_OLD_RELOC */ + for (i = 0; i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map); i++) @@ -746,6 +1289,7 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code) if (m32r_reloc_map[i].bfd_reloc_val == code) return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val]; } +#endif return NULL; } @@ -761,9 +1305,22 @@ m32r_info_to_howto_rel (abfd, cache_ptr, dst) unsigned int r_type; r_type = ELF32_R_TYPE (dst->r_info); - BFD_ASSERT (r_type < (unsigned int) R_M32R_max); + BFD_ASSERT (ELF32_R_TYPE(dst->r_info) <= (unsigned int) R_M32R_GNU_VTENTRY) cache_ptr->howto = &m32r_elf_howto_table[r_type]; } + +static void +m32r_info_to_howto (abfd, cache_ptr, dst) + bfd *abfd ATTRIBUTE_UNUSED; + arelent *cache_ptr; + Elf_Internal_Rela *dst; +{ + BFD_ASSERT ((ELF32_R_TYPE(dst->r_info) == (unsigned int) R_M32R_NONE) + || ((ELF32_R_TYPE(dst->r_info) > (unsigned int) R_M32R_GNU_VTENTRY) + && (ELF32_R_TYPE(dst->r_info) < (unsigned int) R_M32R_max))); + cache_ptr->howto = &m32r_elf_howto_table[ELF32_R_TYPE(dst->r_info)]; +} + /* Given a BFD section, try to locate the corresponding ELF section index. */ @@ -854,87 +1411,1078 @@ m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp) struct bfd_link_hash_entry *bh; asection *s = bfd_get_section_by_name (abfd, ".sdata"); - /* The following code was cobbled from elf32-ppc.c and elflink.c. */ + /* The following code was cobbled from elf32-ppc.c and elflink.c. */ + + if (s == NULL) + { + flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS + | SEC_IN_MEMORY | SEC_LINKER_CREATED); + + s = bfd_make_section_anyway (abfd, ".sdata"); + if (s == NULL) + return FALSE; + bfd_set_section_flags (abfd, s, flags); + bfd_set_section_alignment (abfd, s, 2); + } + + bh = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", + FALSE, FALSE, FALSE); + + if ((bh == NULL || bh->type == bfd_link_hash_undefined) + && !(_bfd_generic_link_add_one_symbol (info, + abfd, + "_SDA_BASE_", + BSF_GLOBAL, + s, + (bfd_vma) 32768, + (const char *) NULL, + FALSE, + get_elf_backend_data (abfd)->collect, + &bh))) + return FALSE; + h = (struct elf_link_hash_entry *) bh; + h->type = STT_OBJECT; + } + + switch (sym->st_shndx) + { + case SHN_M32R_SCOMMON: + *secp = bfd_make_section_old_way (abfd, ".scommon"); + (*secp)->flags |= SEC_IS_COMMON; + *valp = sym->st_size; + break; + } + + return TRUE; +} + +/* We have to figure out the SDA_BASE value, so that we can adjust the + symbol value correctly. We look up the symbol _SDA_BASE_ in the output + BFD. If we can't find it, we're stuck. We cache it in the ELF + target data. We don't need to adjust the symbol value for an + external symbol if we are producing relocatable output. */ + +static bfd_reloc_status_type +m32r_elf_final_sda_base (output_bfd, info, error_message, psb) + bfd *output_bfd; + struct bfd_link_info *info; + const char **error_message; + bfd_vma *psb; +{ + if (elf_gp (output_bfd) == 0) + { + struct bfd_link_hash_entry *h; + + h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE); + if (h != (struct bfd_link_hash_entry *) NULL + && h->type == bfd_link_hash_defined) + elf_gp (output_bfd) = (h->u.def.value + + h->u.def.section->output_section->vma + + h->u.def.section->output_offset); + else + { + /* Only get the error once. */ + *psb = elf_gp (output_bfd) = 4; + *error_message = + (const char *) _("SDA relocation when _SDA_BASE_ not defined"); + return bfd_reloc_dangerous; + } + } + *psb = elf_gp (output_bfd); + return bfd_reloc_ok; +} + +/* Return size of a PLT entry. */ +#define elf_m32r_sizeof_plt(info) PLT_ENTRY_SIZE + +/* The m32r linker needs to keep track of the number of relocs that it + decides to copy in check_relocs for each symbol. This is so that + it can discard PC relative relocs if it doesn't need them when + linking with -Bsymbolic. We store the information in a field + extending the regular ELF linker hash table. */ + +/* This structure keeps track of the number of PC relative relocs we + have copied for a given symbol. */ + +struct elf_m32r_pcrel_relocs_copied +{ + /* Next section. */ + struct elf_m32r_pcrel_relocs_copied *next; + /* A section in dynobj. */ + asection *section; + /* Number of relocs copied in this section. */ + bfd_size_type count; +}; + +/* The sh linker needs to keep track of the number of relocs that it + decides to copy as dynamic relocs in check_relocs for each symbol. + This is so that it can later discard them if they are found to be + unnecessary. We store the information in a field extending the + regular ELF linker hash table. */ + +struct elf_m32r_dyn_relocs +{ + struct elf_m32r_dyn_relocs *next; + + /* The input section of the reloc. */ + asection *sec; + + /* Total number of relocs copied for the input section. */ + bfd_size_type count; + + /* Number of pc-relative relocs copied for the input section. */ + bfd_size_type pc_count; +}; + + +/* m32r ELF linker hash entry. */ + +struct elf_m32r_link_hash_entry +{ + struct elf_link_hash_entry root; + + /* Track dynamic relocs copied for this symbol. */ + struct elf_m32r_dyn_relocs *dyn_relocs; + +// bfd_signed_vma gotplt_refcount; + + /* Number of PC relative relocs copied for this symbol. */ + /* struct elf_m32r_pcrel_relocs_copied *pcrel_relocs_copied; FIXME */ +}; + +/* m32r ELF linker hash table. */ + +struct elf_m32r_link_hash_table +{ + struct elf_link_hash_table root; + + /* Short-cuts to get to dynamic linker sections. */ + asection *sgot; + asection *sgotplt; + asection *srelgot; + asection *splt; + asection *srelplt; + asection *sdynbss; + asection *srelbss; + + /* Small local sym to section mapping cache. */ + struct sym_sec_cache sym_sec; +}; + +/* Traverse an m32r ELF linker hash table. */ + +#define m32r_elf_link_hash_traverse(table, func, info) \ + (elf_link_hash_traverse \ + (&(table)->root, \ + (bfd_boolean (*) PARAMS ((struct elf_link_hash_entry *, PTR))) (func), \ + (info))) + +/* Get the m32r ELF linker hash table from a link_info structure. */ + + +#define m32r_elf_hash_table(p) \ + ((struct elf_m32r_link_hash_table *) ((p)->hash)) + +/* Create an entry in an m32r ELF linker hash table. */ +static struct bfd_hash_entry * +m32r_elf_link_hash_newfunc (struct bfd_hash_entry *, struct bfd_hash_table *, + const char * ); + +static struct bfd_hash_entry * +m32r_elf_link_hash_newfunc (entry, table, string) + struct bfd_hash_entry *entry; + struct bfd_hash_table *table; + const char *string; +{ + struct elf_m32r_link_hash_entry *ret = + (struct elf_m32r_link_hash_entry *) entry; + + /* Allocate the structure if it has not already been allocated by a + subclass. */ + if (ret == (struct elf_m32r_link_hash_entry *) NULL) + ret = ((struct elf_m32r_link_hash_entry *) + bfd_hash_allocate (table, + sizeof (struct elf_m32r_link_hash_entry))); + if (ret == (struct elf_m32r_link_hash_entry *) NULL) + return (struct bfd_hash_entry *) ret; + + /* Call the allocation method of the superclass. */ + ret = ((struct elf_m32r_link_hash_entry *) + _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, + table, string)); + if (ret != (struct elf_m32r_link_hash_entry *) NULL) + { + struct elf_m32r_link_hash_entry *eh; + + eh = (struct elf_m32r_link_hash_entry *) ret; + eh->dyn_relocs = NULL; +// eh->gotplt_refcount = 0; + /* eh->pcrel_relocs_copied = NULL; FIXME */ + } + + return (struct bfd_hash_entry *) ret; +} + +/* Create an m32r ELF linker hash table. */ +static struct bfd_link_hash_table *m32r_elf_link_hash_table_create (bfd *); + +static struct bfd_link_hash_table * +m32r_elf_link_hash_table_create (abfd) + bfd *abfd; +{ + struct elf_m32r_link_hash_table *ret; + bfd_size_type amt = sizeof (struct elf_m32r_link_hash_table); + + ret = (struct elf_m32r_link_hash_table *) bfd_malloc (amt); + if (ret == (struct elf_m32r_link_hash_table *) NULL) + return NULL; + + if (! _bfd_elf_link_hash_table_init (&ret->root, abfd, + m32r_elf_link_hash_newfunc)) + { + free (ret); + return NULL; + } + + ret->sgot = NULL; + ret->sgotplt = NULL; + ret->srelgot = NULL; + ret->splt = NULL; + ret->srelplt = NULL; + ret->sdynbss = NULL; + ret->srelbss = NULL; + ret->sym_sec.abfd = NULL; + + return &ret->root.root; +} + +/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up + shortcuts to them in our hash table. */ +static bfd_boolean create_got_section (bfd *, struct bfd_link_info *); + +static bfd_boolean +create_got_section (dynobj, info) + bfd *dynobj; + struct bfd_link_info *info; +{ + struct elf_m32r_link_hash_table *htab; + + if (! _bfd_elf_create_got_section (dynobj, info)) + return FALSE; + + htab = m32r_elf_hash_table (info); + htab->sgot = bfd_get_section_by_name (dynobj, ".got"); + htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt"); + if (! htab->sgot || ! htab->sgotplt) + abort (); + + htab->srelgot = bfd_make_section (dynobj, ".rela.got"); + if (htab->srelgot == NULL + || ! bfd_set_section_flags (dynobj, htab->srelgot, + (SEC_ALLOC + | SEC_LOAD + | SEC_HAS_CONTENTS + | SEC_IN_MEMORY + | SEC_LINKER_CREATED + | SEC_READONLY)) + || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2)) + return FALSE; + + return TRUE; +} + +/* Create dynamic sections when linking against a dynamic object. */ + +static bfd_boolean +m32r_elf_create_dynamic_sections (abfd, info) + bfd *abfd; + struct bfd_link_info *info; +{ + struct elf_m32r_link_hash_table *htab; + flagword flags, pltflags; + register asection *s; + const struct elf_backend_data *bed = get_elf_backend_data (abfd); + int ptralign = 2; /* 32bit */ + + htab = m32r_elf_hash_table (info); + + /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and + .rel[a].bss sections. */ + + flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY + | SEC_LINKER_CREATED); + + pltflags = flags; + pltflags |= SEC_CODE; + if (bed->plt_not_loaded) + pltflags &= ~ (SEC_LOAD | SEC_HAS_CONTENTS); + if (bed->plt_readonly) + pltflags |= SEC_READONLY; + + s = bfd_make_section (abfd, ".plt"); + htab->splt = s; + if (s == NULL + || ! bfd_set_section_flags (abfd, s, pltflags) + || ! bfd_set_section_alignment (abfd, s, bed->plt_alignment)) + return FALSE; + + if (bed->want_plt_sym) + { + /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the + .plt section. */ + struct elf_link_hash_entry *h = NULL; + if (! (_bfd_generic_link_add_one_symbol + (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s, + (bfd_vma) 0, (const char *) NULL, FALSE, + get_elf_backend_data (abfd)->collect, + (struct bfd_link_hash_entry **) &h))) + return FALSE; + h->elf_link_hash_flags |= ELF_LINK_HASH_DEF_REGULAR; + h->type = STT_OBJECT; + + if (info->shared + && ! _bfd_elf_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + s = bfd_make_section (abfd, + bed->default_use_rela_p ? ".rela.plt" : ".rel.plt"); + htab->srelplt = s; + if (s == NULL + || ! bfd_set_section_flags (abfd, s, flags | SEC_READONLY) + || ! bfd_set_section_alignment (abfd, s, ptralign)) + return FALSE; + + if (htab->sgot == NULL + && ! create_got_section (abfd, info)) + return FALSE; + + { + const char *secname; + char *relname; + flagword secflags; + asection *sec; + + for (sec = abfd->sections; sec; sec = sec->next) + { + secflags = bfd_get_section_flags (abfd, sec); + if ((secflags & (SEC_DATA | SEC_LINKER_CREATED)) + || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS)) + continue; + secname = bfd_get_section_name (abfd, sec); + relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6); + strcpy (relname, ".rela"); + strcat (relname, secname); + if (bfd_get_section_by_name (abfd, secname)) + continue; + s = bfd_make_section (abfd, relname); + if (s == NULL + || ! bfd_set_section_flags (abfd, s, flags | SEC_READONLY) + || ! bfd_set_section_alignment (abfd, s, ptralign)) + return FALSE; + } + } + + if (bed->want_dynbss) + { + /* The .dynbss section is a place to put symbols which are defined + by dynamic objects, are referenced by regular objects, and are + not functions. We must allocate space for them in the process + image and use a R_*_COPY reloc to tell the dynamic linker to + initialize them at run time. The linker script puts the .dynbss + section into the .bss section of the final image. */ + s = bfd_make_section (abfd, ".dynbss"); + htab->sdynbss = s; + if (s == NULL + || ! bfd_set_section_flags (abfd, s, SEC_ALLOC)) + return FALSE; + /* The .rel[a].bss section holds copy relocs. This section is not + normally needed. We need to create it here, though, so that the + linker will map it to an output section. We can't just create it + only if we need it, because we will not know whether we need it + until we have seen all the input files, and the first time the + main linker code calls BFD after examining all the input files + (size_dynamic_sections) the input sections have already been + mapped to the output sections. If the section turns out not to + be needed, we can discard it later. We will never need this + section when generating a shared object, since they do not use + copy relocs. */ + if (! info->shared) + { + s = bfd_make_section (abfd, + (bed->default_use_rela_p + ? ".rela.bss" : ".rel.bss")); + htab->srelbss = s; + if (s == NULL + || ! bfd_set_section_flags (abfd, s, flags | SEC_READONLY) + || ! bfd_set_section_alignment (abfd, s, ptralign)) + return FALSE; + } + } + + return TRUE; +} + +/* Copy the extra info we tack onto an elf_link_hash_entry. */ +static void m32r_elf_copy_indirect_symbol (const struct elf_backend_data *, + struct elf_link_hash_entry *, + struct elf_link_hash_entry *); + +static void +m32r_elf_copy_indirect_symbol (const struct elf_backend_data *bed, + struct elf_link_hash_entry *dir, + struct elf_link_hash_entry *ind) +{ + struct elf_m32r_link_hash_entry *edir, *eind; + + edir = (struct elf_m32r_link_hash_entry *) dir; + eind = (struct elf_m32r_link_hash_entry *) ind; + + if (eind->dyn_relocs != NULL) + { + if (edir->dyn_relocs != NULL) + { + struct elf_m32r_dyn_relocs **pp; + struct elf_m32r_dyn_relocs *p; + + if (ind->root.type == bfd_link_hash_indirect) + abort (); + + /* Add reloc counts against the weak sym to the strong sym + list. Merge any entries against the same section. */ + for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) + { + struct elf_m32r_dyn_relocs *q; + + for (q = edir->dyn_relocs; q != NULL; q = q->next) + if (q->sec == p->sec) + { + q->pc_count += p->pc_count; + q->count += p->count; + *pp = p->next; + break; + } + if (q == NULL) + pp = &p->next; + } + *pp = edir->dyn_relocs; + } + + edir->dyn_relocs = eind->dyn_relocs; + eind->dyn_relocs = NULL; + } + +// if (ind->root.type == bfd_link_hash_indirect +// && dir->got.refcount <= 0) +// { +// edir->tls_type = eind->tls_type; +// eind->tls_type = GOT_UNKNOWN; +// } + _bfd_elf_link_hash_copy_indirect (bed, dir, ind); +} + + +/* Adjust a symbol defined by a dynamic object and referenced by a + regular object. The current definition is in some section of the + dynamic object, but we're not including those sections. We have to + change the definition to something the rest of the link can + understand. */ + +static bfd_boolean +m32r_elf_adjust_dynamic_symbol (info, h) + struct bfd_link_info *info; + struct elf_link_hash_entry *h; +{ + struct elf_m32r_link_hash_table *htab; + struct elf_m32r_link_hash_entry *eh; + struct elf_m32r_dyn_relocs *p; + bfd *dynobj; + asection *s; + unsigned int power_of_two; + +#ifdef DEBUG_PIC +printf("m32r_elf_adjust_dynamic_symbol()\n"); +#endif + + dynobj = elf_hash_table (info)->dynobj; + + /* Make sure we know what is going on here. */ + BFD_ASSERT (dynobj != NULL + && ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT) + || h->weakdef != NULL + || ((h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_DYNAMIC) != 0 + && (h->elf_link_hash_flags + & ELF_LINK_HASH_REF_REGULAR) != 0 + && (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0))); + + + /* If this is a function, put it in the procedure linkage table. We + will fill in the contents of the procedure linkage table later, + when we know the address of the .got section. */ + if (h->type == STT_FUNC + || (h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_PLT) != 0) + { + if (! info->shared + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_DYNAMIC) == 0 + && (h->elf_link_hash_flags & ELF_LINK_HASH_REF_DYNAMIC) == 0 + && h->root.type != bfd_link_hash_undefweak + && h->root.type != bfd_link_hash_undefined) + { + /* This case can occur if we saw a PLT reloc in an input + file, but the symbol was never referred to by a dynamic + object. In such a case, we don't actually need to build + a procedure linkage table, and we can just do a PCREL + reloc instead. */ + h->plt.offset = (bfd_vma) -1; + h->elf_link_hash_flags &= ~ELF_LINK_HASH_NEEDS_PLT; + } + + return TRUE; + } + else + h->plt.offset = (bfd_vma) -1; + + /* If this is a weak symbol, and there is a real definition, the + processor independent code will have arranged for us to see the + real definition first, and we can just use the same value. */ + if (h->weakdef != NULL) + { + BFD_ASSERT (h->weakdef->root.type == bfd_link_hash_defined + || h->weakdef->root.type == bfd_link_hash_defweak); + h->root.u.def.section = h->weakdef->root.u.def.section; + h->root.u.def.value = h->weakdef->root.u.def.value; + return TRUE; + } + + /* This is a reference to a symbol defined by a dynamic object which + is not a function. */ + + /* If we are creating a shared library, we must presume that the + only references to the symbol are via the global offset table. + For such cases we need not do anything here; the relocations will + be handled correctly by relocate_section. */ + if (info->shared) + return TRUE; + + /* If there are no references to this symbol that do not use the + GOT, we don't need to generate a copy reloc. */ + if ((h->elf_link_hash_flags & ELF_LINK_NON_GOT_REF) == 0) + return TRUE; + + /* If -z nocopyreloc was given, we won't generate them either. */ + if (info->nocopyreloc) + { + h->elf_link_hash_flags &= ~ELF_LINK_NON_GOT_REF; + return TRUE; + } + + eh = (struct elf_m32r_link_hash_entry *) h; + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + s = p->sec->output_section; + if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0) + break; + } + + /* If we didn't find any dynamic relocs in sections which needs the + copy reloc, then we'll be keeping the dynamic relocs and avoiding + the copy reloc. */ + if (p == NULL) + { + h->elf_link_hash_flags &= ~ELF_LINK_NON_GOT_REF; + return TRUE; + } + + /* We must allocate the symbol in our .dynbss section, which will + become part of the .bss section of the executable. There will be + an entry for this symbol in the .dynsym section. The dynamic + object will contain position independent code, so all references + from the dynamic object to this symbol will go through the global + offset table. The dynamic linker will use the .dynsym entry to + determine the address it must put in the global offset table, so + both the dynamic object and the regular object will refer to the + same memory location for the variable. */ + + htab = m32r_elf_hash_table (info); + s = htab->sdynbss; + BFD_ASSERT (s != NULL); + + /* We must generate a R_M32R_COPY reloc to tell the dynamic linker + to copy the initial value out of the dynamic object and into the + runtime process image. We need to remember the offset into the + .rela.bss section we are going to use. */ + if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) + { + asection *srel; + + srel = htab->srelbss; + BFD_ASSERT (srel != NULL); + srel->_raw_size += sizeof (Elf32_External_Rela); + h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_COPY; + } + + /* We need to figure out the alignment required for this symbol. I + have no idea how ELF linkers handle this. */ + power_of_two = bfd_log2 (h->size); + if (power_of_two > 3) + power_of_two = 3; + + /* Apply the required alignment. */ + s->_raw_size = BFD_ALIGN (s->_raw_size, + (bfd_size_type) (1 << power_of_two)); + if (power_of_two > bfd_get_section_alignment (dynobj, s)) + { + if (! bfd_set_section_alignment (dynobj, s, power_of_two)) + return FALSE; + } + + /* Define the symbol as being at this point in the section. */ + h->root.u.def.section = s; + h->root.u.def.value = s->_raw_size; + + /* Increment the section size to make room for the symbol. */ + s->_raw_size += h->size; + + return TRUE; +} + +/* This is the condition under which finish_dynamic_symbol will be called + from elflink.h. If elflink.h doesn't call our finish_dynamic_symbol + routine, we'll need to do something about initializing any .plt and .got + entries in relocate_section. */ +#define WILL_CALL_FINISH_DYNAMIC_SYMBOL(DYN, INFO, H) \ + ((DYN) \ + && ((INFO)->shared \ + || ((H)->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) == 0) \ + && ((H)->dynindx != -1 \ + || ((H)->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) != 0)) + +/* Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + +static bfd_boolean +allocate_dynrelocs (h, inf) + struct elf_link_hash_entry *h; + PTR inf; +{ + struct bfd_link_info *info; + struct elf_m32r_link_hash_table *htab; + struct elf_m32r_link_hash_entry *eh; + struct elf_m32r_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) + return TRUE; + + if (h->root.type == bfd_link_hash_warning) + /* When warning symbols are created, they **replace** the "real" + entry in the hash table, thus we never get to see the real + symbol in a hash traversal. So look at it now. */ + h = (struct elf_link_hash_entry *) h->root.u.i.link; + + info = (struct bfd_link_info *) inf; + htab = m32r_elf_hash_table (info); + + eh = (struct elf_m32r_link_hash_entry *) h; +// if ((h->got.refcount > 0 +// || (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL)) +// && eh->gotplt_refcount > 0) +// { +// /* The symbol has been forced local, or we have some direct got refs, +// so treat all the gotplt refs as got refs. */ +// h->got.refcount += eh->gotplt_refcount; +// if (h->plt.refcount >= eh->gotplt_refcount) +// h->plt.refcount -= eh->gotplt_refcount; +// } + + if (htab->root.dynamic_sections_created + && h->plt.refcount > 0) + { + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) == 0) + { + if (! bfd_elf32_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info, h)) + { + asection *s = htab->splt; + + /* If this is the first .plt entry, make room for the special + first entry. */ + if (s->_raw_size == 0) + s->_raw_size += PLT_ENTRY_SIZE; + + h->plt.offset = s->_raw_size; + + /* If this symbol is not defined in a regular file, and we are + not generating a shared library, then set the symbol to this + location in the .plt. This is required to make function + pointers compare as equal between the normal executable and + the shared library. */ + if (! info->shared + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0) + { + h->root.u.def.section = s; + h->root.u.def.value = h->plt.offset; + } + + /* Make room for this entry. */ + s->_raw_size += PLT_ENTRY_SIZE; + + /* We also need to make an entry in the .got.plt section, which + will be placed in the .got section by the linker script. */ + htab->sgotplt->_raw_size += 4; + + /* We also need to make an entry in the .rel.plt section. */ + htab->srelplt->_raw_size += sizeof (Elf32_External_Rela); + } + else + { + h->plt.offset = (bfd_vma) -1; + h->elf_link_hash_flags &= ~ELF_LINK_HASH_NEEDS_PLT; + } + } + else + { + h->plt.offset = (bfd_vma) -1; + h->elf_link_hash_flags &= ~ELF_LINK_HASH_NEEDS_PLT; + } + + if (h->got.refcount > 0) + { + asection *s; + bfd_boolean dyn; + + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) == 0) + { + if (! bfd_elf32_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + s = htab->sgot; + + h->got.offset = s->_raw_size; + s->_raw_size += 4; + dyn = htab->root.dynamic_sections_created; + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info, h)) + htab->srelgot->_raw_size += sizeof (Elf32_External_Rela); + } + else + h->got.offset = (bfd_vma) -1; + + if (eh->dyn_relocs == NULL) + return TRUE; + + /* In the shared -Bsymbolic case, discard space allocated for + dynamic pc-relative relocs against symbols which turn out to be + defined in regular objects. For the normal shared case, discard + space for pc-relative relocs that have become local due to symbol + visibility changes. */ + + if (info->shared) + { + if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) != 0 + && ((h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) != 0 + || info->symbolic)) + { + struct elf_m32r_dyn_relocs **pp; + for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) + { + p->count -= p->pc_count; + p->pc_count = 0; + if (p->count == 0) + *pp = p->next; + else + pp = &p->next; + } + } + } + else + { + /* For the non-shared case, discard space for relocs against + symbols which turn out to need copy relocs or are not + dynamic. */ + + if ((h->elf_link_hash_flags & ELF_LINK_NON_GOT_REF) == 0 + && (((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_DYNAMIC) != 0 + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0) + || (htab->root.dynamic_sections_created + && (h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined)))) + { + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 + && (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) == 0) + { + if (! bfd_elf32_link_record_dynamic_symbol (info, h)) + return FALSE; + } + + /* If that succeeded, we know we'll be keeping all the + relocs. */ + if (h->dynindx != -1) + goto keep; + } + + eh->dyn_relocs = NULL; + + keep: ; + } + + /* Finally, allocate space. */ + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + asection *sreloc = elf_section_data (p->sec)->sreloc; + sreloc->_raw_size += p->count * sizeof (Elf32_External_Rela); + } + + return TRUE; +} +/* Find any dynamic relocs that apply to read-only sections. */ + +static bfd_boolean +readonly_dynrelocs (h, inf) + struct elf_link_hash_entry *h; + PTR inf; +{ + struct elf_m32r_link_hash_entry *eh; + struct elf_m32r_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; - if (s == NULL) - { - flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS - | SEC_IN_MEMORY | SEC_LINKER_CREATED); + eh = (struct elf_m32r_link_hash_entry *) h; + for (p = eh->dyn_relocs; p != NULL; p = p->next) + { + asection *s = p->sec->output_section; - s = bfd_make_section_anyway (abfd, ".sdata"); - if (s == NULL) - return FALSE; - bfd_set_section_flags (abfd, s, flags); - bfd_set_section_alignment (abfd, s, 2); - } + if (s != NULL && (s->flags & SEC_READONLY) != 0) + { + struct bfd_link_info *info = (struct bfd_link_info *) inf; - bh = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", - FALSE, FALSE, FALSE); + info->flags |= DF_TEXTREL; - if ((bh == NULL || bh->type == bfd_link_hash_undefined) - && !(_bfd_generic_link_add_one_symbol (info, - abfd, - "_SDA_BASE_", - BSF_GLOBAL, - s, - (bfd_vma) 32768, - (const char *) NULL, - FALSE, - get_elf_backend_data (abfd)->collect, - &bh))) - return FALSE; - h = (struct elf_link_hash_entry *) bh; - h->type = STT_OBJECT; + /* Not an error, just cut short the traversal. */ + return FALSE; + } } + return TRUE; +} - switch (sym->st_shndx) +/* Set the sizes of the dynamic sections. */ + +static bfd_boolean +m32r_elf_size_dynamic_sections (output_bfd, info) + bfd *output_bfd ATTRIBUTE_UNUSED; + struct bfd_link_info *info; +{ + struct elf_m32r_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd_boolean relocs; + bfd *ibfd; + +#ifdef DEBUG_PIC +printf("m32r_elf_size_dynamic_sections()\n"); +#endif + + htab = m32r_elf_hash_table (info); + dynobj = htab->root.dynobj; + BFD_ASSERT (dynobj != NULL); + + if (htab->root.dynamic_sections_created) { - case SHN_M32R_SCOMMON: - *secp = bfd_make_section_old_way (abfd, ".scommon"); - (*secp)->flags |= SEC_IS_COMMON; - *valp = sym->st_size; - break; + /* Set the contents of the .interp section to the interpreter. */ + if (! info->shared) + { + s = bfd_get_section_by_name (dynobj, ".interp"); + BFD_ASSERT (s != NULL); + s->_raw_size = sizeof ELF_DYNAMIC_INTERPRETER; + s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; + } } - return TRUE; -} + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ + for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) + { + bfd_signed_vma *local_got; + bfd_signed_vma *end_local_got; + bfd_size_type locsymcount; + Elf_Internal_Shdr *symtab_hdr; + asection *srel; -/* We have to figure out the SDA_BASE value, so that we can adjust the - symbol value correctly. We look up the symbol _SDA_BASE_ in the output - BFD. If we can't find it, we're stuck. We cache it in the ELF - target data. We don't need to adjust the symbol value for an - external symbol if we are producing relocatable output. */ + if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour) + continue; -static bfd_reloc_status_type -m32r_elf_final_sda_base (output_bfd, info, error_message, psb) - bfd *output_bfd; - struct bfd_link_info *info; - const char **error_message; - bfd_vma *psb; -{ - if (elf_gp (output_bfd) == 0) + for (s = ibfd->sections; s != NULL; s = s->next) + { + struct elf_m32r_dyn_relocs *p; + + for (p = ((struct elf_m32r_dyn_relocs *) + elf_section_data (s)->local_dynrel); + p != NULL; + p = p->next) + { + if (! bfd_is_abs_section (p->sec) + && bfd_is_abs_section (p->sec->output_section)) + { + /* Input section has been discarded, either because + it is a copy of a linkonce section or due to + linker script /DISCARD/, so we'll be discarding + the relocs too. */ + } + else if (p->count != 0) + { + srel = elf_section_data (p->sec)->sreloc; + srel->_raw_size += p->count * sizeof (Elf32_External_Rela); + if ((p->sec->output_section->flags & SEC_READONLY) != 0) + info->flags |= DF_TEXTREL; + } + } + } + + local_got = elf_local_got_refcounts (ibfd); + if (!local_got) + continue; + + symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; + s = htab->sgot; + srel = htab->srelgot; + for (; local_got < end_local_got; ++local_got) + { + if (*local_got > 0) + { + *local_got = s->_raw_size; + s->_raw_size += 4; + if (info->shared) + srel->_raw_size += sizeof (Elf32_External_Rela); + } + else + *local_got = (bfd_vma) -1; + } + } + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ + elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (PTR) info); + + /* We now have determined the sizes of the various dynamic sections. + Allocate memory for them. */ + relocs = FALSE; + for (s = dynobj->sections; s != NULL; s = s->next) { - struct bfd_link_hash_entry *h; + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; - h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE); - if (h != (struct bfd_link_hash_entry *) NULL - && h->type == bfd_link_hash_defined) - elf_gp (output_bfd) = (h->u.def.value - + h->u.def.section->output_section->vma - + h->u.def.section->output_offset); + if (s == htab->splt + || s == htab->sgot + || s == htab->sgotplt) + { + /* Strip this section if we don't need it; see the + comment below. */ + } + else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0) + { + if (s->_raw_size != 0 && s != htab->srelplt) + relocs = TRUE; + + /* We use the reloc_count field as a counter if we need + to copy relocs into the output file. */ + s->reloc_count = 0; + } else + { + /* It's not one of our sections, so don't allocate space. */ + continue; + } + + if (s->_raw_size == 0) + { + /* If we don't need this section, strip it from the + output file. This is mostly to handle .rela.bss and + .rela.plt. We must create both sections in + create_dynamic_sections, because they must be created + before the linker maps input sections to output + sections. The linker does that before + adjust_dynamic_symbol is called, and it is that + function which decides whether anything needs to go + into these sections. */ + _bfd_strip_section_from_output (info, s); + continue; + } + + /* Allocate memory for the section contents. We use bfd_zalloc + here in case unused entries are not reclaimed before the + section's contents are written out. This should not happen, + but this way if it does, we get a R_M32R_NONE reloc instead + of garbage. */ + s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->_raw_size); + if (s->contents == NULL) + return FALSE; + } + + if (htab->root.dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in m32r_elf_finish_dynamic_sections, but we + must add the entries now so that we get the correct size for + the .dynamic section. The DT_DEBUG entry is filled in by the + dynamic linker and used by the debugger. */ +#define add_dynamic_entry(TAG, VAL) \ + bfd_elf32_add_dynamic_entry (info, (bfd_vma) (TAG), (bfd_vma) (VAL)) + + if (! info->shared) { - /* Only get the error once. */ - *psb = elf_gp (output_bfd) = 4; - *error_message = - (const char *) _("SDA relocation when _SDA_BASE_ not defined"); - return bfd_reloc_dangerous; + if (! add_dynamic_entry (DT_DEBUG, 0)) + return FALSE; } + + if (htab->splt->_raw_size != 0) + { + if (! add_dynamic_entry (DT_PLTGOT, 0) + || ! add_dynamic_entry (DT_PLTRELSZ, 0) + || ! add_dynamic_entry (DT_PLTREL, DT_RELA) + || ! add_dynamic_entry (DT_JMPREL, 0)) + return FALSE; + } + + if (relocs) + { + if (! add_dynamic_entry (DT_RELA, 0) + || ! add_dynamic_entry (DT_RELASZ, 0) + || ! add_dynamic_entry (DT_RELAENT, + sizeof (Elf32_External_Rela))) + return FALSE; + + /* If any dynamic relocs apply to a read-only section, + then we need a DT_TEXTREL entry. */ + if ((info->flags & DF_TEXTREL) == 0) + elf_link_hash_traverse (&htab->root, readonly_dynrelocs, + (PTR) info); + + if ((info->flags & DF_TEXTREL) != 0) + { + if (! add_dynamic_entry (DT_TEXTREL, 0)) + return FALSE; + } + } } - *psb = elf_gp (output_bfd); - return bfd_reloc_ok; +#undef add_dynamic_entry + + return TRUE; } - /* Relocate an M32R/D ELF section. There is some attempt to make this function usable for many architectures, both for RELA and REL type relocs, if only to serve as a learning tool. @@ -986,10 +2534,17 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, /* Assume success. */ bfd_boolean ret = TRUE; -#if !USE_REL - if (info->relocatable) - return TRUE; -#endif + struct elf_m32r_link_hash_table *htab = m32r_elf_hash_table (info); + bfd *dynobj; + bfd_vma *local_got_offsets; + asection *sgot, *splt, *sreloc; + + dynobj = htab->root.dynobj; + local_got_offsets = elf_local_got_offsets (input_bfd); + + sgot = htab->sgot; + splt = htab->splt; + sreloc = NULL; rel = relocs; relend = relocs + input_section->reloc_count; @@ -998,18 +2553,19 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, int r_type; reloc_howto_type *howto; unsigned long r_symndx; + struct elf_link_hash_entry *h; /* We can't modify r_addend here as elf_link_input_bfd has an assert to - ensure it's zero (we use REL relocs, not RELA). Therefore this - should be assigning zero to `addend', but for clarity we use - `r_addend'. */ + ensure it's zero (we use REL relocs, not RELA). Therefore this + should be assigning zero to `addend', but for clarity we use + `r_addend'. */ bfd_vma addend = rel->r_addend; bfd_vma offset = rel->r_offset; - struct elf_link_hash_entry *h; Elf_Internal_Sym *sym; asection *sec; const char *sym_name; bfd_reloc_status_type r; const char *errmsg = NULL; + bfd_boolean use_rel = FALSE; h = NULL; r_type = ELF32_R_TYPE (rel->r_info); @@ -1024,14 +2580,19 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, } if (r_type == R_M32R_GNU_VTENTRY - || r_type == R_M32R_GNU_VTINHERIT) + || r_type == R_M32R_GNU_VTINHERIT + || r_type == R_M32R_NONE + || r_type == R_M32R_RELA_GNU_VTENTRY + || r_type == R_M32R_RELA_GNU_VTINHERIT) continue; + if (r_type <= R_M32R_GNU_VTENTRY) + use_rel = TRUE; + howto = m32r_elf_howto_table + r_type; r_symndx = ELF32_R_SYM (rel->r_info); -#if USE_REL - if (info->relocatable) + if (info->relocatable && (use_rel == TRUE)) { /* This is a relocatable link. We don't have to change anything, unless the reloc is against a section symbol, @@ -1092,13 +2653,13 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, } } else -#endif /* USE_REL */ { bfd_vma relocation; /* This is a final link. */ sym = NULL; sec = NULL; + h = NULL; if (r_symndx < symtab_hdr->sh_info) { @@ -1106,20 +2667,37 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, sym = local_syms + r_symndx; sec = local_sections[r_symndx]; sym_name = ""; -#if !USE_REL - relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); - addend = rel->r_addend; -#else - /* FIXME: This won't handle local relocations against SEC_MERGE - symbols. See elf32-i386.c for how to do this. */ - relocation = (sec->output_section->vma - + sec->output_offset - + sym->st_value); -#endif + + if (use_rel == FALSE) + { + relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); + addend = rel->r_addend; + + if (info->relocatable) + { + /* This is a relocatable link. We don't have to change + anything, unless the reloc is against a section symbol, + in which case we have to adjust according to where the + section symbol winds up in the output section. */ + if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) + rel->r_addend += sec->output_offset + sym->st_value; + + continue; + } + } + else + { + relocation = (sec->output_section->vma + + sec->output_offset + + sym->st_value); + } } else { /* External symbol. */ + if (info->relocatable && (use_rel == FALSE)) + continue; + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; while (h->root.type == bfd_link_hash_indirect || h->root.type == bfd_link_hash_warning) @@ -1129,9 +2707,64 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, if (h->root.type == bfd_link_hash_defined || h->root.type == bfd_link_hash_defweak) { + bfd_boolean dyn; sec = h->root.u.def.section; - if (sec->output_section == NULL) - relocation = 0; + + dyn = htab->root.dynamic_sections_created; + sec = h->root.u.def.section; + if (r_type == R_M32R_GOTPC24 + || (r_type == R_M32R_GOTPC_HI_ULO + || r_type == R_M32R_GOTPC_HI_SLO + || r_type == R_M32R_GOTPC_LO) + || (r_type == R_M32R_26_PLTREL + && h->plt.offset != (bfd_vma) -1) + || ((r_type == R_M32R_GOT24 + || r_type == R_M32R_GOT16_HI_ULO + || r_type == R_M32R_GOT16_HI_SLO + || r_type == R_M32R_GOT16_LO) + && WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info, h) + && (! info->shared + || (! info->symbolic && h->dynindx != -1) + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0)) + || (info->shared + && ((! info->symbolic && h->dynindx != -1) + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0) + && (((r_type == R_M32R_16_RELA + || r_type == R_M32R_32_RELA + || r_type == R_M32R_24_RELA + || r_type == R_M32R_HI16_ULO_RELA + || r_type == R_M32R_HI16_SLO_RELA + || r_type == R_M32R_LO16_RELA) + && (h->elf_link_hash_flags + & ELF_LINK_FORCED_LOCAL) == 0) + || r_type == R_M32R_10_PCREL_RELA + || r_type == R_M32R_18_PCREL_RELA + || r_type == R_M32R_26_PCREL_RELA) + && ((input_section->flags & SEC_ALLOC) != 0 + /* DWARF will emit R_M32R_16(24,32) relocations + in its sections against symbols defined + externally in shared libraries. We can't do + anything with them here. */ + || ((input_section->flags & SEC_DEBUGGING) != 0 + && (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_DYNAMIC) != 0)))) + { + /* In these cases, we don't need the relocation + value. We check specially because in some + obscure cases sec->output_section will be NULL. */ + relocation = 0; + } + else if (sec->output_section == NULL) + { + (*_bfd_error_handler) + (_("%s: warning: unresolvable relocation against symbol `%s' from %s section"), + bfd_get_filename (input_bfd), h->root.root.string, + bfd_get_section_name (input_bfd, input_section)); + + relocation = 0; + } else relocation = (h->root.u.def.value + sec->output_section->vma @@ -1139,11 +2772,17 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, } else if (h->root.type == bfd_link_hash_undefweak) relocation = 0; + else if (info->shared + && (!info->symbolic) + && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) + relocation = 0; else { if (! ((*info->callbacks->undefined_symbol) (info, h->root.root.string, input_bfd, - input_section, offset, TRUE))) + input_section, offset, + (!info->shared + || ELF_ST_VISIBILITY (h->other))))) return FALSE; relocation = 0; } @@ -1158,11 +2797,283 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, switch ((int) r_type) { + case R_M32R_GOTPC24: + /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation + ld24 rx,#_GLOBAL_OFFSET_TABLE_ + */ + relocation = sgot->output_section->vma; + break; + + case R_M32R_GOTPC_HI_ULO: + case R_M32R_GOTPC_HI_SLO: + case R_M32R_GOTPC_LO: + { + /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation + bl .+4 + seth rx,#high(_GLOBAL_OFFSET_TABLE_) + or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) + or + bl .+4 + seth rx,#shigh(_GLOBAL_OFFSET_TABLE_) + add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) + */ + relocation = sgot->output_section->vma; + relocation -= (input_section->output_section->vma + + input_section->output_offset + + rel->r_offset); + if ((r_type == R_M32R_GOTPC_HI_SLO) + && ((relocation + rel->r_addend) & 0x8000)) + rel->r_addend += 0x10000; + + break; + } + case R_M32R_GOT16_HI_ULO: + case R_M32R_GOT16_HI_SLO: + case R_M32R_GOT16_LO: + /* Fall through. */ + case R_M32R_GOT24: + /* Relocation is to the entry for this symbol in the global + offset table. */ + BFD_ASSERT (sgot != NULL); + + if (h != NULL) + { + bfd_boolean dyn; + bfd_vma off; + + off = h->got.offset; + BFD_ASSERT (off != (bfd_vma) -1); + + dyn = htab->root.dynamic_sections_created; + if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info, h) + || (info->shared + && (info->symbolic + || h->dynindx == -1 + || (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL)) + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR))) + { + /* This is actually a static link, or it is a + -Bsymbolic link and the symbol is defined + locally, or the symbol was forced to be local + because of a version file. We must initialize + this entry in the global offset table. Since the + offset must always be a multiple of 4, we use the + least significant bit to record whether we have + initialized it already. + + When doing a dynamic link, we create a .rela.got + relocation entry to initialize the value. This + is done in the finish_dynamic_symbol routine. */ + if ((off & 1) != 0) + off &= ~1; + else + { + bfd_put_32 (output_bfd, relocation, + sgot->contents + off); + h->got.offset |= 1; + } + } + + relocation = sgot->output_offset + off; + } + else + { + bfd_vma off; + bfd_byte *loc; + + BFD_ASSERT (local_got_offsets != NULL + && local_got_offsets[r_symndx] != (bfd_vma) -1); + + off = local_got_offsets[r_symndx]; + + /* The offset must always be a multiple of 4. We use + the least significant bit to record whether we have + already processed this entry. */ + if ((off & 1) != 0) + off &= ~1; + else + { + bfd_put_32 (output_bfd, relocation, sgot->contents + off); + + if (info->shared) + { + asection *srelgot; + Elf_Internal_Rela outrel; + + /* We need to generate a R_M32R_RELATIVE reloc + for the dynamic linker. */ + srelgot = bfd_get_section_by_name (dynobj, ".rela.got"); + BFD_ASSERT (srelgot != NULL); + + outrel.r_offset = (sgot->output_section->vma + + sgot->output_offset + + off); + outrel.r_info = ELF32_R_INFO (0, R_M32R_RELATIVE); + outrel.r_addend = relocation; + loc = srelgot->contents; + loc += srelgot->reloc_count * sizeof(Elf32_External_Rela); + bfd_elf32_swap_reloca_out (output_bfd, &outrel,loc); + ++srelgot->reloc_count; + } + + local_got_offsets[r_symndx] |= 1; + } + + relocation = sgot->output_offset + off; + } + if ((r_type == R_M32R_GOT16_HI_SLO) + && ((relocation + rel->r_addend) & 0x8000)) + rel->r_addend += 0x10000; + + break; + + case R_M32R_26_PLTREL: + /* Relocation is to the entry for this symbol in the + procedure linkage table. */ + + /* The native assembler will generate a 26_PLTREL reloc + for a local symbol if you assemble a call from one + section to another when using -K pic. */ + if (h == NULL) + break; + + //if (ELF_ST_VISIBILITY (h->other) == STV_INTERNAL + // || ELF_ST_VISIBILITY (h->other) == STV_HIDDEN) + // break; + if (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) + break; + + if (h->plt.offset == (bfd_vma) -1) + { + /* We didn't make a PLT entry for this symbol. This + happens when statically linking PIC code, or when + using -Bsymbolic. */ + break; + } + + relocation = (splt->output_section->vma + + splt->output_offset + + h->plt.offset); + break; + + case R_M32R_HI16_SLO_RELA: + { + if ((relocation + rel->r_addend) & 0x8000) + { + rel->r_addend += 0x10000; + } + } + /* Fall through. */ + case R_M32R_16_RELA: + case R_M32R_24_RELA: + case R_M32R_32_RELA: + case R_M32R_18_PCREL_RELA: + case R_M32R_26_PCREL_RELA: + case R_M32R_HI16_ULO_RELA: + case R_M32R_LO16_RELA: + case R_M32R_SDA16_RELA: + if (info->shared + && r_symndx != 0 + && (input_section->flags & SEC_ALLOC) != 0 + && ((r_type != R_M32R_18_PCREL_RELA + && r_type != R_M32R_26_PCREL_RELA) + || (h != NULL + && h->dynindx != -1 + && (! info->symbolic + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0)))) + { + Elf_Internal_Rela outrel; + bfd_boolean skip, relocate; + bfd_byte *loc; + + /* When generating a shared object, these relocations + are copied into the output file to be resolved at run + time. */ + + if (sreloc == NULL) + { + const char *name; + + name = (bfd_elf_string_from_elf_section + (input_bfd, + elf_elfheader (input_bfd)->e_shstrndx, + elf_section_data (input_section)->rel_hdr.sh_name)); + if (name == NULL) + return FALSE; + + BFD_ASSERT (strncmp (name, ".rela", 5) == 0 + && strcmp (bfd_get_section_name (input_bfd, + input_section), + name + 5) == 0); + + sreloc = bfd_get_section_by_name (dynobj, name); + BFD_ASSERT (sreloc != NULL); + } + + skip = FALSE; + relocate = FALSE; + + outrel.r_offset = _bfd_elf_section_offset (output_bfd, + info, + input_section, + rel->r_offset); + if (outrel.r_offset == (bfd_vma) -1) + skip = TRUE; + else if (outrel.r_offset == (bfd_vma) -2) + skip = TRUE, relocate = TRUE; + outrel.r_offset += (input_section->output_section->vma + + input_section->output_offset); + + if (skip) + memset (&outrel, 0, sizeof outrel); + else if (r_type == R_M32R_18_PCREL_RELA + || r_type == R_M32R_26_PCREL_RELA) + { + BFD_ASSERT (h != NULL && h->dynindx != -1); + outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); + outrel.r_addend = rel->r_addend; + } + else + { + /* h->dynindx may be -1 if this symbol was marked to + become local. */ + if (h == NULL + || ((info->symbolic || h->dynindx == -1) + && (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) != 0)) + { + relocate = TRUE; + outrel.r_info = ELF32_R_INFO (0, R_M32R_RELATIVE); + outrel.r_addend = relocation + rel->r_addend; + } + else + { + BFD_ASSERT (h->dynindx != -1); + outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); + outrel.r_addend = relocation + rel->r_addend; + } + } + + loc = sreloc->contents; + loc += sreloc->reloc_count * sizeof(Elf32_External_Rela); + bfd_elf32_swap_reloca_out (output_bfd, &outrel,loc); + ++sreloc->reloc_count; + + /* If this reloc is against an external symbol, we do + not want to fiddle with the addend. Otherwise, we + need to include the symbol value so that it becomes + an addend for the dynamic reloc. */ + if (! relocate) + continue; + } + break; + case (int) R_M32R_10_PCREL : r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section, contents, offset, sec, relocation, addend); - break; + goto check_reloc; case (int) R_M32R_HI16_SLO : case (int) R_M32R_HI16_ULO : @@ -1190,7 +3101,8 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, contents, offset, relocation, addend); } - break; + + goto check_reloc; case (int) R_M32R_SDA16 : { @@ -1233,14 +3145,20 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, continue; } } - /* fall through */ + /* fall through */ + + default : /* OLD_M32R_RELOC */ - default : r = _bfd_final_link_relocate (howto, input_bfd, input_section, contents, offset, relocation, addend); - break; + goto check_reloc; } + + r = _bfd_final_link_relocate (howto, input_bfd, input_section, + contents, rel->r_offset, + relocation, rel->r_addend); + } check_reloc: @@ -1307,6 +3225,353 @@ m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, return ret; } + +/* Finish up dynamic symbol handling. We set the contents of various + dynamic sections here. */ +static bfd_boolean +m32r_elf_finish_dynamic_symbol (output_bfd, info, h, sym) + bfd *output_bfd; + struct bfd_link_info *info; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *sym; +{ + struct elf_m32r_link_hash_table *htab; + bfd *dynobj; + bfd_byte *loc; + +#ifdef DEBUG_PIC +printf("m32r_elf_finish_dynamic_symbol()\n"); +#endif + + htab = m32r_elf_hash_table (info); + dynobj = htab->root.dynobj; + + if (h->plt.offset != (bfd_vma) -1) + { + asection *splt; + asection *sgot; + asection *srela; + + bfd_vma plt_index; + bfd_vma got_offset; + Elf_Internal_Rela rela; + + /* This symbol has an entry in the procedure linkage table. Set + it up. */ + + BFD_ASSERT (h->dynindx != -1); + + splt = htab->splt; + sgot = htab->sgotplt; + srela = htab->srelplt; + BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL); + + /* Get the index in the procedure linkage table which + corresponds to this symbol. This is the index of this symbol + in all the symbols for which we are making plt entries. The + first entry in the procedure linkage table is reserved. */ + plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; + + /* Get the offset into the .got table of the entry that + corresponds to this function. Each .got entry is 4 bytes. + The first three are reserved. */ + got_offset = (plt_index + 3) * 4; + + /* Fill in the entry in the procedure linkage table. */ + if (! info->shared) + { + bfd_put_32 (output_bfd, + (PLT_ENTRY_WORD0b + + (((sgot->output_section->vma + + sgot->output_offset + + got_offset) >> 16) & 0xffff)), + splt->contents + h->plt.offset); + bfd_put_32 (output_bfd, + (PLT_ENTRY_WORD1b + + ((sgot->output_section->vma + + sgot->output_offset + + got_offset) & 0xffff)), + splt->contents + h->plt.offset + 4); + bfd_put_32 (output_bfd, PLT_ENTRY_WORD2, + splt->contents + h->plt.offset + 8); + bfd_put_32 (output_bfd, + (PLT_ENTRY_WORD3 + + plt_index * sizeof (Elf32_External_Rela)), + splt->contents + h->plt.offset + 12); + bfd_put_32 (output_bfd, + (PLT_ENTRY_WORD4 + + (((unsigned int) ((- (h->plt.offset + 16)) >> 2)) & 0xffffff)), + splt->contents + h->plt.offset + 16); + } + else + { + bfd_put_32 (output_bfd, + PLT_ENTRY_WORD0 + got_offset, + splt->contents + h->plt.offset); + bfd_put_32 (output_bfd, PLT_ENTRY_WORD1, + splt->contents + h->plt.offset + 4); + bfd_put_32 (output_bfd, PLT_ENTRY_WORD2, + splt->contents + h->plt.offset + 8); + bfd_put_32 (output_bfd, + (PLT_ENTRY_WORD3 + + plt_index * sizeof (Elf32_External_Rela)), + splt->contents + h->plt.offset + 12); + bfd_put_32 (output_bfd, + (PLT_ENTRY_WORD4 + + (((unsigned int) ((- (h->plt.offset + 16)) >> 2)) & 0xffffff)), + splt->contents + h->plt.offset + 16); + } + + /* Fill in the entry in the global offset table. */ + bfd_put_32 (output_bfd, + (splt->output_section->vma + + splt->output_offset + + h->plt.offset + + 12), /* same offset */ + sgot->contents + got_offset); + + /* Fill in the entry in the .rela.plt section. */ + rela.r_offset = (sgot->output_section->vma + + sgot->output_offset + + got_offset); + rela.r_info = ELF32_R_INFO (h->dynindx, R_M32R_JMP_SLOT); + rela.r_addend = 0; + loc = srela->contents; + loc += plt_index * sizeof(Elf32_External_Rela); + bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); + + if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0) + { + /* Mark the symbol as undefined, rather than as defined in + the .plt section. Leave the value alone. */ + sym->st_shndx = SHN_UNDEF; + } + } + + if (h->got.offset != (bfd_vma) -1) + { + asection *sgot; + asection *srela; + Elf_Internal_Rela rela; + + /* This symbol has an entry in the global offset table. Set it + up. */ + + sgot = htab->sgot; + srela = htab->srelgot; + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma + + sgot->output_offset + + (h->got.offset &~ 1)); + + /* If this is a -Bsymbolic link, and the symbol is defined + locally, we just want to emit a RELATIVE reloc. Likewise if + the symbol was forced to be local because of a version file. + The entry in the global offset table will already have been + initialized in the relocate_section function. */ + if (info->shared + && (info->symbolic + || h->dynindx == -1 + || (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL)) + && (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)) + { + rela.r_info = ELF32_R_INFO (0, R_M32R_RELATIVE); + rela.r_addend = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + } + else + { + BFD_ASSERT((h->got.offset & 1) == 0); + bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset); + rela.r_info = ELF32_R_INFO (h->dynindx, R_M32R_GLOB_DAT); + rela.r_addend = 0; + } + + loc = srela->contents; + loc += srela->reloc_count * sizeof(Elf32_External_Rela); + bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); + ++srela->reloc_count; + } + + if ((h->elf_link_hash_flags & ELF_LINK_HASH_NEEDS_COPY) != 0) + { + asection *s; + Elf_Internal_Rela rela; + + /* This symbols needs a copy reloc. Set it up. */ + + BFD_ASSERT (h->dynindx != -1 + && (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak)); + + s = bfd_get_section_by_name (h->root.u.def.section->owner, + ".rela.bss"); + BFD_ASSERT (s != NULL); + + rela.r_offset = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + rela.r_info = ELF32_R_INFO (h->dynindx, R_M32R_COPY); + rela.r_addend = 0; + loc = s->contents; + loc += s->reloc_count * sizeof(Elf32_External_Rela); + bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); + ++s->reloc_count; + } + + /* Mark some specially defined symbols as absolute. */ + if (strcmp (h->root.root.string, "_DYNAMIC") == 0 + || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + sym->st_shndx = SHN_ABS; + + return TRUE; +} + + +/* Finish up the dynamic sections. */ + +static bfd_boolean +m32r_elf_finish_dynamic_sections (output_bfd, info) + bfd *output_bfd; + struct bfd_link_info *info; +{ + struct elf_m32r_link_hash_table *htab; + bfd *dynobj; + asection *sdyn; + asection *sgot; + +#ifdef DEBUG_PIC +printf("m32r_elf_finish_dynamic_sections()\n"); +#endif + + htab = m32r_elf_hash_table (info); + dynobj = htab->root.dynobj; + + sgot = htab->sgotplt; + sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); + + if (htab->root.dynamic_sections_created) + { + asection *splt; + Elf32_External_Dyn *dyncon, *dynconend; + + BFD_ASSERT (sgot != NULL && sdyn != NULL); + + dyncon = (Elf32_External_Dyn *) sdyn->contents; + dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->_raw_size); + + for (; dyncon < dynconend; dyncon++) + { + Elf_Internal_Dyn dyn; + const char *name; + asection *s; + + bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); + + switch (dyn.d_tag) + { + default: + break; + + case DT_PLTGOT: + name = ".got"; + s = htab->sgot->output_section; + goto get_vma; + case DT_JMPREL: + name = ".rela.plt"; + s = htab->srelplt->output_section; + get_vma: + BFD_ASSERT (s != NULL); + dyn.d_un.d_ptr = s->vma; + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + break; + + case DT_PLTRELSZ: + s = htab->srelplt->output_section; + BFD_ASSERT (s != NULL); + if (s->_cooked_size != 0) + dyn.d_un.d_val = s->_cooked_size; + else + dyn.d_un.d_val = s->_raw_size; + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + break; + + case DT_RELASZ: + /* My reading of the SVR4 ABI indicates that the + procedure linkage table relocs (DT_JMPREL) should be + included in the overall relocs (DT_RELA). This is + what Solaris does. However, UnixWare can not handle + that case. Therefore, we override the DT_RELASZ entry + here to make it not include the JMPREL relocs. Since + the linker script arranges for .rela.plt to follow all + other relocation sections, we don't have to worry + about changing the DT_RELA entry. */ + if (htab->srelplt != NULL) + { + s = htab->srelplt->output_section; + if (s->_cooked_size != 0) + dyn.d_un.d_val -= s->_cooked_size; + else + dyn.d_un.d_val -= s->_raw_size; + } + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + break; + } + } + + /* Fill in the first entry in the procedure linkage table. */ + splt = htab->splt; + if (splt && splt->_raw_size > 0) + { + if (info->shared) + { + bfd_put_32 (output_bfd, PLT0_PIC_ENTRY_WORD0, splt->contents); + bfd_put_32 (output_bfd, PLT0_PIC_ENTRY_WORD1, splt->contents + 4); + bfd_put_32 (output_bfd, PLT0_PIC_ENTRY_WORD2, splt->contents + 8); + bfd_put_32 (output_bfd, PLT0_PIC_ENTRY_WORD3, splt->contents + 12); + bfd_put_32 (output_bfd, PLT0_PIC_ENTRY_WORD4, splt->contents + 16); + } + else + { + unsigned long addr; + /* addr = .got + 4 */ + addr = sgot->output_section->vma + sgot->output_offset + 4; + bfd_put_32 (output_bfd, + PLT0_ENTRY_WORD0 | ((addr >> 16) & 0xffff), + splt->contents); + bfd_put_32 (output_bfd, + PLT0_ENTRY_WORD1 | (addr & 0xffff), + splt->contents + 4); + bfd_put_32 (output_bfd, PLT0_ENTRY_WORD2, splt->contents + 8); + bfd_put_32 (output_bfd, PLT0_ENTRY_WORD3, splt->contents + 12); + bfd_put_32 (output_bfd, PLT0_ENTRY_WORD4, splt->contents + 16); + } + + elf_section_data (splt->output_section)->this_hdr.sh_entsize = + PLT_ENTRY_SIZE; + } + } + + /* Fill in the first three entries in the global offset table. */ + if (sgot && sgot->_raw_size > 0) + { + if (sdyn == NULL) + bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); + else + bfd_put_32 (output_bfd, + sdyn->output_section->vma + sdyn->output_offset, + sgot->contents); + bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); + bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); + + elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; + } + + return TRUE; +} + #if 0 /* relaxing not supported yet */ @@ -2005,6 +4270,8 @@ m32r_elf_gc_mark_hook (sec, info, rel, h, sym) { case R_M32R_GNU_VTINHERIT: case R_M32R_GNU_VTENTRY: + case R_M32R_RELA_GNU_VTINHERIT: + case R_M32R_RELA_GNU_VTENTRY: break; default: @@ -2035,7 +4302,97 @@ m32r_elf_gc_sweep_hook (abfd, info, sec, relocs) asection *sec ATTRIBUTE_UNUSED; const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED; { - /* we don't use got and plt entries for m32r */ + /* Update the got entry reference counts for the section being removed. */ + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_signed_vma *local_got_refcounts; + const Elf_Internal_Rela *rel, *relend; + unsigned long r_symndx; + struct elf_link_hash_entry *h; + + elf_section_data (sec)->local_dynrel = NULL; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (abfd); + local_got_refcounts = elf_local_got_refcounts (abfd); + + relend = relocs + sec->reloc_count; + for (rel = relocs; rel < relend; rel++) + switch (ELF32_R_TYPE (rel->r_info)) + { + case R_M32R_GOT16_HI_ULO: + case R_M32R_GOT16_HI_SLO: + case R_M32R_GOT16_LO: + case R_M32R_GOT24: + case R_M32R_GOTPC_HI_ULO: + case R_M32R_GOTPC_HI_SLO: + case R_M32R_GOTPC_LO: + case R_M32R_GOTPC24: + r_symndx = ELF32_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + if (h->got.refcount > 0) + h->got.refcount--; + } + else + { + if (local_got_refcounts && local_got_refcounts[r_symndx] > 0) + local_got_refcounts[r_symndx]--; + } + break; + + case R_M32R_16_RELA: + case R_M32R_24_RELA: + case R_M32R_32_RELA: + case R_M32R_HI16_ULO_RELA: + case R_M32R_HI16_SLO_RELA: + case R_M32R_LO16_RELA: + case R_M32R_SDA16_RELA: + case R_M32R_18_PCREL_RELA: + case R_M32R_26_PCREL_RELA: + r_symndx = ELF32_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + struct elf_m32r_link_hash_entry *eh; + struct elf_m32r_dyn_relocs **pp; + struct elf_m32r_dyn_relocs *p; + + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + + if (!info->shared && h->plt.refcount > 0) + h->plt.refcount -= 1; + + eh = (struct elf_m32r_link_hash_entry *) h; + + for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) + if (p->sec == sec) + { + if (ELF32_R_TYPE (rel->r_info) == R_M32R_26_PCREL_RELA + || ELF32_R_TYPE (rel->r_info) == R_M32R_26_PCREL_RELA) + p->pc_count -= 1; + p->count -= 1; + if (p->count == 0) + *pp = p->next; + break; + } + } + break; + + case R_M32R_26_PLTREL: + r_symndx = ELF32_R_SYM (rel->r_info); + if (r_symndx >= symtab_hdr->sh_info) + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + if (h->plt.refcount > 0) + h->plt.refcount--; + } + break; + + default: + break; + } + return TRUE; } @@ -2054,32 +4411,250 @@ m32r_elf_check_relocs (abfd, info, sec, relocs) struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; const Elf_Internal_Rela *rel; const Elf_Internal_Rela *rel_end; + struct elf_m32r_link_hash_table *htab; + bfd *dynobj; + bfd_vma *local_got_offsets; + asection *sgot, *srelgot, *sreloc; if (info->relocatable) return TRUE; + sgot = srelgot = sreloc = NULL; + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; sym_hashes = elf_sym_hashes (abfd); sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym); if (!elf_bad_symtab (abfd)) sym_hashes_end -= symtab_hdr->sh_info; + htab = m32r_elf_hash_table (info); + dynobj = htab->root.dynobj; + local_got_offsets = elf_local_got_offsets (abfd); + rel_end = relocs + sec->reloc_count; for (rel = relocs; rel < rel_end; rel++) { + int r_type; struct elf_link_hash_entry *h; unsigned long r_symndx; r_symndx = ELF32_R_SYM (rel->r_info); + r_type = ELF32_R_TYPE (rel->r_info); if (r_symndx < symtab_hdr->sh_info) h = NULL; else h = sym_hashes[r_symndx - symtab_hdr->sh_info]; - switch (ELF32_R_TYPE (rel->r_info)) + /* Some relocs require a global offset table. */ + if (htab->sgot == NULL) + { + switch (r_type) + { + case R_M32R_GOT16_HI_ULO: + case R_M32R_GOT16_HI_SLO: + case R_M32R_GOT16_LO: + case R_M32R_GOTPC24: + case R_M32R_GOTPC_HI_ULO: + case R_M32R_GOTPC_HI_SLO: + case R_M32R_GOTPC_LO: + case R_M32R_GOT24: + if (dynobj == NULL) + htab->root.dynobj = dynobj = abfd; + if (! create_got_section (dynobj, info)) + return FALSE; + break; + + default: + break; + } + } + + switch (r_type) { + case R_M32R_GOT16_HI_ULO: + case R_M32R_GOT16_HI_SLO: + case R_M32R_GOT16_LO: + case R_M32R_GOT24: + + if (h != NULL) + h->got.refcount += 1; + else + { + bfd_signed_vma *local_got_refcounts; + + /* This is a global offset table entry for a local + symbol. */ + local_got_refcounts = elf_local_got_refcounts (abfd); + if (local_got_refcounts == NULL) + { + bfd_size_type size; + + size = symtab_hdr->sh_info; + size *= sizeof (bfd_signed_vma); + local_got_refcounts = ((bfd_signed_vma *) + bfd_zalloc (abfd, size)); + if (local_got_refcounts == NULL) + return FALSE; + elf_local_got_refcounts (abfd) = local_got_refcounts; + } + local_got_refcounts[r_symndx] += 1; + } + break; + + case R_M32R_26_PLTREL: + /* This symbol requires a procedure linkage table entry. We + actually build the entry in adjust_dynamic_symbol, + because this might be a case of linking PIC code without + linking in any dynamic objects, in which case we don't + need to generate a procedure linkage table after all. */ + + /* If this is a local symbol, we resolve it directly without + creating a procedure linkage table entry. */ + if (h == NULL) + continue; + + if (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) + break; + + h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_PLT; + h->plt.refcount += 1; + break; + + case R_M32R_16_RELA: + case R_M32R_24_RELA: + case R_M32R_32_RELA: + case R_M32R_HI16_ULO_RELA: + case R_M32R_HI16_SLO_RELA: + case R_M32R_LO16_RELA: + case R_M32R_SDA16_RELA: + case R_M32R_18_PCREL_RELA: + case R_M32R_26_PCREL_RELA: + + if (h != NULL && !info->shared) + { + h->elf_link_hash_flags |= ELF_LINK_NON_GOT_REF; + h->plt.refcount += 1; + } + + /* If we are creating a shared library, and this is a reloc + against a global symbol, or a non PC relative reloc + against a local symbol, then we need to copy the reloc + into the shared library. However, if we are linking with + -Bsymbolic, we do not need to copy a reloc against a + global symbol which is defined in an object we are + including in the link (i.e., DEF_REGULAR is set). At + this point we have not seen all the input files, so it is + possible that DEF_REGULAR is not set now but will be set + later (it is never cleared). We account for that + possibility below by storing information in the + dyn_relocs field of the hash table entry. A similar + situation occurs when creating shared libraries and symbol + visibility changes render the symbol local. + + If on the other hand, we are creating an executable, we + may need to keep relocations for symbols satisfied by a + dynamic library if we manage to avoid copy relocs for the + symbol. */ + if ((info->shared + && (sec->flags & SEC_ALLOC) != 0 + && ((r_type != R_M32R_26_PCREL_RELA + && r_type != R_M32R_18_PCREL_RELA) + || (h != NULL + && (! info->symbolic + || h->root.type == bfd_link_hash_defweak + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0)))) + || (!info->shared + && (sec->flags & SEC_ALLOC) != 0 + && h != NULL + && (h->root.type == bfd_link_hash_defweak + || (h->elf_link_hash_flags + & ELF_LINK_HASH_DEF_REGULAR) == 0))) + { + struct elf_m32r_dyn_relocs *p; + struct elf_m32r_dyn_relocs **head; + + if (dynobj == NULL) + htab->root.dynobj = dynobj = abfd; + + /* When creating a shared object, we must copy these + relocs into the output file. We create a reloc + section in dynobj and make room for the reloc. */ + if (sreloc == NULL) + { + const char *name; + + name = (bfd_elf_string_from_elf_section + (abfd, + elf_elfheader (abfd)->e_shstrndx, + elf_section_data (sec)->rel_hdr.sh_name)); + if (name == NULL) + return FALSE; + + BFD_ASSERT (strncmp (name, ".rela", 5) == 0 + && strcmp (bfd_get_section_name (abfd, sec), + name + 5) == 0); + + sreloc = bfd_get_section_by_name (dynobj, name); + if (sreloc == NULL) + { + flagword flags; + + sreloc = bfd_make_section (dynobj, name); + flags = (SEC_HAS_CONTENTS | SEC_READONLY + | SEC_IN_MEMORY | SEC_LINKER_CREATED); + if ((sec->flags & SEC_ALLOC) != 0) + flags |= SEC_ALLOC | SEC_LOAD; + if (sreloc == NULL + || ! bfd_set_section_flags (dynobj, sreloc, flags) + || ! bfd_set_section_alignment (dynobj, sreloc, 2)) + return FALSE; + } + elf_section_data (sec)->sreloc = sreloc; + } + + /* If this is a global symbol, we count the number of + relocations we need for this symbol. */ + if (h != NULL) + head = &((struct elf_m32r_link_hash_entry *) h)->dyn_relocs; + else + { + asection *s; + + /* Track dynamic relocs needed for local syms too. */ + s = bfd_section_from_r_symndx (abfd, &htab->sym_sec, + sec, r_symndx); + if (s == NULL) + return FALSE; + + head = ((struct elf_m32r_dyn_relocs **) + &elf_section_data (s)->local_dynrel); + } + + p = *head; + if (p == NULL || p->sec != sec) + { + bfd_size_type amt = sizeof (*p); + p = ((struct elf_m32r_dyn_relocs *) bfd_alloc (dynobj, amt)); + if (p == NULL) + return FALSE; + p->next = *head; + *head = p; + p->sec = sec; + p->count = 0; + p->pc_count = 0; + } + + p->count += 1; + if (ELF32_R_TYPE (rel->r_info) == R_M32R_26_PCREL_RELA + || ELF32_R_TYPE (rel->r_info) == R_M32R_18_PCREL_RELA) + p->pc_count += 1; + } + break; + /* This relocation describes the C++ object vtable hierarchy. Reconstruct it for later use during GC. */ + case R_M32R_RELA_GNU_VTINHERIT: case R_M32R_GNU_VTINHERIT: if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) return FALSE; @@ -2091,6 +4666,10 @@ m32r_elf_check_relocs (abfd, info, sec, relocs) if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset)) return FALSE; break; + case R_M32R_RELA_GNU_VTENTRY: + if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_addend)) + return FALSE; + break; } } @@ -2103,6 +4682,61 @@ static struct bfd_elf_special_section const m32r_elf_special_sections[]= { ".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE }, { NULL, 0, 0, 0, 0 } }; + +static bfd_boolean +m32r_elf_fake_sections (abfd, hdr, sec) + bfd *abfd; + Elf_Internal_Shdr *hdr ATTRIBUTE_UNUSED; + asection *sec; +{ + register const char *name; + + name = bfd_get_section_name (abfd, sec); + + /* The generic elf_fake_sections will set up REL_HDR using the + default kind of relocations. But, we may actually need both + kinds of relocations, so we set up the second header here. + + This is not necessary for the O32 ABI since that only uses Elf32_Rel + relocations (cf. System V ABI, MIPS RISC Processor Supplement, + 3rd Edition, p. 4-17). It breaks the IRIX 5/6 32-bit ld, since one + of the resulting empty .rela.
sections starts with + sh_offset == object size, and ld doesn't allow that. While the check + is arguably bogus for empty or SHT_NOBITS sections, it can easily be + avoided by not emitting those useless sections in the first place. */ + if ((sec->flags & SEC_RELOC) != 0) + { + struct bfd_elf_section_data *esd; + bfd_size_type amt = sizeof (Elf_Internal_Shdr); + + esd = elf_section_data (sec); + BFD_ASSERT (esd->rel_hdr2 == NULL); + esd->rel_hdr2 = (Elf_Internal_Shdr *) bfd_zalloc (abfd, amt); + if (!esd->rel_hdr2) + return FALSE; + _bfd_elf_init_reloc_shdr (abfd, esd->rel_hdr2, sec, + !sec->use_rela_p); + } + + return TRUE; +} + +static enum elf_reloc_type_class +m32r_elf_reloc_type_class (rela) + const Elf_Internal_Rela *rela; +{ + switch ((int) ELF32_R_TYPE (rela->r_info)) + { + case R_M32R_RELATIVE: + return reloc_class_relative; + case R_M32R_JMP_SLOT: + return reloc_class_plt; + case R_M32R_COPY: + return reloc_class_copy; + default: + return reloc_class_normal; + } +} #define ELF_ARCH bfd_arch_m32r #define ELF_MACHINE_CODE EM_M32R @@ -2111,8 +4745,10 @@ static struct bfd_elf_special_section const m32r_elf_special_sections[]= #define TARGET_BIG_SYM bfd_elf32_m32r_vec #define TARGET_BIG_NAME "elf32-m32r" +#define TARGET_LITTLE_SYM bfd_elf32_m32rle_vec +#define TARGET_LITTLE_NAME "elf32-m32rle" -#define elf_info_to_howto 0 +#define elf_info_to_howto m32r_info_to_howto #define elf_info_to_howto_rel m32r_info_to_howto_rel #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing @@ -2122,10 +4758,35 @@ static struct bfd_elf_special_section const m32r_elf_special_sections[]= #define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook #define elf_backend_check_relocs m32r_elf_check_relocs +#define elf_backend_create_dynamic_sections m32r_elf_create_dynamic_sections +#define bfd_elf32_bfd_link_hash_table_create m32r_elf_link_hash_table_create +#define elf_backend_size_dynamic_sections m32r_elf_size_dynamic_sections +#define elf_backend_finish_dynamic_sections m32r_elf_finish_dynamic_sections +#define elf_backend_adjust_dynamic_symbol m32r_elf_adjust_dynamic_symbol +#define elf_backend_finish_dynamic_symbol m32r_elf_finish_dynamic_symbol +#define elf_backend_reloc_type_class m32r_elf_reloc_type_class +#define elf_backend_copy_indirect_symbol m32r_elf_copy_indirect_symbol + #define elf_backend_can_gc_sections 1 -#if !USE_REL +/*#if !USE_REL #define elf_backend_rela_normal 1 +#endif*/ +#define elf_backend_can_refcount 1 +#define elf_backend_want_got_plt 1 +#define elf_backend_plt_readonly 1 +#define elf_backend_want_plt_sym 0 +#define elf_backend_got_header_size 12 + +#define elf_backend_may_use_rel_p 1 +#ifdef USE_M32R_OLD_RELOC +#define elf_backend_default_use_rela_p 0 +#define elf_backend_may_use_rela_p 0 +#else +#define elf_backend_default_use_rela_p 1 +#define elf_backend_may_use_rela_p 1 +#define elf_backend_fake_sections m32r_elf_fake_sections #endif + #if 0 /* not yet */ /* relax support */ #define bfd_elf32_bfd_relax_section m32r_elf_relax_section @@ -2141,3 +4802,20 @@ static struct bfd_elf_special_section const m32r_elf_special_sections[]= #define elf_backend_special_sections m32r_elf_special_sections #include "elf32-target.h" + +#undef ELF_MAXPAGESIZE +#define ELF_MAXPAGESIZE 0x1000 + +#undef TARGET_BIG_SYM +#define TARGET_BIG_SYM bfd_elf32_m32rlin_vec +#undef TARGET_BIG_NAME +#define TARGET_BIG_NAME "elf32-m32r-linux" +#undef TARGET_LITTLE_SYM +#define TARGET_LITTLE_SYM bfd_elf32_m32rlelin_vec +#undef TARGET_LITTLE_NAME +#define TARGET_LITTLE_NAME "elf32-m32rle-linux" +#undef elf32_bed +#define elf32_bed elf32_m32r_lin_bed + +#include "elf32-target.h" + diff --git a/bfd/reloc.c b/bfd/reloc.c index ad4963f8c6..abbcfca24b 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -2911,6 +2911,37 @@ ENUM ENUMDOC This is a 16-bit reloc containing the small data area offset for use in add3, load, and store instructions. +ENUM + BFD_RELOC_M32R_GOT24 +ENUMX + BFD_RELOC_M32R_26_PLTREL +ENUMX + BFD_RELOC_M32R_COPY +ENUMX + BFD_RELOC_M32R_GLOB_DAT +ENUMX + BFD_RELOC_M32R_JMP_SLOT +ENUMX + BFD_RELOC_M32R_RELATIVE +ENUMX + BFD_RELOC_M32R_GOTOFF +ENUMX + BFD_RELOC_M32R_GOTPC24 +ENUMX + BFD_RELOC_M32R_GOT16_HI_ULO +ENUMX + BFD_RELOC_M32R_GOT16_HI_SLO +ENUMX + BFD_RELOC_M32R_GOT16_LO +ENUMX + BFD_RELOC_M32R_GOTPC_HI_ULO +ENUMX + BFD_RELOC_M32R_GOTPC_HI_SLO +ENUMX + BFD_RELOC_M32R_GOTPC_LO +ENUMDOC + For PIC. + ENUM BFD_RELOC_V850_9_PCREL diff --git a/bfd/targets.c b/bfd/targets.c index 488e8e4a6b..de4284eb80 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -542,6 +542,9 @@ extern const bfd_target bfd_elf32_littlearm_oabi_vec; extern const bfd_target bfd_elf32_littlearm_vec; extern const bfd_target bfd_elf32_littlemips_vec; extern const bfd_target bfd_elf32_m32r_vec; +extern const bfd_target bfd_elf32_m32rle_vec; +extern const bfd_target bfd_elf32_m32rlin_vec; +extern const bfd_target bfd_elf32_m32rlelin_vec; extern const bfd_target bfd_elf32_m68hc11_vec; extern const bfd_target bfd_elf32_m68hc12_vec; extern const bfd_target bfd_elf32_m68k_vec; @@ -831,6 +834,9 @@ static const bfd_target * const _bfd_target_vector[] = { &bfd_elf32_littlearm_vec, &bfd_elf32_littlemips_vec, &bfd_elf32_m32r_vec, + &bfd_elf32_m32rle_vec, + &bfd_elf32_m32rlin_vec, + &bfd_elf32_m32rlelin_vec, &bfd_elf32_m68hc11_vec, &bfd_elf32_m68hc12_vec, &bfd_elf32_m68k_vec, diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 3caa02027f..84ab476608 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,7 @@ +2003-12-19 Kazuhiro Inaoka + + * readelf.c (guess_is_rela): Changed m32r's default type to RELA. + 2003-12-11 Nick Clifton * objcopy.c (strip_usage): Add --only-keep-debug. diff --git a/binutils/readelf.c b/binutils/readelf.c index a11d53bd19..6774088bb8 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -618,7 +618,6 @@ guess_is_rela (unsigned long e_machine) case EM_DLX: case EM_OPENRISC: case EM_OR32: - case EM_M32R: case EM_CYGNUS_M32R: case EM_D10V: case EM_CYGNUS_D10V: @@ -668,6 +667,7 @@ guess_is_rela (unsigned long e_machine) case EM_IQ2000: case EM_XTENSA: case EM_XTENSA_OLD: + case EM_M32R: return TRUE; case EM_MMA: diff --git a/gas/ChangeLog b/gas/ChangeLog index c4cfa689c6..bfb73432fd 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,18 @@ +2003-12-19 Kazuhiro Inaoka + + Add m32r-linux and PIC support. Add new ABI that uses RELA. + * configure.in: Add m32r-linux targets. + * configure: Regenerate. + * config/tc-m32r.c (md_parse_option): Add -KPIC option. + (tc_gen_reloc): Added. + (debug_sym, md_estimate_size_before_relax, md_convert_frag, + md_pcrel_from_section, m32r_fix_adjustable): Changed for PIC. + * config/tc-m32r.h (tc_gen_reloc, EXTERN_FORCE_RELOC): Undefined. + (TC_HANDLES_FX_DONE, TC_FIX_ADJUSTABLE, TC_RELOC_RTSYM_LOC_FIXUP): + Defined. + * doc/c-m32r.texi: Document -KPIC option. + * NEWS: Mention the support m32r Linux and PIC. + 2003-12-18 Nick Clifton * input-file.c (input_file_open): Remove call to stat(). diff --git a/gas/NEWS b/gas/NEWS index 66c15c9232..cff68629eb 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Added PIC m32r Linux (ELF) and support to M32R assembler. + * Added support for ARM V6. * Added support for sh4a and variants. diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c index 90fb28d67d..fb1c61354f 100644 --- a/gas/config/tc-m32r.c +++ b/gas/config/tc-m32r.c @@ -70,6 +70,9 @@ static m32r_insn prev_insn; alignment request. */ static int seen_relaxable_p = 0; +/* Non-zero if we are generating PIC code. */ +int pic_code; + /* Non-zero if -relax specified, in which case sufficient relocs are output for the linker to do relaxing. We do simple forms of relaxing internally, but they are always done. @@ -194,7 +197,7 @@ allow_m32rx (int on) gas_cgen_cpu_desc->machs = mach_table[on].mach_flags; } -#define M32R_SHORTOPTS "O" +#define M32R_SHORTOPTS "O::K:" const char *md_shortopts = M32R_SHORTOPTS; @@ -362,6 +365,13 @@ md_parse_option (c, arg) warn_unmatched_high = 0; break; + case 'K': + if (strcmp (arg, "PIC") != 0) + as_warn (_("Unrecognized option following -K")); + else + pic_code = 1; + break; + #if 0 /* Not supported yet. */ case OPTION_RELAX: @@ -436,6 +446,9 @@ md_show_usage (stream) fprintf (stream, _("\ -Wnuh synonym for -no-warn-unmatched-high\n")); + fprintf (stream, _("\ + -KPIC generate PIC\n")); + #if 0 fprintf (stream, _("\ -relax create linker relaxable code\n")); @@ -558,7 +571,9 @@ debug_sym (ignore) } symbol_table_insert (symbolP); - if (S_IS_DEFINED (symbolP) && S_GET_SEGMENT (symbolP) != reg_section) + if (S_IS_DEFINED (symbolP) && (S_GET_SEGMENT (symbolP) != reg_section + || S_IS_EXTERNAL (symbolP) + || S_IS_WEAK (symbolP))) /* xgettext:c-format */ as_bad (_("symbol `%s' already defined"), S_GET_NAME (symbolP)); @@ -1710,7 +1725,9 @@ md_estimate_size_before_relax (fragP, segment) However, we can't finish the fragment here and emit the reloc as insn alignment requirements may move the insn about. */ - if (S_GET_SEGMENT (fragP->fr_symbol) != segment) + if (S_GET_SEGMENT (fragP->fr_symbol) != segment + || S_IS_EXTERNAL (fragP->fr_symbol) + || S_IS_WEAK (fragP->fr_symbol)) { #if 0 int old_fr_fix = fragP->fr_fix; @@ -1816,12 +1833,18 @@ md_convert_frag (abfd, sec, fragP) abort (); } - if (S_GET_SEGMENT (fragP->fr_symbol) != sec) + if (S_GET_SEGMENT (fragP->fr_symbol) != sec + || S_IS_EXTERNAL (fragP->fr_symbol) + || S_IS_WEAK (fragP->fr_symbol)) { /* Symbol must be resolved by linker. */ if (fragP->fr_offset & 3) as_warn (_("Addend to unresolved symbol not on word boundary.")); - addend = fragP->fr_offset >> 2; +#ifdef USE_M32R_OLD_RELOC + addend = fragP->fr_offset >> 2; /* Old M32R used USE_REL. */ +#else + addend = 0; +#endif } else { @@ -1833,7 +1856,9 @@ md_convert_frag (abfd, sec, fragP) /* Create a relocation for symbols that must be resolved by the linker. Otherwise output the completed insn. */ - if (S_GET_SEGMENT (fragP->fr_symbol) != sec) + if (S_GET_SEGMENT (fragP->fr_symbol) != sec + || S_IS_EXTERNAL (fragP->fr_symbol) + || S_IS_WEAK (fragP->fr_symbol)) { assert (fragP->fr_subtype != 1); assert (fragP->fr_cgen.insn != 0); @@ -1874,7 +1899,9 @@ md_pcrel_from_section (fixP, sec) { if (fixP->fx_addsy != (symbolS *) NULL && (! S_IS_DEFINED (fixP->fx_addsy) - || S_GET_SEGMENT (fixP->fx_addsy) != sec)) + || S_GET_SEGMENT (fixP->fx_addsy) != sec + || S_IS_EXTERNAL (fixP->fx_addsy) + || S_IS_WEAK (fixP->fx_addsy))) { /* The symbol is undefined (or is defined but not in this section). Let the linker figure it out. */ @@ -2189,6 +2216,23 @@ m32r_fix_adjustable (fixP) else reloc_type = fixP->fx_r_type; + if (fixP->fx_addsy == NULL) + return 1; + + /* Prevent all adjustments to global symbols. */ + if (S_IS_EXTERN (fixP->fx_addsy)) + return 0; + if (S_IS_WEAK (fixP->fx_addsy)) + return 0; + + if (pic_code + && (reloc_type == BFD_RELOC_M32R_24 + || reloc_type == BFD_RELOC_M32R_26_PCREL + || reloc_type == BFD_RELOC_M32R_HI16_SLO + || reloc_type == BFD_RELOC_M32R_HI16_ULO + || reloc_type == BFD_RELOC_M32R_LO16)) + return 0; + /* We need the symbol name for the VTABLE entries. */ if (reloc_type == BFD_RELOC_VTABLE_INHERIT || reloc_type == BFD_RELOC_VTABLE_ENTRY) @@ -2204,3 +2248,99 @@ m32r_elf_final_processing () m32r_flags |= E_M32R_HAS_PARALLEL; elf_elfheader (stdoutput)->e_flags |= m32r_flags; } + +#define GOT_NAME "_GLOBAL_OFFSET_TABLE_" + +/* Translate internal representation of relocation info to BFD target + format. */ +arelent * +tc_gen_reloc (section, fixP) + asection * section; + fixS * fixP; +{ + arelent * reloc; + bfd_reloc_code_real_type code; + + reloc = (arelent *) xmalloc (sizeof (arelent)); + + reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); + *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); + reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; + + code = fixP->fx_r_type; + if (pic_code) + { +#ifdef DEBUG_PIC +printf("%s",bfd_get_reloc_code_name(code)); +#endif + switch (code) + { + case BFD_RELOC_M32R_26_PCREL: + code = BFD_RELOC_M32R_26_PLTREL; + break; + case BFD_RELOC_M32R_24: + if (fixP->fx_addsy != NULL + && strcmp (S_GET_NAME (fixP->fx_addsy), GOT_NAME) == 0) + code = BFD_RELOC_M32R_GOTPC24; + else + code = BFD_RELOC_M32R_GOT24; + break; + case BFD_RELOC_M32R_HI16_ULO: + if (fixP->fx_addsy != NULL + && strcmp (S_GET_NAME (fixP->fx_addsy), GOT_NAME) == 0) + code = BFD_RELOC_M32R_GOTPC_HI_ULO; + else + code = BFD_RELOC_M32R_GOT16_HI_ULO; + break; + case BFD_RELOC_M32R_HI16_SLO: + if (fixP->fx_addsy != NULL + && strcmp (S_GET_NAME (fixP->fx_addsy), GOT_NAME) == 0) + code = BFD_RELOC_M32R_GOTPC_HI_SLO; + else + code = BFD_RELOC_M32R_GOT16_HI_SLO; + break; + case BFD_RELOC_M32R_LO16: + if (fixP->fx_addsy != NULL + && strcmp (S_GET_NAME (fixP->fx_addsy), GOT_NAME) == 0) + code = BFD_RELOC_M32R_GOTPC_LO; + else + code = BFD_RELOC_M32R_GOT16_LO; + break; + default: + break; + } +#ifdef DEBUG_PIC +printf(" => %s",bfd_get_reloc_code_name(code)); +#endif + } + + reloc->howto = bfd_reloc_type_lookup (stdoutput, code); +#ifdef DEBUG_PIC +printf(" => %s\n",reloc->howto->name); +#endif + if (reloc->howto == (reloc_howto_type *) NULL) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _("internal error: can't export reloc type %d (`%s')"), + fixP->fx_r_type, bfd_get_reloc_code_name (code)); + return NULL; + } + + /* Use fx_offset for these cases */ + if ( fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY + || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT) + reloc->addend = fixP->fx_offset; + else if (!pic_code + && fixP->fx_pcrel + && fixP->fx_addsy != NULL + && (S_GET_SEGMENT(fixP->fx_addsy) != section) + && S_IS_DEFINED (fixP->fx_addsy) + && ! S_IS_EXTERNAL(fixP->fx_addsy) + && ! S_IS_WEAK(fixP->fx_addsy)) + /* already used fx_offset in the opcode field itseld. */ + reloc->addend = 0; + else + reloc->addend = fixP->fx_addnumber; + + return reloc; +} diff --git a/gas/config/tc-m32r.h b/gas/config/tc-m32r.h index 1a8e655dd9..4769214641 100644 --- a/gas/config/tc-m32r.h +++ b/gas/config/tc-m32r.h @@ -87,14 +87,31 @@ bfd_boolean m32r_fix_adjustable PARAMS ((struct fix *)); HI16 relocs and queue them up for later sorting. */ #define md_cgen_record_fixup_exp m32r_cgen_record_fixup_exp -#define tc_gen_reloc gas_cgen_tc_gen_reloc +/* #define tc_gen_reloc gas_cgen_tc_gen_reloc */ + +#define TC_HANDLES_FX_DONE + +extern int pic_code; + +extern bfd_boolean m32r_fix_adjustable PARAMS ((struct fix *)); + +/* This arranges for gas/write.c to not apply a relocation if + obj_fix_adjustable() says it is not adjustable. */ +#define TC_FIX_ADJUSTABLE(fixP) obj_fix_adjustable (fixP) + +#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \ + ((FIX)->fx_addsy == NULL \ + || (! S_IS_EXTERNAL ((FIX)->fx_addsy) \ + && ! S_IS_WEAK ((FIX)->fx_addsy) \ + && S_IS_DEFINED ((FIX)->fx_addsy) \ + && ! S_IS_COMMON ((FIX)->fx_addsy))) #define tc_frob_file_before_fix() m32r_frob_file () extern void m32r_frob_file PARAMS ((void)); /* No shared lib support, so we don't need to ensure externally - visible symbols can be overridden. */ -#define EXTERN_FORCE_RELOC 0 + visible symbols can be overridden. +#define EXTERN_FORCE_RELOC 0 */ /* When relaxing, we need to emit various relocs we otherwise wouldn't. */ #define TC_FORCE_RELOCATION(fix) m32r_force_relocation (fix) diff --git a/gas/configure b/gas/configure index 5c08fc6706..37926bca83 100755 --- a/gas/configure +++ b/gas/configure @@ -4000,6 +4000,8 @@ for this_target in $target $canon_targets ; do sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c. v850*) cpu_type=v850 ;; xtensa*) cpu_type=xtensa arch=xtensa ;; + m32r) cpu_type=m32r target_cpu=m32r endian=big ;; + m32rle) cpu_type=m32r target_cpu=m32r endian=little ;; *) cpu_type=${cpu} ;; esac @@ -4180,7 +4182,8 @@ echo "$as_me: WARNING: GAS support for ${generic_target} is preliminary and a wo iq2000-*-elf) fmt=elf bfd_gas=yes ;; - m32r-*-*) fmt=elf ;; + m32r-*-elf*) fmt=elf ;; + m32r-*-linux*) fmt=elf em=linux;; m68hc11-*-* | m6811-*-*) fmt=elf ;; m68hc12-*-* | m6812-*-*) fmt=elf ;; diff --git a/gas/configure.in b/gas/configure.in index 6c266bbaf8..514fee4fc2 100644 --- a/gas/configure.in +++ b/gas/configure.in @@ -164,6 +164,8 @@ changequote([,])dnl sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c. v850*) cpu_type=v850 ;; xtensa*) cpu_type=xtensa arch=xtensa ;; + m32r) cpu_type=m32r target_cpu=m32r endian=big ;; + m32rle) cpu_type=m32r target_cpu=m32r endian=little ;; *) cpu_type=${cpu} ;; esac @@ -337,7 +339,8 @@ changequote([,])dnl iq2000-*-elf) fmt=elf bfd_gas=yes ;; - m32r-*-*) fmt=elf ;; + m32r-*-elf*) fmt=elf ;; + m32r-*-linux*) fmt=elf em=linux;; m68hc11-*-* | m6811-*-*) fmt=elf ;; m68hc12-*-* | m6812-*-*) fmt=elf ;; diff --git a/gas/doc/c-m32r.texi b/gas/doc/c-m32r.texi index 81590902e7..4360ee6156 100644 --- a/gas/doc/c-m32r.texi +++ b/gas/doc/c-m32r.texi @@ -75,6 +75,12 @@ data. @cindex @code{-EB} option, M32R This is a synonum for @emph{-big}. +@item -KPIC +@cindex @code{-KPIC} option, M32R +@cindex PIC code generation for M32R +This option specifies that the output of the assembler should be +marked as position-independent code (PIC). + @item -parallel @cindex @code{-parallel} option, M32RX This option tells the assembler to attempts to combine two sequential diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 829fb75bbe..b0f00eb1da 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,16 @@ +2003-12-19 Kazuhiro Inaoka + + * gas/m32r/m32rx.s: Changed pattern bncl to bncl.s. + * gas/m32r/allinsn.d: Update for New RELA-ABI. + * gas/m32r/high-1.d: Likewise. + * gas/m32r/relax-1.d: Likewise. + * gas/m32r/uppercase.d: Likewise. + * gas/m32r/m32rx.d: Likewise. + * gas/vtable/vtable.exp: Likewise. + * gas/m32r/pic.exp: New file for PIC. + * gas/m32r/pic.s: Likewise. + * gas/m32r/pic.d: Likewise. + 2003-12-18 Richard Sandiford * gas/mips/mips16-jalx.d: Use -mabi=o64. diff --git a/gas/testsuite/gas/m32r/allinsn.d b/gas/testsuite/gas/m32r/allinsn.d index 55965e6605..18c80c3a17 100644 --- a/gas/testsuite/gas/m32r/allinsn.d +++ b/gas/testsuite/gas/m32r/allinsn.d @@ -209,7 +209,7 @@ Disassembly of section .text: 0+010c : 10c: ed 00 00 00 ld24 fp,[#]*0 - 10c: R_M32R_24 .data + 10c: R_M32R_24_RELA .data 0+0110 : 110: 6d 00 f0 00 ldi fp,[#]*0 \|\| nop diff --git a/gas/testsuite/gas/m32r/high-1.d b/gas/testsuite/gas/m32r/high-1.d index b5ccb8c55b..7c3d22aae7 100644 --- a/gas/testsuite/gas/m32r/high-1.d +++ b/gas/testsuite/gas/m32r/high-1.d @@ -7,10 +7,10 @@ Disassembly of section .text: 0* : - *0: d4 c0 00 01 seth r4,[#]*0x1 -[ ]*0: R_M32R_HI16_ULO .text + *0: d4 c0 00 00 seth r4,[#]*0x0 +[ ]*0: R_M32R_HI16_ULO_RELA .text\+0x10000 *4: 84 e4 00 00 or3 r4,r4,[#]*0x0 -[ ]*4: R_M32R_LO16 .text +[ ]*4: R_M32R_LO16_RELA .text\+0x10000 *8: d4 c0 12 34 seth r4,[#]*0x1234 *c: 84 e4 87 65 or3 r4,r4,[#]*0x8765 *10: d4 c0 12 35 seth r4,[#]*0x1235 diff --git a/gas/testsuite/gas/m32r/m32rx.d b/gas/testsuite/gas/m32r/m32rx.d index 6713dd20da..89b618b8a4 100644 --- a/gas/testsuite/gas/m32r/m32rx.d +++ b/gas/testsuite/gas/m32r/m32rx.d @@ -85,28 +85,40 @@ Disassembly of section .text: 64: 54 81 f0 00 rach a1,a0,#0x2 \|\| nop 0+0068 : - 68: 7c e6 8d ad bc 0 \|\| add fp,fp - 6c: 7c e5 0d ad bc 0 -> add fp,fp + 68: 7c 00 8d ad bc 68 \|\| add fp,fp + 68: R_M32R_10_PCREL_RELA bcl + 6c: 7c 00 0d ad bc 6c -> add fp,fp + 6c: R_M32R_10_PCREL_RELA bcl 0+0070 : - 70: 78 e4 cd 4d bcl 0 \|\| addi fp,#77 - 74: 78 e3 cd 4d bcl 0 \|\| addi fp,#77 + 70: 78 00 cd 4d bcl 70 \|\| addi fp,#77 + 70: R_M32R_10_PCREL_RELA bcl + 74: 78 00 cd 4d bcl 74 \|\| addi fp,#77 + 74: R_M32R_10_PCREL_RELA bcl 0+0078 : - 78: 7e e2 8d 8d bl 0 \|\| addv fp,fp - 7c: 7e e1 8d 8d bl 0 \|\| addv fp,fp + 78: 7e 00 8d 8d bl 78 \|\| addv fp,fp + 78: R_M32R_10_PCREL_RELA bcl + 7c: 7e 00 8d 8d bl 7c \|\| addv fp,fp + 7c: R_M32R_10_PCREL_RELA bcl 0+0080 : - 80: 7d e0 8d 9d bnc 0 \|\| addx fp,fp - 84: 7d df 0d 9d bnc 0 -> addx fp,fp + 80: 7d 00 8d 9d bnc 80 \|\| addx fp,fp + 80: R_M32R_10_PCREL_RELA bcl + 84: 7d 00 0d 9d bnc 84 -> addx fp,fp + 84: R_M32R_10_PCREL_RELA bcl 0+0088 : - 88: 79 de 8d cd bncl 0 \|\| and fp,fp - 8c: 0d cd 79 dd and fp,fp -> bncl 0 + 88: 79 00 8d cd bncl 88 \|\| and fp,fp + 88: R_M32R_10_PCREL_RELA bcl + 8c: 79 00 8d cd bncl 8c \|\| and fp,fp + 8c: R_M32R_10_PCREL_RELA bcl 0+0090 : - 90: 7f dc 8d 4d bra 0 \|\| cmp fp,fp - 94: 7f db 8d 4d bra 0 \|\| cmp fp,fp + 90: 7f 00 8d 4d bra 90 \|\| cmp fp,fp + 90: R_M32R_10_PCREL_RELA bcl + 94: 7f 00 8d 4d bra 94 \|\| cmp fp,fp + 94: R_M32R_10_PCREL_RELA bcl 0+0098 : 98: 1e cd 8d 6d jl fp \|\| cmpeq fp,fp diff --git a/gas/testsuite/gas/m32r/m32rx.s b/gas/testsuite/gas/m32r/m32rx.s index b86dab0bcc..e25ec77bc0 100644 --- a/gas/testsuite/gas/m32r/m32rx.s +++ b/gas/testsuite/gas/m32r/m32rx.s @@ -172,7 +172,7 @@ bnc__addx: bncl__and: bncl bcl || and fp, fp and fp, fp - bncl bcl + bncl.s bcl .text .global bra__cmp diff --git a/gas/testsuite/gas/m32r/pic.d b/gas/testsuite/gas/m32r/pic.d new file mode 100644 index 0000000000..a880a1b0f2 --- /dev/null +++ b/gas/testsuite/gas/m32r/pic.d @@ -0,0 +1,47 @@ +#as: -K PIC +#objdump: -dr +#name: pic + +.*: +file format .* + +Disassembly of section .text: + +0+0000 : + 0: 7e 01 f0 00 bl 4 \|\| nop + 4: ec 00 00 00 ld24 r12,0 + 4: R_M32R_GOTPC24 _GLOBAL_OFFSET_TABLE_ + 8: 0c ae f0 00 add r12,lr \|\| nop + +0+000c : + c: 7e 01 f0 00 bl 10 \|\| nop + 10: dc c0 00 00 seth r12,[#]0x0 + 10: R_M32R_GOTPC_HI_SLO _GLOBAL_OFFSET_TABLE_ + 14: 8c ac 00 00 add3 r12,r12,[#]0 + 14: R_M32R_GOTPC_LO _GLOBAL_OFFSET_TABLE_\+0x4 + 18: 0c ae f0 00 add r12,lr \|\| nop + +0+001c : + 1c: 7e 01 f0 00 bl 20 \|\| nop + 20: dc c0 00 00 seth r12,[#]0x0 + 20: R_M32R_GOTPC_HI_ULO _GLOBAL_OFFSET_TABLE_ + 24: 8c ec 00 00 or3 r12,r12,[#]0x0 + 24: R_M32R_GOTPC_LO _GLOBAL_OFFSET_TABLE_\+0x4 + 28: 0c ae f0 00 add r12,lr \|\| nop + +0+002c : + 2c: e0 00 00 00 ld24 r0,0 + 2c: R_M32R_GOT24 sym + +0+0030 : + 30: dc c0 00 00 seth r12,[#]0x0 + 30: R_M32R_GOT16_HI_SLO sym2 + 34: 8c ac 00 00 add3 r12,r12,[#]0 + 34: R_M32R_GOT16_LO sym2\+0x4 + 38: dc c0 00 00 seth r12,[#]0x0 + 38: R_M32R_GOT16_HI_ULO sym2 + 3c: 8c ec 00 00 or3 r12,r12,[#]0x0 + 3c: R_M32R_GOT16_LO sym2\+0x4 + +0+0040 : + 40: fe 00 00 00 bl 40 + 40: R_M32R_26_PLTREL func diff --git a/gas/testsuite/gas/m32r/pic.exp b/gas/testsuite/gas/m32r/pic.exp new file mode 100644 index 0000000000..391a780aba --- /dev/null +++ b/gas/testsuite/gas/m32r/pic.exp @@ -0,0 +1,5 @@ +# M32R PIC testcases + +if [istarget m32r*-*-*] { + run_dump_test "pic" +} diff --git a/gas/testsuite/gas/m32r/pic.s b/gas/testsuite/gas/m32r/pic.s new file mode 100644 index 0000000000..94b3b35ff0 --- /dev/null +++ b/gas/testsuite/gas/m32r/pic.s @@ -0,0 +1,43 @@ + .section .text +# R_M32R_GOTPC24 +pic_gotpc: + bl.s .+4 + ld24 r12,#_GLOBAL_OFFSET_TABLE_ + add r12,lr + +# R_M32R_GOTPC_HI_ULO +# R_M32R_GOTPC_HI_SLO +# R_M32R_GOTPC_LO +pic_gotpc_slo: + bl.s .+4 + seth r12,#shigh(_GLOBAL_OFFSET_TABLE_) + add3 r12,r12,#low(_GLOBAL_OFFSET_TABLE_+4) + add r12,lr + +pic_gotpc_ulo: + bl.s .+4 + seth r12,#high(_GLOBAL_OFFSET_TABLE_) + or3 r12,r12,#low(_GLOBAL_OFFSET_TABLE_+4) + add r12,lr + +# R_M32R_GOT24 +pic_got: + .global sym + ld24 r0,#sym + +# R_M32R_GOT16_HI_ULO +# R_M32R_GOT16_HI_SLO +# R_M32R_GOT16_LO +pic_got16: + .global sym2 + seth r12,#shigh(sym2) + add3 r12,r12,#low(sym2+4) + seth r12,#high(sym2) + or3 r12,r12,#low(sym2+4) + +# R_M32R_26_PLTREL +pic_plt: + .global func + bl func + + .end diff --git a/gas/testsuite/gas/m32r/relax-1.d b/gas/testsuite/gas/m32r/relax-1.d index 2a4fcb8005..64f906ce88 100644 --- a/gas/testsuite/gas/m32r/relax-1.d +++ b/gas/testsuite/gas/m32r/relax-1.d @@ -15,4 +15,4 @@ Disassembly of section .branch: 0* : *0: ff 00 00 01 bra 4 -[ ]*0: R_M32R_26_PCREL .text +[ ]*0: R_M32R_26_PCREL_RELA .text diff --git a/gas/testsuite/gas/m32r/uppercase.d b/gas/testsuite/gas/m32r/uppercase.d index 12b1345988..ead239c260 100644 --- a/gas/testsuite/gas/m32r/uppercase.d +++ b/gas/testsuite/gas/m32r/uppercase.d @@ -11,16 +11,16 @@ Disassembly of section .text: 0+0004 : 4: d0 c0 00 00 seth r0,#0x0 -[ ]*4: R_M32R_HI16_ULO [.]text +[ ]*4: R_M32R_HI16_ULO_RELA [.]text\+0x4 0+0008 : 8: d0 c0 00 00 seth r0,#0x0 -[ ]*8: R_M32R_HI16_SLO [.]text +[ ]*8: R_M32R_HI16_SLO_RELA [.]text\+0x8 0+000c : - c: 80 e0 00 0c or3 r0,r0,#0xc -[ ]*c: R_M32R_LO16 [.]text + c: 80 e0 00 00 or3 r0,r0,#0x0 +[ ]*c: R_M32R_LO16_RELA [.]text\+0xc 0+0010 : 10: 80 a0 00 00 add3 r0,r0,#0 -[ ]*10: R_M32R_SDA16 sdavar +[ ]*10: R_M32R_SDA16_RELA sdavar diff --git a/gas/testsuite/gas/vtable/vtable.exp b/gas/testsuite/gas/vtable/vtable.exp index 0b50921c3f..cb74b7a7c6 100644 --- a/gas/testsuite/gas/vtable/vtable.exp +++ b/gas/testsuite/gas/vtable/vtable.exp @@ -41,7 +41,6 @@ if { ( [istarget "*-*-elf*"] || [istarget "*-*-linux*"]) || [istarget "d10v-*"] || [istarget "dlx-*"] || [istarget "i*86-*"] - || [istarget "m32r-*"] || ([istarget "mips*-*"] && ! [istarget "mips64*-*-linux*"] && ! [istarget "mips*-*-irix6*"]) diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 9fc3b58993..713d80d144 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,20 @@ +2003-12-19 Kazuhiro Inaoka + + * elf/m32r.h : Added m32r-linux and PIC support. Add new ABI that + uses RELA. + (R_M32R_16_RELA, R_M32R_32_RELA, R_M32R_24_RELA, + R_M32R_10_PCREL_RELA, R_M32R_18_PCREL_RELA, + R_M32R_26_PCREL_RELA, R_M32R_HI16_ULO_RELA, + R_M32R_HI16_SLO_RELA, R_M32R_LO16_RELA, + R_M32R_SDA16_RELA, R_M32R_RELA_GNU_VTINHERIT, + R_M32R_RELA_GNU_VTENTRY, R_M32R_GOT24, + R_M32R_26_PLTREL, R_M32R_COPY, R_M32R_GLOB_DAT, + R_M32R_JMP_SLOT, R_M32R_RELATIVE, R_M32R_GOTOFF, + R_M32R_GOTPC24, R_M32R_GOT16_HI_ULO, + R_M32R_GOT16_HI_SLO, R_M32R_GOT16_LO, + R_M32R_GOTPC_HI_ULO, R_M32R_GOTPC_HI_SLO, + R_M32R_GOTPC_LO): New relocs. + 2003-12-06 Alan Modra From Jan Beulich diff --git a/include/elf/m32r.h b/include/elf/m32r.h index 2663f3abb3..709d792344 100644 --- a/include/elf/m32r.h +++ b/include/elf/m32r.h @@ -25,18 +25,48 @@ /* Relocations. */ START_RELOC_NUMBERS (elf_m32r_reloc_type) RELOC_NUMBER (R_M32R_NONE, 0) - RELOC_NUMBER (R_M32R_16, 1) - RELOC_NUMBER (R_M32R_32, 2) - RELOC_NUMBER (R_M32R_24, 3) - RELOC_NUMBER (R_M32R_10_PCREL, 4) - RELOC_NUMBER (R_M32R_18_PCREL, 5) - RELOC_NUMBER (R_M32R_26_PCREL, 6) - RELOC_NUMBER (R_M32R_HI16_ULO, 7) - RELOC_NUMBER (R_M32R_HI16_SLO, 8) - RELOC_NUMBER (R_M32R_LO16, 9) - RELOC_NUMBER (R_M32R_SDA16, 10) - RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11) - RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12) + /* REL relocations */ + RELOC_NUMBER (R_M32R_16, 1) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_32, 2) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_24, 3) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_10_PCREL, 4) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_18_PCREL, 5) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_26_PCREL, 6) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_HI16_ULO, 7) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_HI16_SLO, 8) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_LO16, 9) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_SDA16, 10) /* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)/* For backwards compatibility. */ + RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12) /* For backwards compatibility. */ + + /* RELA relocations */ + RELOC_NUMBER (R_M32R_16_RELA, 33) + RELOC_NUMBER (R_M32R_32_RELA, 34) + RELOC_NUMBER (R_M32R_24_RELA, 35) + RELOC_NUMBER (R_M32R_10_PCREL_RELA, 36) + RELOC_NUMBER (R_M32R_18_PCREL_RELA, 37) + RELOC_NUMBER (R_M32R_26_PCREL_RELA, 38) + RELOC_NUMBER (R_M32R_HI16_ULO_RELA, 39) + RELOC_NUMBER (R_M32R_HI16_SLO_RELA, 40) + RELOC_NUMBER (R_M32R_LO16_RELA, 41) + RELOC_NUMBER (R_M32R_SDA16_RELA, 42) + RELOC_NUMBER (R_M32R_RELA_GNU_VTINHERIT, 43) + RELOC_NUMBER (R_M32R_RELA_GNU_VTENTRY, 44) + + RELOC_NUMBER (R_M32R_GOT24, 48) + RELOC_NUMBER (R_M32R_26_PLTREL, 49) + RELOC_NUMBER (R_M32R_COPY, 50) + RELOC_NUMBER (R_M32R_GLOB_DAT, 51) + RELOC_NUMBER (R_M32R_JMP_SLOT, 52) + RELOC_NUMBER (R_M32R_RELATIVE, 53) + RELOC_NUMBER (R_M32R_GOTOFF, 54) + RELOC_NUMBER (R_M32R_GOTPC24, 55) + RELOC_NUMBER (R_M32R_GOT16_HI_ULO, 56) + RELOC_NUMBER (R_M32R_GOT16_HI_SLO, 57) + RELOC_NUMBER (R_M32R_GOT16_LO, 58) + RELOC_NUMBER (R_M32R_GOTPC_HI_ULO, 59) + RELOC_NUMBER (R_M32R_GOTPC_HI_SLO, 60) + RELOC_NUMBER (R_M32R_GOTPC_LO, 61) END_RELOC_NUMBERS (R_M32R_max) /* Processor specific section indices. These sections do not actually diff --git a/ld/ChangeLog b/ld/ChangeLog index dc9fc37965..2666cbf6a3 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,15 @@ +2003-12-19 Kazuhiro Inaoka + + Add m32r-linux and PIC support. Add new ABI that uses RELA. + * Makefile.am: Added em32rlelf.c, em32relf_linux.c, + em32rlelf_linux.c. + * Makefile.in: Regenerate. + * configure.tgt (m32r*-*-linux*, m32r*le-*-linux*, m32r*le-*-*):Added. + * emulparams/m32relf_linux.sh: Added. + * emulparams/m32rlelf.sh: Ditto. + * emulparams/m32rlelf_linux.sh: Ditto. + * NEWS: Mention support m32r Linux. + 2003-12-18 Eric Youngdale Nick Clifton diff --git a/ld/Makefile.am b/ld/Makefile.am index bff548f6e0..2c59289258 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -230,6 +230,9 @@ ALL_EMULATIONS = \ ei386pe_posix.o \ elnk960.o \ em32relf.o \ + em32rlelf.o \ + em32relf_linux.o \ + em32rlelf_linux.o \ em68hc11elf.o \ em68hc11elfb.o \ em68hc12elf.o \ @@ -603,6 +606,15 @@ eelf32mcore.c: $(srcdir)/emulparams/elf32mcore.sh \ em32relf.c: $(srcdir)/emulparams/m32relf.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} m32relf "$(tdir_m32r)" +em32rlelf.c: $(srcdir)/emulparams/m32rlelf.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} m32rlelf "$(tdir_m32rlelf)" +em32relf_linux.c: $(srcdir)/emulparams/m32relf_linux.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} m32relf_linux "$(tdir_m32relf_linux)" +em32rlelf_linux.c: $(srcdir)/emulparams/m32rlelf_linux.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} m32rlelf_linux "$(tdir_m32rlelf_linux)" eelf32_sparc.c: $(srcdir)/emulparams/elf32_sparc.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32_sparc "$(tdir_elf32_sparc)" diff --git a/ld/Makefile.in b/ld/Makefile.in index 0ee5342bb7..147298208e 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -1,4 +1,4 @@ -# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am +# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am # Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation @@ -344,6 +344,9 @@ ALL_EMULATIONS = \ ei386pe_posix.o \ elnk960.o \ em32relf.o \ + em32rlelf.o \ + em32relf_linux.o \ + em32rlelf_linux.o \ em68hc11elf.o \ em68hc11elfb.o \ em68hc12elf.o \ @@ -598,7 +601,7 @@ deffilep.c ldgram.c ldlex.c DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best SOURCES = $(ld_new_SOURCES) $(EXTRA_ld_new_SOURCES) OBJECTS = $(ld_new_OBJECTS) @@ -1080,7 +1083,7 @@ distclean-generic: -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES) maintainer-clean-generic: - -test -z "ldlex.cdeffilep.hdeffilep.cldgram.hldgram.c$(MAINTAINERCLEANFILES)" || rm -f ldlex.c deffilep.h deffilep.c ldgram.h ldgram.c $(MAINTAINERCLEANFILES) + -test -z "ldlexldeffilephdeffilepcldgramhldgramc$(MAINTAINERCLEANFILES)" || rm -f ldlexl deffileph deffilepc ldgramh ldgramc $(MAINTAINERCLEANFILES) mostlyclean-am: mostlyclean-hdr mostlyclean-noinstPROGRAMS \ mostlyclean-compile mostlyclean-libtool \ mostlyclean-aminfo mostlyclean-tags mostlyclean-generic \ @@ -1329,6 +1332,15 @@ eelf32mcore.c: $(srcdir)/emulparams/elf32mcore.sh \ em32relf.c: $(srcdir)/emulparams/m32relf.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} m32relf "$(tdir_m32r)" +em32rlelf.c: $(srcdir)/emulparams/m32rlelf.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} m32rlelf "$(tdir_m32rlelf)" +em32relf_linux.c: $(srcdir)/emulparams/m32relf_linux.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} m32relf_linux "$(tdir_m32relf_linux)" +em32rlelf_linux.c: $(srcdir)/emulparams/m32rlelf_linux.sh \ + $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} + ${GENSCRIPTS} m32rlelf_linux "$(tdir_m32rlelf_linux)" eelf32_sparc.c: $(srcdir)/emulparams/elf32_sparc.sh \ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} ${GENSCRIPTS} elf32_sparc "$(tdir_elf32_sparc)" diff --git a/ld/NEWS b/ld/NEWS index 74e71319db..0db0d1808b 100644 --- a/ld/NEWS +++ b/ld/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* m32r Linux (ELF) support added by Renesas. + * Improved linker's handling of unresolved symbols. The switch --unresolved-symbols= has been added to tell the linker when it should report them and the switch --warn-unresolved-symbols has been added to diff --git a/ld/configure.tgt b/ld/configure.tgt index 29c2a7e597..b9183fb495 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -115,7 +115,10 @@ ia64-*-freebsd* | ia64-*-kfreebsd*-gnu) ia64-*-netbsd*) targ_emul=elf64_ia64 ;; ia64-*-linux*) targ_emul=elf64_ia64 ;; ia64-*-aix*) targ_emul=elf64_aix ;; -m32r-*-*) targ_emul=m32relf ;; +m32r*le-*-elf*) targ_emul=m32rlelf ;; +m32r*-*-elf*) targ_emul=m32relf ;; +m32r*le-*-linux-gnu*) targ_emul=m32rlelf_linux ;; +m32r*-*-linux-gnu*) targ_emul=m32relf_linux ;; m68hc11-*-*|m6811-*-*) targ_emul=m68hc11elf targ_extra_emuls="m68hc11elfb m68hc12elf m68hc12elfb" ;; m68hc12-*-*|m6812-*-*) targ_emul=m68hc12elf diff --git a/ld/emulparams/m32relf_linux.sh b/ld/emulparams/m32relf_linux.sh new file mode 100644 index 0000000000..814c91a792 --- /dev/null +++ b/ld/emulparams/m32relf_linux.sh @@ -0,0 +1,13 @@ +MACHINE= +SCRIPT_NAME=elf +TEMPLATE_NAME=elf32 +OUTPUT_FORMAT="elf32-m32r-linux" +TEXT_START_ADDR=0x1000 +ARCH=m32r +MACHINE= +MAXPAGESIZE=0x1000 + +# Hmmm, there's got to be a better way. This sets the stack to the +# top of simulator memory (32MB). +OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = 0x2000000);' +GENERATE_SHLIB_SCRIPT=yes diff --git a/ld/emulparams/m32rlelf.sh b/ld/emulparams/m32rlelf.sh new file mode 100644 index 0000000000..2d4488b57f --- /dev/null +++ b/ld/emulparams/m32rlelf.sh @@ -0,0 +1,2 @@ +. ${srcdir}/emulparams/m32relf.sh +OUTPUT_FORMAT="elf32-m32rle" diff --git a/ld/emulparams/m32rlelf_linux.sh b/ld/emulparams/m32rlelf_linux.sh new file mode 100644 index 0000000000..6d16a1ccd3 --- /dev/null +++ b/ld/emulparams/m32rlelf_linux.sh @@ -0,0 +1,2 @@ +. ${srcdir}/emulparams/m32relf_linux.sh +OUTPUT_FORMAT="elf32-m32rle-linux" diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index f95071fdf5..c2d7584197 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,7 @@ +2003-12-19 Kazuhiro Inaoka + + * sim-core.c (sim_core_trans_addr): Added for m32r-linux-run. + 2003-11-22 Kazu Hirata * sim-options.c (standard_options): Fix the names of H8 diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c index 586c25e4fa..65c28d733b 100644 --- a/sim/common/sim-core.c +++ b/sim/common/sim-core.c @@ -801,6 +801,25 @@ sim_core_xor_write_buffer (SIM_DESC sd, } #endif +#if EXTERN_SIM_CORE_P +void * +sim_core_trans_addr (SIM_DESC sd, + sim_cpu *cpu, + unsigned map, + address_word addr) +{ + sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common); + sim_core_mapping *mapping = + sim_core_find_mapping (core, map, + addr, /*nr-bytes*/1, + write_transfer, + 0 /*dont-abort*/, NULL, NULL_CIA); + if (mapping == NULL) + return NULL; + return sim_core_translate(mapping, addr); +} +#endif + /* define the read/write 1/2/4/8/16/word functions */ diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 409645242e..92cbd04b90 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,15 @@ +2003-12-19 Kazuhiro Inaoka + + * configure.in: Changed for dummy simulator of m32r-linux. + * configure: Regenerate. + * Makefile.in: Added traps-linux.o for dummy simulator of m32r-linux. + * traps-linux.c: Added for dummy simulator of m32r-linux. + * syscall.h: Ditto. + * sim-if.c (sim_create_inferior): Changed to setup SP for dummy + simulator for m32r-linux. + * sim-main.h (M32R_DEFAULT_MEM_SIZE): Changed for dummy simulator of + m32r-linux. + 2003-12-11 Kazuhiro Inaoka * Makefile.in: Add support for new machine m32r2. diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index ee3f7e890c..eb29ab188b 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -23,6 +23,7 @@ M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o +TRAPS_OBJ = @traps_obj@ CONFIG_DEVICES = dv-sockser.o CONFIG_DEVICES = @@ -40,7 +41,8 @@ SIM_OBJS = \ $(M32R_OBJS) \ $(M32RX_OBJS) \ $(M32R2_OBJS) \ - traps.o devices.o \ + $(TRAPS_OBJ) \ + devices.o \ $(CONFIG_DEVICES) # Extra headers included by sim-main.h. @@ -48,7 +50,7 @@ SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) \ arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h -SIM_EXTRA_CFLAGS = +SIM_EXTRA_CFLAGS = @sim_extra_cflags@ SIM_RUN_OBJS = nrun.o SIM_EXTRA_CLEAN = m32r-clean @@ -65,6 +67,7 @@ sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h arch.o: arch.c $(SIM_MAIN_DEPS) traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) +traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS) devices.o: devices.c $(SIM_MAIN_DEPS) # M32R objs diff --git a/sim/m32r/configure b/sim/m32r/configure index 4a55bc182a..6e8b0cd12e 100755 --- a/sim/m32r/configure +++ b/sim/m32r/configure @@ -3848,6 +3848,20 @@ fi + case "${target_alias}" in + m32r*-linux*) + traps_obj=traps-linux.o + sim_extra_cflags="-DM32R_LINUX" + ;; + *) + traps_obj=traps.o + sim_extra_cflags="-DM32R_ELF" + ;; + esac + + + + trap '' 1 2 15 @@ -4061,6 +4075,8 @@ s%@EXEEXT@%$EXEEXT%g s%@CGEN_MAINT@%$CGEN_MAINT%g s%@cgendir@%$cgendir%g s%@cgen@%$cgen%g +s%@traps_obj@%$traps_obj%g +s%@sim_extra_cflags@%$sim_extra_cflags%g CEOF EOF diff --git a/sim/m32r/configure.in b/sim/m32r/configure.in index f598f29f09..12857b9a19 100644 --- a/sim/m32r/configure.in +++ b/sim/m32r/configure.in @@ -14,4 +14,18 @@ SIM_AC_OPTION_ENVIRONMENT SIM_AC_OPTION_INLINE() SIM_AC_OPTION_CGEN_MAINT + case "${target_alias}" in + m32r*-linux*) + traps_obj=traps-linux.o + sim_extra_cflags="-DM32R_LINUX" + ;; + *) + traps_obj=traps.o + sim_extra_cflags="-DM32R_ELF" + ;; + esac +AC_SUBST(traps_obj) +AC_SUBST(sim_extra_cflags) + + SIM_AC_OUTPUT diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c index 749c79e999..f8bbece7b8 100644 --- a/sim/m32r/sim-if.c +++ b/sim/m32r/sim-if.c @@ -214,6 +214,13 @@ sim_create_inferior (sd, abfd, argv, envp) addr = 0; sim_pc_set (current_cpu, addr); +#ifdef M32R_LINUX + m32rbf_h_cr_set (current_cpu, + m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000); + m32rbf_h_cr_set (current_cpu, + m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000); +#endif + #if 0 STATE_ARGV (sd) = sim_copy_argv (argv); STATE_ENVP (sd) = sim_copy_argv (envp); diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h index becfb62841..2cbb40b99b 100644 --- a/sim/m32r/sim-main.h +++ b/sim/m32r/sim-main.h @@ -85,6 +85,10 @@ m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ (TRANSFER), (ERROR)) /* Default memory size. */ +#ifdef M32R_LINUX +#define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */ +#else #define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */ +#endif #endif /* SIM_MAIN_H */ diff --git a/sim/m32r/syscall.h b/sim/m32r/syscall.h new file mode 100644 index 0000000000..7762aca7ea --- /dev/null +++ b/sim/m32r/syscall.h @@ -0,0 +1,195 @@ +/* + * This file contains the system call numbers. + */ + +#define __NR_exit 1 +#define __NR_fork 2 +#define __NR_read 3 +#define __NR_write 4 +#define __NR_open 5 +#define __NR_close 6 +#define __NR_waitpid 7 +#define __NR_creat 8 +#define __NR_link 9 +#define __NR_unlink 10 +#define __NR_execve 11 +#define __NR_chdir 12 +#define __NR_time 13 +#define __NR_mknod 14 +#define __NR_chmod 15 +#define __NR_lchown 16 +#define __NR_break 17 +#define __NR_oldstat 18 +#define __NR_lseek 19 +#define __NR_getpid 20 +#define __NR_mount 21 +#define __NR_umount 22 +#define __NR_setuid 23 +#define __NR_getuid 24 +#define __NR_stime 25 +#define __NR_ptrace 26 +#define __NR_alarm 27 +#define __NR_oldfstat 28 +#define __NR_pause 29 +#define __NR_utime 30 +#define __NR_stty 31 +#define __NR_gtty 32 +#define __NR_access 33 +#define __NR_nice 34 +#define __NR_ftime 35 +#define __NR_sync 36 +#define __NR_kill 37 +#define __NR_rename 38 +#define __NR_mkdir 39 +#define __NR_rmdir 40 +#define __NR_dup 41 +#define __NR_pipe 42 +#define __NR_times 43 +#define __NR_prof 44 +#define __NR_brk 45 +#define __NR_setgid 46 +#define __NR_getgid 47 +#define __NR_signal 48 +#define __NR_geteuid 49 +#define __NR_getegid 50 +#define __NR_acct 51 +#define __NR_umount2 52 +#define __NR_lock 53 +#define __NR_ioctl 54 +#define __NR_fcntl 55 +#define __NR_mpx 56 +#define __NR_setpgid 57 +#define __NR_ulimit 58 +#define __NR_oldolduname 59 +#define __NR_umask 60 +#define __NR_chroot 61 +#define __NR_ustat 62 +#define __NR_dup2 63 +#define __NR_getppid 64 +#define __NR_getpgrp 65 +#define __NR_setsid 66 +#define __NR_sigaction 67 +#define __NR_sgetmask 68 +#define __NR_ssetmask 69 +#define __NR_setreuid 70 +#define __NR_setregid 71 +#define __NR_sigsuspend 72 +#define __NR_sigpending 73 +#define __NR_sethostname 74 +#define __NR_setrlimit 75 +#define __NR_getrlimit 76 +#define __NR_getrusage 77 +#define __NR_gettimeofday 78 +#define __NR_settimeofday 79 +#define __NR_getgroups 80 +#define __NR_setgroups 81 +#define __NR_select 82 +#define __NR_symlink 83 +#define __NR_oldlstat 84 +#define __NR_readlink 85 +#define __NR_uselib 86 +#define __NR_swapon 87 +#define __NR_reboot 88 +#define __NR_readdir 89 +#define __NR_mmap 90 +#define __NR_munmap 91 +#define __NR_truncate 92 +#define __NR_ftruncate 93 +#define __NR_fchmod 94 +#define __NR_fchown 95 +#define __NR_getpriority 96 +#define __NR_setpriority 97 +#define __NR_profil 98 +#define __NR_statfs 99 +#define __NR_fstatfs 100 +#define __NR_ioperm 101 +#define __NR_socketcall 102 +#define __NR_syslog 103 +#define __NR_setitimer 104 +#define __NR_getitimer 105 +#define __NR_stat 106 +#define __NR_lstat 107 +#define __NR_fstat 108 +#define __NR_olduname 109 +#define __NR_iopl 110 +#define __NR_vhangup 111 +#define __NR_idle 112 +#define __NR_vm86old 113 +#define __NR_wait4 114 +#define __NR_swapoff 115 +#define __NR_sysinfo 116 +#define __NR_ipc 117 +#define __NR_fsync 118 +#define __NR_sigreturn 119 +#define __NR_clone 120 +#define __NR_setdomainname 121 +#define __NR_uname 122 +#define __NR_modify_ldt 123 +#define __NR_adjtimex 124 +#define __NR_mprotect 125 +#define __NR_sigprocmask 126 +#define __NR_create_module 127 +#define __NR_init_module 128 +#define __NR_delete_module 129 +#define __NR_get_kernel_syms 130 +#define __NR_quotactl 131 +#define __NR_getpgid 132 +#define __NR_fchdir 133 +#define __NR_bdflush 134 +#define __NR_sysfs 135 +#define __NR_personality 136 +#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ +#define __NR_setfsuid 138 +#define __NR_setfsgid 139 +#define __NR__llseek 140 +#define __NR_getdents 141 +#define __NR__newselect 142 +#define __NR_flock 143 +#define __NR_msync 144 +#define __NR_readv 145 +#define __NR_writev 146 +#define __NR_getsid 147 +#define __NR_fdatasync 148 +#define __NR__sysctl 149 +#define __NR_mlock 150 +#define __NR_munlock 151 +#define __NR_mlockall 152 +#define __NR_munlockall 153 +#define __NR_sched_setparam 154 +#define __NR_sched_getparam 155 +#define __NR_sched_setscheduler 156 +#define __NR_sched_getscheduler 157 +#define __NR_sched_yield 158 +#define __NR_sched_get_priority_max 159 +#define __NR_sched_get_priority_min 160 +#define __NR_sched_rr_get_interval 161 +#define __NR_nanosleep 162 +#define __NR_mremap 163 +#define __NR_setresuid 164 +#define __NR_getresuid 165 +#define __NR_vm86 166 +#define __NR_query_module 167 +#define __NR_poll 168 +#define __NR_nfsservctl 169 +#define __NR_setresgid 170 +#define __NR_getresgid 171 +#define __NR_prctl 172 +#define __NR_rt_sigreturn 173 +#define __NR_rt_sigaction 174 +#define __NR_rt_sigprocmask 175 +#define __NR_rt_sigpending 176 +#define __NR_rt_sigtimedwait 177 +#define __NR_rt_sigqueueinfo 178 +#define __NR_rt_sigsuspend 179 +#define __NR_pread 180 +#define __NR_pwrite 181 +#define __NR_chown 182 +#define __NR_getcwd 183 +#define __NR_capget 184 +#define __NR_capset 185 +#define __NR_sigaltstack 186 +#define __NR_sendfile 187 +#define __NR_getpmsg 188 /* some people actually want streams */ +#define __NR_putpmsg 189 /* some people actually want streams */ +#define __NR_vfork 190 + diff --git a/sim/m32r/traps-linux.c b/sim/m32r/traps-linux.c new file mode 100644 index 0000000000..55a97a514d --- /dev/null +++ b/sim/m32r/traps-linux.c @@ -0,0 +1,1392 @@ +/* m32r exception, interrupt, and trap (EIT) support + Copyright (C) 1998, 2003 Free Software Foundation, Inc. + Contributed by Renesas. + + This file is part of GDB, the GNU debugger. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "sim-main.h" +#include "syscall.h" +#include "targ-vals.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TRAP_ELF_SYSCALL 0 +#define TRAP_LINUX_SYSCALL 2 +#define TRAP_FLUSH_CACHE 12 + +/* The semantic code invokes this for invalid (unrecognized) instructions. */ + +SEM_PC +sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) +{ + SIM_DESC sd = CPU_STATE (current_cpu); + +#if 0 + if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) + { + h_bsm_set (current_cpu, h_sm_get (current_cpu)); + h_bie_set (current_cpu, h_ie_get (current_cpu)); + h_bcond_set (current_cpu, h_cond_get (current_cpu)); + /* sm not changed */ + h_ie_set (current_cpu, 0); + h_cond_set (current_cpu, 0); + + h_bpc_set (current_cpu, cia); + + sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, + EIT_RSVD_INSN_ADDR); + } + else +#endif + sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); + return vpc; +} + +/* Process an address exception. */ + +void +m32r_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, + unsigned int map, int nr_bytes, address_word addr, + transfer_type transfer, sim_core_signals sig) +{ + if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) + { + m32rbf_h_cr_set (current_cpu, H_CR_BBPC, + m32rbf_h_cr_get (current_cpu, H_CR_BPC)); + if (MACH_NUM (CPU_MACH (current_cpu)) == MACH_M32R) + { + m32rbf_h_bpsw_set (current_cpu, m32rbf_h_psw_get (current_cpu)); + /* sm not changed */ + m32rbf_h_psw_set (current_cpu, m32rbf_h_psw_get (current_cpu) & 0x80); + } + else if (MACH_NUM (CPU_MACH (current_cpu)) == MACH_M32RX) + { + m32rxf_h_bpsw_set (current_cpu, m32rxf_h_psw_get (current_cpu)); + /* sm not changed */ + m32rxf_h_psw_set (current_cpu, m32rxf_h_psw_get (current_cpu) & 0x80); + } + else + { + m32r2f_h_bpsw_set (current_cpu, m32r2f_h_psw_get (current_cpu)); + /* sm not changed */ + m32r2f_h_psw_set (current_cpu, m32r2f_h_psw_get (current_cpu) & 0x80); + } + m32rbf_h_cr_set (current_cpu, H_CR_BPC, cia); + + sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, + EIT_ADDR_EXCP_ADDR); + } + else + sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, + transfer, sig); +} + +/* Read/write functions for system call interface. */ + +static int +syscall_read_mem (host_callback *cb, struct cb_syscall *sc, + unsigned long taddr, char *buf, int bytes) +{ + SIM_DESC sd = (SIM_DESC) sc->p1; + SIM_CPU *cpu = (SIM_CPU *) sc->p2; + + return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); +} + +static int +syscall_write_mem (host_callback *cb, struct cb_syscall *sc, + unsigned long taddr, const char *buf, int bytes) +{ + SIM_DESC sd = (SIM_DESC) sc->p1; + SIM_CPU *cpu = (SIM_CPU *) sc->p2; + + return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); +} + +/* Translate target's address to host's address. */ + +static void * +t2h_addr (host_callback *cb, struct cb_syscall *sc, + unsigned long taddr) +{ + extern sim_core_trans_addr (SIM_DESC, sim_cpu *, unsigned, address_word); + void *addr; + SIM_DESC sd = (SIM_DESC) sc->p1; + SIM_CPU *cpu = (SIM_CPU *) sc->p2; + + if (taddr == 0) + return NULL; + + return sim_core_trans_addr (sd, cpu, read_map, taddr); +} + +static unsigned int +conv_endian (unsigned int tvalue) +{ + unsigned int hvalue; + unsigned int t1, t2, t3, t4; + + if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN) + { + t1 = tvalue & 0xff000000; + t2 = tvalue & 0x00ff0000; + t3 = tvalue & 0x0000ff00; + t4 = tvalue & 0x000000ff; + + hvalue = t1 >> 24; + hvalue += t2 >> 8; + hvalue += t3 << 8; + hvalue += t4 << 24; + } + else + hvalue = tvalue; + + return hvalue; +} + +static unsigned short +conv_endian16 (unsigned short tvalue) +{ + unsigned short hvalue; + unsigned short t1, t2; + + if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN) + { + t1 = tvalue & 0xff00; + t2 = tvalue & 0x00ff; + + hvalue = t1 >> 8; + hvalue += t2 << 8; + } + else + hvalue = tvalue; + + return hvalue; +} + +static void +translate_endian(void *addr, size_t size) +{ + unsigned int *p = (unsigned int *) addr; + int i; + + for (i = 0; i <= size - 4; i += 4,p++) + *p = conv_endian(*p); + + if (i <= size - 2) + *((unsigned short *) p) = conv_endian16(*((unsigned short *) p)); +} + +/* Trap support. + The result is the pc address to continue at. + Preprocessing like saving the various registers has already been done. */ + +USI +m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num) +{ + SIM_DESC sd = CPU_STATE (current_cpu); + host_callback *cb = STATE_CALLBACK (sd); + +#ifdef SIM_HAVE_BREAKPOINTS + /* Check for breakpoints "owned" by the simulator first, regardless + of --environment. */ + if (num == TRAP_BREAKPOINT) + { + /* First try sim-break.c. If it's a breakpoint the simulator "owns" + it doesn't return. Otherwise it returns and let's us try. */ + sim_handle_breakpoint (sd, current_cpu, pc); + /* Fall through. */ + } +#endif + + switch (num) + { + case TRAP_ELF_SYSCALL : + { + CB_SYSCALL s; + + CB_SYSCALL_INIT (&s); + s.func = m32rbf_h_gr_get (current_cpu, 0); + s.arg1 = m32rbf_h_gr_get (current_cpu, 1); + s.arg2 = m32rbf_h_gr_get (current_cpu, 2); + s.arg3 = m32rbf_h_gr_get (current_cpu, 3); + + if (s.func == TARGET_SYS_exit) + { + sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1); + } + + s.p1 = (PTR) sd; + s.p2 = (PTR) current_cpu; + s.read_mem = syscall_read_mem; + s.write_mem = syscall_write_mem; + cb_syscall (cb, &s); + m32rbf_h_gr_set (current_cpu, 2, s.errcode); + m32rbf_h_gr_set (current_cpu, 0, s.result); + m32rbf_h_gr_set (current_cpu, 1, s.result2); + break; + } + + case TRAP_LINUX_SYSCALL : + { + CB_SYSCALL s; + unsigned int func, arg1, arg2, arg3, arg4, arg5, arg6, arg7; + int result, result2, errcode; + + if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) + { + /* The new pc is the trap vector entry. + We assume there's a branch there to some handler. + Use cr5 as EVB (EIT Vector Base) register. */ + USI new_pc = m32rbf_h_cr_get (current_cpu, 5) + 0x40 + num * 4; + return new_pc; + } + + func = m32rbf_h_gr_get (current_cpu, 7); + arg1 = m32rbf_h_gr_get (current_cpu, 0); + arg2 = m32rbf_h_gr_get (current_cpu, 1); + arg3 = m32rbf_h_gr_get (current_cpu, 2); + arg4 = m32rbf_h_gr_get (current_cpu, 3); + arg5 = m32rbf_h_gr_get (current_cpu, 4); + arg6 = m32rbf_h_gr_get (current_cpu, 5); + arg7 = m32rbf_h_gr_get (current_cpu, 6); + + CB_SYSCALL_INIT (&s); + s.func = func; + s.arg1 = arg1; + s.arg2 = arg2; + s.arg3 = arg3; + + s.p1 = (PTR) sd; + s.p2 = (PTR) current_cpu; + s.read_mem = syscall_read_mem; + s.write_mem = syscall_write_mem; + + result = 0; + result2 = 0; + errcode = 0; + + switch (func) + { + case __NR_exit: + sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, arg1); + break; + + case __NR_read: + result = read(arg1, t2h_addr(cb, &s, arg2), arg3); + errcode = errno; + break; + + case __NR_write: + result = write(arg1, t2h_addr(cb, &s, arg2), arg3); + errcode = errno; + break; + + case __NR_open: + result = open((char *) t2h_addr(cb, &s, arg1), arg2, arg3); + errcode = errno; + break; + + case __NR_close: + result = close(arg1); + errcode = errno; + break; + + case __NR_creat: + result = creat((char *) t2h_addr(cb, &s, arg1), arg2); + errcode = errno; + break; + + case __NR_link: + result = link((char *) t2h_addr(cb, &s, arg1), + (char *) t2h_addr(cb, &s, arg2)); + errcode = errno; + break; + + case __NR_unlink: + result = unlink((char *) t2h_addr(cb, &s, arg1)); + errcode = errno; + break; + + case __NR_chdir: + result = chdir((char *) t2h_addr(cb, &s, arg1)); + errcode = errno; + break; + + case __NR_time: + { + time_t t; + + if (arg1 == 0) + { + result = (int) time(NULL); + errcode = errno; + } + else + { + result = (int) time(&t); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &t, sizeof(t)); + if ((s.write_mem) (cb, &s, arg1, (char *) &t, sizeof(t)) != sizeof(t)) + { + result = -1; + errcode = EINVAL; + } + } + } + break; + + case __NR_mknod: + result = mknod((char *) t2h_addr(cb, &s, arg1), + (mode_t) arg2, (dev_t) arg3); + errcode = errno; + break; + + case __NR_chmod: + result = chmod((char *) t2h_addr(cb, &s, arg1), (mode_t) arg2); + errcode = errno; + break; + + case __NR_lchown: + result = lchown((char *) t2h_addr(cb, &s, arg1), + (uid_t) arg2, (gid_t) arg3); + errcode = errno; + break; + + case __NR_lseek: + result = (int) lseek(arg1, (off_t) arg2, arg3); + errcode = errno; + break; + + case __NR_getpid: + result = getpid(); + errcode = errno; + break; + + case __NR_getuid: + result = getuid(); + errcode = errno; + break; + + case __NR_utime: + { + struct utimbuf buf; + + if (arg2 == 0) + { + result = utime((char *) t2h_addr(cb, &s, arg1), NULL); + errcode = errno; + } + else + { + buf = *((struct utimbuf *) t2h_addr(cb, &s, arg2)); + translate_endian((void *) &buf, sizeof(buf)); + result = utime((char *) t2h_addr(cb, &s, arg1), &buf); + errcode = errno; + } + } + break; + + case __NR_access: + result = access((char *) t2h_addr(cb, &s, arg1), arg2); + errcode = errno; + break; + + case __NR_ftime: + { + struct timeb t; + + result = ftime(&t); + errcode = errno; + + if (result != 0) + break; + + t.time = conv_endian(t.time); + t.millitm = conv_endian16(t.millitm); + t.timezone = conv_endian16(t.timezone); + t.dstflag = conv_endian16(t.dstflag); + if ((s.write_mem) (cb, &s, arg1, (char *) &t, sizeof(t)) + != sizeof(t)) + { + result = -1; + errcode = EINVAL; + } + } + + case __NR_sync: + sync(); + result = 0; + break; + + case __NR_rename: + result = rename((char *) t2h_addr(cb, &s, arg1), + (char *) t2h_addr(cb, &s, arg2)); + errcode = errno; + break; + + case __NR_mkdir: + result = mkdir((char *) t2h_addr(cb, &s, arg1), arg2); + errcode = errno; + break; + + case __NR_rmdir: + result = rmdir((char *) t2h_addr(cb, &s, arg1)); + errcode = errno; + break; + + case __NR_dup: + result = dup(arg1); + errcode = errno; + break; + + case __NR_brk: + result = brk((void *) arg1); + errcode = errno; + //result = arg1; + break; + + case __NR_getgid: + result = getgid(); + errcode = errno; + break; + + case __NR_geteuid: + result = geteuid(); + errcode = errno; + break; + + case __NR_getegid: + result = getegid(); + errcode = errno; + break; + + case __NR_ioctl: + result = ioctl(arg1, arg2, arg3); + errcode = errno; + break; + + case __NR_fcntl: + result = fcntl(arg1, arg2, arg3); + errcode = errno; + break; + + case __NR_ustat: + { + struct ustat ubuf; + + result = ustat(arg1, &ubuf); + errcode = errno; + + if (result != 0) + break; + + ubuf.f_tfree = conv_endian(ubuf.f_tfree); + ubuf.f_tinode = conv_endian(ubuf.f_tinode); + if ((s.write_mem) (cb, &s, arg2, (char *) &ubuf, sizeof(ubuf)) + != sizeof(ubuf)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_dup2: + result = dup2(arg1, arg2); + errcode = errno; + break; + + case __NR_getppid: + result = getppid(); + errcode = errno; + break; + + case __NR_getpgrp: + result = getpgrp(); + errcode = errno; + break; + + case __NR_getrlimit: + { + struct rlimit rlim; + + result = getrlimit(arg1, &rlim); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &rlim, sizeof(rlim)); + if ((s.write_mem) (cb, &s, arg2, (char *) &rlim, sizeof(rlim)) + != sizeof(rlim)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_getrusage: + { + struct rusage usage; + + result = getrusage(arg1, &usage); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &usage, sizeof(usage)); + if ((s.write_mem) (cb, &s, arg2, (char *) &usage, sizeof(usage)) + != sizeof(usage)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_gettimeofday: + { + struct timeval tv; + struct timezone tz; + + result = gettimeofday(&tv, &tz); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &tv, sizeof(tv)); + if ((s.write_mem) (cb, &s, arg1, (char *) &tv, sizeof(tv)) + != sizeof(tv)) + { + result = -1; + errcode = EINVAL; + } + + translate_endian((void *) &tz, sizeof(tz)); + if ((s.write_mem) (cb, &s, arg2, (char *) &tz, sizeof(tz)) + != sizeof(tz)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_getgroups: + { + gid_t *list; + + if (arg1 > 0) + list = (gid_t *) malloc(arg1 * sizeof(gid_t)); + + result = getgroups(arg1, list); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) list, arg1 * sizeof(gid_t)); + if (arg1 > 0) + if ((s.write_mem) (cb, &s, arg2, (char *) list, arg1 * sizeof(gid_t)) + != arg1 * sizeof(gid_t)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_select: + { + int n; + fd_set readfds; + fd_set *treadfdsp; + fd_set *hreadfdsp; + fd_set writefds; + fd_set *twritefdsp; + fd_set *hwritefdsp; + fd_set exceptfds; + fd_set *texceptfdsp; + fd_set *hexceptfdsp; + struct timeval *ttimeoutp; + struct timeval timeout; + + n = arg1; + + treadfdsp = (fd_set *) arg2; + if (treadfdsp != NULL) + { + readfds = *((fd_set *) t2h_addr(cb, &s, (unsigned int) treadfdsp)); + translate_endian((void *) &readfds, sizeof(readfds)); + hreadfdsp = &readfds; + } + else + hreadfdsp = NULL; + + twritefdsp = (fd_set *) arg3; + if (twritefdsp != NULL) + { + writefds = *((fd_set *) t2h_addr(cb, &s, (unsigned int) twritefdsp)); + translate_endian((void *) &writefds, sizeof(writefds)); + hwritefdsp = &writefds; + } + else + hwritefdsp = NULL; + + texceptfdsp = (fd_set *) arg4; + if (texceptfdsp != NULL) + { + exceptfds = *((fd_set *) t2h_addr(cb, &s, (unsigned int) texceptfdsp)); + translate_endian((void *) &exceptfds, sizeof(exceptfds)); + hexceptfdsp = &exceptfds; + } + else + hexceptfdsp = NULL; + + ttimeoutp = (struct timeval *) arg5; + timeout = *((struct timeval *) t2h_addr(cb, &s, (unsigned int) ttimeoutp)); + translate_endian((void *) &timeout, sizeof(timeout)); + + result = select(n, hreadfdsp, hwritefdsp, hexceptfdsp, &timeout); + errcode = errno; + + if (result != 0) + break; + + if (treadfdsp != NULL) + { + translate_endian((void *) &readfds, sizeof(readfds)); + if ((s.write_mem) (cb, &s, (unsigned long) treadfdsp, + (char *) &readfds, sizeof(readfds)) != sizeof(readfds)) + { + result = -1; + errcode = EINVAL; + } + } + + if (twritefdsp != NULL) + { + translate_endian((void *) &writefds, sizeof(writefds)); + if ((s.write_mem) (cb, &s, (unsigned long) twritefdsp, + (char *) &writefds, sizeof(writefds)) != sizeof(writefds)) + { + result = -1; + errcode = EINVAL; + } + } + + if (texceptfdsp != NULL) + { + translate_endian((void *) &exceptfds, sizeof(exceptfds)); + if ((s.write_mem) (cb, &s, (unsigned long) texceptfdsp, + (char *) &exceptfds, sizeof(exceptfds)) != sizeof(exceptfds)) + { + result = -1; + errcode = EINVAL; + } + } + + translate_endian((void *) &timeout, sizeof(timeout)); + if ((s.write_mem) (cb, &s, (unsigned long) ttimeoutp, + (char *) &timeout, sizeof(timeout)) != sizeof(timeout)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_symlink: + result = symlink((char *) t2h_addr(cb, &s, arg1), + (char *) t2h_addr(cb, &s, arg2)); + errcode = errno; + break; + + case __NR_readlink: + result = readlink((char *) t2h_addr(cb, &s, arg1), + (char *) t2h_addr(cb, &s, arg2), + arg3); + errcode = errno; + break; + + case __NR_readdir: + result = (int) readdir((DIR *) t2h_addr(cb, &s, arg1)); + errcode = errno; + break; + +#if 0 + case __NR_mmap: + { + result = (int) mmap((void *) t2h_addr(cb, &s, arg1), + arg2, arg3, arg4, arg5, arg6); + errcode = errno; + + if (errno == 0) + { + sim_core_attach (sd, NULL, + 0, access_read_write_exec, 0, + result, arg2, 0, NULL, NULL); + } + } + break; +#endif + case __NR_mmap: + { + void *addr; + size_t len; + int prot, flags, fildes; + off_t off; + + addr = *((void **) t2h_addr(cb, &s, arg1)); + len = *((size_t *) t2h_addr(cb, &s, arg1 + 4)); + prot = *((int *) t2h_addr(cb, &s, arg1 + 8)); + flags = *((int *) t2h_addr(cb, &s, arg1 + 12)); + fildes = *((int *) t2h_addr(cb, &s, arg1 + 16)); + off = *((off_t *) t2h_addr(cb, &s, arg1 + 20)); + + addr = (void *) conv_endian((unsigned int) addr); + len = conv_endian(len); + prot = conv_endian(prot); + flags = conv_endian(flags); + fildes = conv_endian(fildes); + off = conv_endian(off); + + //addr = (void *) t2h_addr(cb, &s, (unsigned int) addr); + result = (int) mmap(addr, len, prot, flags, fildes, off); + errcode = errno; + + //if (errno == 0) + if (result != -1) + { + char c; + if (sim_core_read_buffer (sd, NULL, read_map, &c, result, 1) == 0) + sim_core_attach (sd, NULL, + 0, access_read_write_exec, 0, + result, len, 0, NULL, NULL); + } + } + break; + + case __NR_munmap: + { + result = munmap((void *)arg1, arg2); + errcode = errno; + if (result != -1) + { + sim_core_detach (sd, NULL, 0, arg2, result); + } + } + break; + + case __NR_truncate: + result = truncate((char *) t2h_addr(cb, &s, arg1), arg2); + errcode = errno; + break; + + case __NR_ftruncate: + result = ftruncate(arg1, arg2); + errcode = errno; + break; + + case __NR_fchmod: + result = fchmod(arg1, arg2); + errcode = errno; + break; + + case __NR_fchown: + result = fchown(arg1, arg2, arg3); + errcode = errno; + break; + + case __NR_statfs: + { + struct statfs statbuf; + + result = statfs((char *) t2h_addr(cb, &s, arg1), &statbuf); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &statbuf, sizeof(statbuf)); + if ((s.write_mem) (cb, &s, arg2, (char *) &statbuf, sizeof(statbuf)) + != sizeof(statbuf)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_fstatfs: + { + struct statfs statbuf; + + result = fstatfs(arg1, &statbuf); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &statbuf, sizeof(statbuf)); + if ((s.write_mem) (cb, &s, arg2, (char *) &statbuf, sizeof(statbuf)) + != sizeof(statbuf)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_syslog: + result = syslog(arg1, (char *) t2h_addr(cb, &s, arg2)); + errcode = errno; + break; + + case __NR_setitimer: + { + struct itimerval value, ovalue; + + value = *((struct itimerval *) t2h_addr(cb, &s, arg2)); + translate_endian((void *) &value, sizeof(value)); + + if (arg2 == 0) + { + result = setitimer(arg1, &value, NULL); + errcode = errno; + } + else + { + result = setitimer(arg1, &value, &ovalue); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &ovalue, sizeof(ovalue)); + if ((s.write_mem) (cb, &s, arg3, (char *) &ovalue, sizeof(ovalue)) + != sizeof(ovalue)) + { + result = -1; + errcode = EINVAL; + } + } + } + break; + + case __NR_getitimer: + { + struct itimerval value; + + result = getitimer(arg1, &value); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &value, sizeof(value)); + if ((s.write_mem) (cb, &s, arg2, (char *) &value, sizeof(value)) + != sizeof(value)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_stat: + { + char *buf; + int buflen; + struct stat statbuf; + + result = stat((char *) t2h_addr(cb, &s, arg1), &statbuf); + errcode = errno; + if (result < 0) + break; + + buflen = cb_host_to_target_stat (cb, NULL, NULL); + buf = xmalloc (buflen); + if (cb_host_to_target_stat (cb, &statbuf, buf) != buflen) + { + /* The translation failed. This is due to an internal + host program error, not the target's fault. */ + free (buf); + result = -1; + errcode = ENOSYS; + break; + } + if ((s.write_mem) (cb, &s, arg2, buf, buflen) != buflen) + { + free (buf); + result = -1; + errcode = EINVAL; + break; + } + free (buf); + } + break; + + case __NR_lstat: + { + char *buf; + int buflen; + struct stat statbuf; + + result = lstat((char *) t2h_addr(cb, &s, arg1), &statbuf); + errcode = errno; + if (result < 0) + break; + + buflen = cb_host_to_target_stat (cb, NULL, NULL); + buf = xmalloc (buflen); + if (cb_host_to_target_stat (cb, &statbuf, buf) != buflen) + { + /* The translation failed. This is due to an internal + host program error, not the target's fault. */ + free (buf); + result = -1; + errcode = ENOSYS; + break; + } + if ((s.write_mem) (cb, &s, arg2, buf, buflen) != buflen) + { + free (buf); + result = -1; + errcode = EINVAL; + break; + } + free (buf); + } + break; + + case __NR_fstat: + { + char *buf; + int buflen; + struct stat statbuf; + + result = fstat(arg1, &statbuf); + errcode = errno; + if (result < 0) + break; + + buflen = cb_host_to_target_stat (cb, NULL, NULL); + buf = xmalloc (buflen); + if (cb_host_to_target_stat (cb, &statbuf, buf) != buflen) + { + /* The translation failed. This is due to an internal + host program error, not the target's fault. */ + free (buf); + result = -1; + errcode = ENOSYS; + break; + } + if ((s.write_mem) (cb, &s, arg2, buf, buflen) != buflen) + { + free (buf); + result = -1; + errcode = EINVAL; + break; + } + free (buf); + } + break; + + case __NR_sysinfo: + { + struct sysinfo info; + + result = sysinfo(&info); + errcode = errno; + + if (result != 0) + break; + + info.uptime = conv_endian(info.uptime); + info.loads[0] = conv_endian(info.loads[0]); + info.loads[1] = conv_endian(info.loads[1]); + info.loads[2] = conv_endian(info.loads[2]); + info.totalram = conv_endian(info.totalram); + info.freeram = conv_endian(info.freeram); + info.sharedram = conv_endian(info.sharedram); + info.bufferram = conv_endian(info.bufferram); + info.totalswap = conv_endian(info.totalswap); + info.freeswap = conv_endian(info.freeswap); + info.procs = conv_endian16(info.procs); +#if LINUX_VERSION_CODE >= 0x20400 + info.totalhigh = conv_endian(info.totalhigh); + info.freehigh = conv_endian(info.freehigh); + info.mem_unit = conv_endian(info.mem_unit); +#endif + if ((s.write_mem) (cb, &s, arg1, (char *) &info, sizeof(info)) + != sizeof(info)) + { + result = -1; + errcode = EINVAL; + } + } + break; + +#if 0 + case __NR_ipc: + { + result = ipc(arg1, arg2, arg3, arg4, + (void *) t2h_addr(cb, &s, arg5), arg6); + errcode = errno; + } + break; +#endif + + case __NR_fsync: + result = fsync(arg1); + errcode = errno; + break; + + case __NR_uname: + /* utsname contains only arrays of char, so it is not necessary + to translate endian. */ + result = uname((struct utsname *) t2h_addr(cb, &s, arg1)); + errcode = errno; + break; + + case __NR_adjtimex: + { + struct timex buf; + + result = adjtimex(&buf); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &buf, sizeof(buf)); + if ((s.write_mem) (cb, &s, arg1, (char *) &buf, sizeof(buf)) + != sizeof(buf)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_mprotect: + result = mprotect((void *) arg1, arg2, arg3); + errcode = errno; + break; + + case __NR_get_kernel_syms: + { + struct kernel_sym table; + + result = get_kernel_syms(&table); + errcode = errno; + + if (result != 0) + break; + + table.value = conv_endian(table.value); + if ((s.write_mem) (cb, &s, arg1, (char *) &table, sizeof(table)) + != sizeof(table)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_fchdir: + result = fchdir(arg1); + errcode = errno; + break; + + case __NR_setfsuid: + result = setfsuid(arg1); + errcode = errno; + break; + + case __NR_setfsgid: + result = setfsgid(arg1); + errcode = errno; + break; + +#if 0 + case __NR__llseek: + { + loff_t buf; + + result = _llseek(arg1, arg2, arg3, &buf, arg5); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &buf, sizeof(buf)); + if ((s.write_mem) (cb, &s, t2h_addr(cb, &s, arg4), + (char *) &buf, sizeof(buf)) != sizeof(buf)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_getdents: + { + struct dirent dir; + + result = getdents(arg1, &dir, arg3); + errcode = errno; + + if (result != 0) + break; + + dir.d_ino = conv_endian(dir.d_ino); + dir.d_off = conv_endian(dir.d_off); + dir.d_reclen = conv_endian16(dir.d_reclen); + if ((s.write_mem) (cb, &s, arg2, (char *) &dir, sizeof(dir)) + != sizeof(dir)) + { + result = -1; + errcode = EINVAL; + } + } + break; +#endif + + case __NR_flock: + result = flock(arg1, arg2); + errcode = errno; + break; + + case __NR_msync: + result = msync((void *) arg1, arg2, arg3); + errcode = errno; + break; + + case __NR_readv: + { + struct iovec vector; + + vector = *((struct iovec *) t2h_addr(cb, &s, arg2)); + translate_endian((void *) &vector, sizeof(vector)); + + result = readv(arg1, &vector, arg3); + errcode = errno; + } + break; + + case __NR_writev: + { + struct iovec vector; + + vector = *((struct iovec *) t2h_addr(cb, &s, arg2)); + translate_endian((void *) &vector, sizeof(vector)); + + result = writev(arg1, &vector, arg3); + errcode = errno; + } + break; + + case __NR_fdatasync: + result = fdatasync(arg1); + errcode = errno; + break; + + case __NR_mlock: + result = mlock((void *) t2h_addr(cb, &s, arg1), arg2); + errcode = errno; + break; + + case __NR_munlock: + result = munlock((void *) t2h_addr(cb, &s, arg1), arg2); + errcode = errno; + break; + + case __NR_nanosleep: + { + struct timespec req, rem; + + req = *((struct timespec *) t2h_addr(cb, &s, arg2)); + translate_endian((void *) &req, sizeof(req)); + + result = nanosleep(&req, &rem); + errcode = errno; + + if (result != 0) + break; + + translate_endian((void *) &rem, sizeof(rem)); + if ((s.write_mem) (cb, &s, arg2, (char *) &rem, sizeof(rem)) + != sizeof(rem)) + { + result = -1; + errcode = EINVAL; + } + } + break; + + case __NR_mremap: /* FIXME */ + result = (int) mremap((void *) t2h_addr(cb, &s, arg1), arg2, arg3, arg4); + errcode = errno; + break; + + case __NR_getresuid: + { + uid_t ruid, euid, suid; + + result = getresuid(&ruid, &euid, &suid); + errcode = errno; + + if (result != 0) + break; + + *((uid_t *) t2h_addr(cb, &s, arg1)) = conv_endian(ruid); + *((uid_t *) t2h_addr(cb, &s, arg2)) = conv_endian(euid); + *((uid_t *) t2h_addr(cb, &s, arg3)) = conv_endian(suid); + } + break; + + case __NR_poll: + { + struct pollfd ufds; + + ufds = *((struct pollfd *) t2h_addr(cb, &s, arg1)); + ufds.fd = conv_endian(ufds.fd); + ufds.events = conv_endian16(ufds.events); + ufds.revents = conv_endian16(ufds.revents); + + result = poll(&ufds, arg2, arg3); + errcode = errno; + } + break; + + case __NR_getresgid: + { + uid_t rgid, egid, sgid; + + result = getresgid(&rgid, &egid, &sgid); + errcode = errno; + + if (result != 0) + break; + + *((uid_t *) t2h_addr(cb, &s, arg1)) = conv_endian(rgid); + *((uid_t *) t2h_addr(cb, &s, arg2)) = conv_endian(egid); + *((uid_t *) t2h_addr(cb, &s, arg3)) = conv_endian(sgid); + } + break; + + case __NR_pread: + result = pread(arg1, (void *) t2h_addr(cb, &s, arg2), arg3, arg4); + errcode = errno; + break; + + case __NR_pwrite: + result = pwrite(arg1, (void *) t2h_addr(cb, &s, arg2), arg3, arg4); + errcode = errno; + break; + + case __NR_chown: + result = chown((char *) t2h_addr(cb, &s, arg1), arg2, arg3); + errcode = errno; + break; + + case __NR_getcwd: + result = (int) getcwd((char *) t2h_addr(cb, &s, arg1), arg2); + errcode = errno; + break; + + case __NR_sendfile: + { + off_t offset; + + offset = *((off_t *) t2h_addr(cb, &s, arg3)); + offset = conv_endian(offset); + + result = sendfile(arg1, arg2, &offset, arg3); + errcode = errno; + + if (result != 0) + break; + + *((off_t *) t2h_addr(cb, &s, arg3)) = conv_endian(offset); + } + break; + + default: + result = -1; + errcode = ENOSYS; + break; + } + + if (result == -1) + m32rbf_h_gr_set (current_cpu, 0, -errcode); + else + m32rbf_h_gr_set (current_cpu, 0, result); + break; + } + + case TRAP_BREAKPOINT: + sim_engine_halt (sd, current_cpu, NULL, pc, + sim_stopped, SIM_SIGTRAP); + break; + + case TRAP_FLUSH_CACHE: + /* Do nothing. */ + break; + + default : + { + /* Use cr5 as EVB (EIT Vector Base) register. */ + USI new_pc = m32rbf_h_cr_get (current_cpu, 5) + 0x40 + num * 4; + return new_pc; + } + } + + /* Fake an "rte" insn. */ + /* FIXME: Should duplicate all of rte processing. */ + return (pc & -4) + 4; +} -- 2.11.0