From cf42e23e262df6abb19cf43fa76e62909d5f9b68 Mon Sep 17 00:00:00 2001 From: Sander de Smalen Date: Wed, 20 Dec 2017 12:45:40 +0000 Subject: [PATCH] Trivial commit to force LLVM to run TableGen for Mips target after a change to the AsmMatcherEmitter, and should fix the buildbot failure on llvm-clang-x86_64-expensive-checks-win. The issue is also described here: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119617.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321170 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsRegisterInfo.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/Mips/MipsRegisterInfo.td b/lib/Target/Mips/MipsRegisterInfo.td index 50537bed8ff..c85ee20273c 100644 --- a/lib/Target/Mips/MipsRegisterInfo.td +++ b/lib/Target/Mips/MipsRegisterInfo.td @@ -38,7 +38,7 @@ class MipsRegWithSubRegs Enc, string n, list subregs> let Namespace = "Mips"; } -// Mips CPU Registers +// Mips CPU Registers. class MipsGPRReg Enc, string n> : MipsReg; // Mips 64-bit CPU Registers -- 2.11.0