From d14ebea6627fb87f3092b02a69e81ddf6df184f7 Mon Sep 17 00:00:00 2001 From: devans Date: Tue, 10 Jun 2003 21:58:33 +0000 Subject: [PATCH] back out RELAX part of previous patch and instead implement FIXME: rename insn RELAX to RELAXED. * insn.scm (insn-builtin!): RELAX renamed to RELAXABLE. * cpu/m32r.cpu (all insns): Ditto. --- cgen/ChangeLog | 7 +++---- cgen/cpu/m32r.cpu | 16 ++++++++-------- cgen/insn.scm | 11 +++++------ cgen/operand.scm | 7 +++---- 4 files changed, 19 insertions(+), 22 deletions(-) diff --git a/cgen/ChangeLog b/cgen/ChangeLog index 5f028fb818..21dbf8bcbb 100644 --- a/cgen/ChangeLog +++ b/cgen/ChangeLog @@ -1,11 +1,10 @@ 2003-06-10 Doug Evans + * insn.scm (insn-builtin!): RELAX renamed to RELAXABLE. + * cpu/m32r.cpu (all insns): Ditto. + * mach.scm (current-*-add!): Disallow redefinition. Make result "unspecified". - * insn.scm (insn-builtin!): Don't define relaxable here, now defined in - operand.scm. - * operand.scm (operand-builtin!): Define RELAXABLE for insns too. - * cpu/m32r.cpu (disp8,disp24): RELAX renamed to RELAXABLE. * gen-all-doc: Split arm and frv docs up a bit. diff --git a/cgen/cpu/m32r.cpu b/cgen/cpu/m32r.cpu index ede78854c0..129efa9696 100644 --- a/cgen/cpu/m32r.cpu +++ b/cgen/cpu/m32r.cpu @@ -626,7 +626,7 @@ (define-operand (name disp8) (comment "8 bit displacement") - (attrs RELAXABLE) + (attrs RELAX) (type h-iaddr) (index f-disp8) ; ??? Early experiments had insert/extract fields here. @@ -635,7 +635,7 @@ ) (dnop disp16 "16 bit displacement" () h-iaddr f-disp16) -(dnop disp24 "24 bit displacement" (RELAXABLE) h-iaddr f-disp24) +(dnop disp24 "24 bit displacement" (RELAX) h-iaddr f-disp24) ; These hardware elements are refered to frequently. @@ -785,7 +785,7 @@ ) (dnmi bc24r "relaxable bc24" - (COND-CTI RELAX (IDOC BR)) + (COND-CTI RELAXED (IDOC BR)) "bc $disp24" (emit bc24 disp24) ) @@ -845,7 +845,7 @@ ) (dnmi bl24r "relaxable bl24" - (UNCOND-CTI RELAX (IDOC BR)) + (UNCOND-CTI RELAXED (IDOC BR)) "bl $disp24" (emit bl24 disp24) ) @@ -881,7 +881,7 @@ ) (dnmi bcl24r "relaxable bcl24" - (COND-CTI (MACH m32rx) RELAX (IDOC BR)) + (COND-CTI (MACH m32rx) RELAXED (IDOC BR)) "bcl $disp24" (emit bcl24 disp24) ) @@ -911,7 +911,7 @@ ) (dnmi bnc24r "relaxable bnc24" - (COND-CTI RELAX (IDOC BR)) + (COND-CTI RELAXED (IDOC BR)) "bnc $disp24" (emit bnc24 disp24) ) @@ -950,7 +950,7 @@ ) (dnmi bra24r "relaxable bra24" - (UNCOND-CTI RELAX (IDOC BR)) + (UNCOND-CTI RELAXED (IDOC BR)) "bra $disp24" (emit bra24 disp24) ) @@ -986,7 +986,7 @@ ) (dnmi bncl24r "relaxable bncl24" - (COND-CTI (MACH m32rx) RELAX (IDOC BR)) + (COND-CTI (MACH m32rx) RELAXED (IDOC BR)) "bncl $disp24" (emit bncl24 disp24) ) diff --git a/cgen/insn.scm b/cgen/insn.scm index 8195efb1ba..f3ec793569 100644 --- a/cgen/insn.scm +++ b/cgen/insn.scm @@ -960,13 +960,12 @@ Define an instruction, all arguments specified. ; them together. ; FIXME: This is a case where we need one attribute with several values. ; Presently each RELAX_FOO will use up a bit. - ; NOTE: Defined in operand.scm because we can't define it twice. - ;(define-attr '(for insn) '(type boolean) '(name RELAXABLE) - ; '(comment "insn is relaxable")) + (define-attr '(for insn) '(type boolean) '(name RELAXABLE) + '(comment "insn is relaxable")) - ; RELAX: Large relaxable variant. Avoided by assembler in first pass. - ; FIXME: Rename this to RELAXED. - (define-attr '(for insn) '(type boolean) '(name RELAX) '(comment "relaxed form of insn")) + ; RELAXED: Large relaxable variant. Avoided by assembler in first pass. + (define-attr '(for insn) '(type boolean) '(name RELAXED) + '(comment "relaxed form of insn")) ; NO-DIS: For macro insns, do not use during disassembly. (define-attr '(for insn) '(type boolean) '(name NO-DIS) '(comment "don't use for disassembly")) diff --git a/cgen/operand.scm b/cgen/operand.scm index ce09c67985..af71d1f78e 100644 --- a/cgen/operand.scm +++ b/cgen/operand.scm @@ -1556,10 +1556,9 @@ Define an anyof operand, name/value pair list version. (define-attr '(for operand) '(type boolean) '(name NEGATIVE) '(comment "value is negative")) - ; Also used for insns, and we can't define it twice, so we specify - ; for insn here. - (define-attr '(for operand insn) '(type boolean) '(name RELAXABLE) - '(comment "operand/insn is relaxable")) + ; Operand plays a part in RELAXABLE/RELAXED insns. + (define-attr '(for operand) '(type boolean) '(name RELAX) + '(comment "operand is the relax participant")) ; ??? Might be able to make SEM-ONLY go away (or machine compute it) ; by scanning which operands are refered to by the insn syntax strings. -- 2.11.0