From d15f4e2ef3b1b4c01a490a00b0f6dc744741ce01 Mon Sep 17 00:00:00 2001 From: Mingyao Yang Date: Thu, 17 Apr 2014 18:46:24 -0700 Subject: [PATCH] Fix a use of OpCondBranch that breaks the MIPS build. Change-Id: I09e19cb00c1e3f4bc0b0293f58674c9160094f7f --- compiler/dex/quick/gen_common.cc | 4 ++-- compiler/dex/quick/mips/int_mips.cc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/compiler/dex/quick/gen_common.cc b/compiler/dex/quick/gen_common.cc index 68f606bc9..bb19516b9 100644 --- a/compiler/dex/quick/gen_common.cc +++ b/compiler/dex/quick/gen_common.cc @@ -1591,7 +1591,7 @@ void Mir2Lir::GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, rl_src1 = LoadValue(rl_src1, kCoreReg); rl_src2 = LoadValue(rl_src2, kCoreReg); if (check_zero) { - GenDivZeroCheck(rl_src2.reg); + GenDivZeroCheck(rl_src2.reg); } rl_result = GenDivRem(rl_dest, rl_src1.reg, rl_src2.reg, op == kOpDiv); done = true; @@ -1602,7 +1602,7 @@ void Mir2Lir::GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, rl_src1 = LoadValue(rl_src1, kCoreReg); rl_src2 = LoadValue(rl_src2, kCoreReg); if (check_zero) { - GenDivZeroCheck(rl_src2.reg); + GenDivZeroCheck(rl_src2.reg); } rl_result = GenDivRem(rl_dest, rl_src1.reg, rl_src2.reg, op == kOpDiv); done = true; diff --git a/compiler/dex/quick/mips/int_mips.cc b/compiler/dex/quick/mips/int_mips.cc index 968965b60..237572034 100644 --- a/compiler/dex/quick/mips/int_mips.cc +++ b/compiler/dex/quick/mips/int_mips.cc @@ -346,7 +346,7 @@ void MipsMir2Lir::GenDivZeroCheckWide(RegStorage reg) { DCHECK(reg.IsPair()); // TODO: support k64BitSolo. RegStorage t_reg = AllocTemp(); OpRegRegReg(kOpOr, t_reg, reg.GetLow(), reg.GetHigh()); - GenDivZeroCheck(kCondEq); + GenDivZeroCheck(t_reg); FreeTemp(t_reg); } -- 2.11.0