From d4cf992230a6cc4d76022c5d47dbd23115bdec44 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Tue, 26 Feb 2008 18:50:50 +0000 Subject: [PATCH] Avoid aborting on invalid shift counts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 22 +++++++++++++++++---- test/CodeGen/X86/invalid-shift-immediate.ll | 30 +++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/X86/invalid-shift-immediate.ll diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 2f3bfcfb737..8da6f79f5bf 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1241,13 +1241,19 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask, case ISD::SHL: // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { - ComputeMaskedBits(Op.getOperand(0), Mask.lshr(SA->getValue()), + unsigned ShAmt = SA->getValue(); + + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + return; + + ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - KnownZero <<= SA->getValue(); - KnownOne <<= SA->getValue(); + KnownZero <<= ShAmt; + KnownOne <<= ShAmt; // low bits known zero. - KnownZero |= APInt::getLowBitsSet(BitWidth, SA->getValue()); + KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); } return; case ISD::SRL: @@ -1255,6 +1261,10 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask, if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { unsigned ShAmt = SA->getValue(); + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + return; + ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); @@ -1269,6 +1279,10 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask, if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { unsigned ShAmt = SA->getValue(); + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + return; + APInt InDemandedMask = (Mask << ShAmt); // If any of the demanded bits are produced by the sign extension, we also // demand the input sign bit. diff --git a/test/CodeGen/X86/invalid-shift-immediate.ll b/test/CodeGen/X86/invalid-shift-immediate.ll new file mode 100644 index 00000000000..5c47f5ee685 --- /dev/null +++ b/test/CodeGen/X86/invalid-shift-immediate.ll @@ -0,0 +1,30 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR2098 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin8" + +define void @foo(i32 %x) { +entry: + %x_addr = alloca i32 ; [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32 %x, i32* %x_addr + %tmp = load i32* %x_addr, align 4 ; [#uses=1] + %tmp1 = ashr i32 %tmp, -2 ; [#uses=1] + %tmp2 = and i32 %tmp1, 1 ; [#uses=1] + %tmp23 = trunc i32 %tmp2 to i8 ; [#uses=1] + %toBool = icmp ne i8 %tmp23, 0 ; [#uses=1] + br i1 %toBool, label %bb, label %bb5 + +bb: ; preds = %entry + %tmp4 = call i32 (...)* @bar( ) nounwind ; [#uses=0] + br label %bb5 + +bb5: ; preds = %bb, %entry + br label %return + +return: ; preds = %bb5 + ret void +} + +declare i32 @bar(...) -- 2.11.0