From d93bcaaa5bc5c40187a582a78c39d240db9cebbc Mon Sep 17 00:00:00 2001
From: Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Date: Wed, 10 Oct 2018 16:08:02 +0000
Subject: [PATCH] [llvm-mca] Minor refactoring in preparation for a patch that
 will fully fix PR36671. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344149 91177308-0d34-0410-b5e6-96231b3b80d8
---
 tools/llvm-mca/include/HardwareUnits/RegisterFile.h | 11 ++++++-----
 tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp   | 16 +++++++++-------
 2 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/tools/llvm-mca/include/HardwareUnits/RegisterFile.h b/tools/llvm-mca/include/HardwareUnits/RegisterFile.h
index 1026079c377..6a45c707de0 100644
--- a/tools/llvm-mca/include/HardwareUnits/RegisterFile.h
+++ b/tools/llvm-mca/include/HardwareUnits/RegisterFile.h
@@ -68,9 +68,11 @@ class RegisterFile : public HardwareUnit {
     bool AllowZeroMoveEliminationOnly;
 
     RegisterMappingTracker(unsigned NumPhysRegisters,
-                           unsigned MaxMoveEliminated = 0U)
+                           unsigned MaxMoveEliminated = 0U,
+                           bool AllowZeroMoveElimOnly = false)
         : NumPhysRegs(NumPhysRegisters), NumUsedPhysRegs(0),
-          MaxMoveEliminatedPerCycle(MaxMoveEliminated), NumMoveEliminated(0U) {}
+          MaxMoveEliminatedPerCycle(MaxMoveEliminated), NumMoveEliminated(0U),
+          AllowZeroMoveEliminationOnly(AllowZeroMoveElimOnly) {}
   };
 
   // A vector of register file descriptors.  This set always contains at least
@@ -151,9 +153,8 @@ class RegisterFile : public HardwareUnit {
   // Here FPRegisterFile contains all the registers defined by register class
   // VR128RegClass and VR256RegClass. FPRegisterFile implements 60
   // registers which can be used for register renaming purpose.
-  void
-  addRegisterFile(llvm::ArrayRef<llvm::MCRegisterCostEntry> RegisterClasses,
-                  unsigned NumPhysRegs);
+  void addRegisterFile(const llvm::MCRegisterFileDesc &RF,
+                       llvm::ArrayRef<llvm::MCRegisterCostEntry> Entries);
 
   // Consumes physical registers in each register file specified by the
   // `IndexPlusCostPairTy`. This method is called from `addRegisterMapping()`.
diff --git a/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp b/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
index 51a24786139..01131253b5b 100644
--- a/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
+++ b/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
@@ -37,7 +37,7 @@ void RegisterFile::initialize(const MCSchedModel &SM, unsigned NumRegs) {
   // declared by the target. The number of physical registers in the default
   // register file is set equal to `NumRegs`. A value of zero for `NumRegs`
   // means: this register file has an unbounded number of physical registers.
-  addRegisterFile({} /* all registers */, NumRegs);
+  RegisterFiles.emplace_back(NumRegs);
   if (!SM.hasExtraProcessorInfo())
     return;
 
@@ -48,15 +48,17 @@ void RegisterFile::initialize(const MCSchedModel &SM, unsigned NumRegs) {
   for (unsigned I = 0, E = Info.NumRegisterFiles; I < E; ++I) {
     const MCRegisterFileDesc &RF = Info.RegisterFiles[I];
     // Skip invalid register files with zero physical registers.
-    unsigned Length = RF.NumRegisterCostEntries;
+    // TODO: verify this constraint in SubtargetEmitter, and convert this
+    // statement into an assert.
     if (!RF.NumPhysRegs)
       continue;
+
     // The cost of a register definition is equivalent to the number of
     // physical registers that are allocated at register renaming stage.
+    unsigned Length = RF.NumRegisterCostEntries;
     const MCRegisterCostEntry *FirstElt =
         &Info.RegisterCostTable[RF.RegisterCostEntryIdx];
-    addRegisterFile(ArrayRef<MCRegisterCostEntry>(FirstElt, Length),
-                    RF.NumPhysRegs);
+    addRegisterFile(RF, ArrayRef<MCRegisterCostEntry>(FirstElt, Length));
   }
 }
 
@@ -65,15 +67,15 @@ void RegisterFile::cycleStart() {
     RMT.NumMoveEliminated = 0;
 }
 
-void RegisterFile::addRegisterFile(ArrayRef<MCRegisterCostEntry> Entries,
-                                   unsigned NumPhysRegs) {
+void RegisterFile::addRegisterFile(const MCRegisterFileDesc &RF,
+                                   ArrayRef<MCRegisterCostEntry> Entries) {
   // A default register file is always allocated at index #0. That register file
   // is mainly used to count the total number of mappings created by all
   // register files at runtime. Users can limit the number of available physical
   // registers in register file #0 through the command line flag
   // `-register-file-size`.
   unsigned RegisterFileIndex = RegisterFiles.size();
-  RegisterFiles.emplace_back(NumPhysRegs);
+  RegisterFiles.emplace_back(RF.NumPhysRegs);
 
   // Special case where there is no register class identifier in the set.
   // An empty set of register classes means: this register file contains all
-- 
2.11.0